[llvm] AMDGPU: Implement expansion for f64 exp (PR #182539)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Sat Feb 21 11:13:59 PST 2026


================
@@ -3858,6 +3865,101 @@ bool AMDGPULegalizerInfo::legalizeFExp10Unsafe(MachineIRBuilder &B,
   return true;
 }
 
+// This expansion gives a result slightly better than 1ulp.
+bool AMDGPULegalizerInfo::legalizeFEXPF64(MachineInstr &MI,
+                                          MachineIRBuilder &B) const {
+  Register x = MI.getOperand(1).getReg();
+  LLT s64 = LLT::scalar(64);
+  LLT s32 = LLT::scalar(32);
+  LLT s1 = LLT::scalar(1);
+
+  // TODO: Check if reassoc is safe. There is an output change in exp2 and
+  // exp10, which slightly increases ulp.
+  unsigned Flags = MI.getFlags() & ~MachineInstr::FmReassoc;
+
+  Register dn, f, t;
----------------
arsenm wrote:

There was an RFC (it's come up a few times). Google found [this one](https://discourse.llvm.org/t/rfc-changing-variable-naming-rules-in-llvm-codebase/51112/19) which is older than I remember. I think there was a more recent one with consensus in the 2020s

https://github.com/llvm/llvm-project/pull/182539


More information about the llvm-commits mailing list