[llvm] [AArch64][GlobalISel] Remove fallbacks for fpcvt intrinsics with 16-bit operands (PR #179693)

[David Green via llvm-commits]

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@@ -1240,12 +1240,13 @@ AArch64RegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
       }
       TypeSize DstSize = getSizeInBits(MI.getOperand(0).getReg(), MRI, TRI);
       TypeSize SrcSize = getSizeInBits(MI.getOperand(2).getReg(), MRI, TRI);
-      if (((DstSize == SrcSize) || STI.hasFeature(AArch64::FeatureFPRCVT)) &&
-          all_of(MRI.use_nodbg_instructions(MI.getOperand(0).getReg()),
-                 [&](const MachineInstr &UseMI) {
-                   return onlyUsesFP(UseMI, MRI, TRI) ||
-                          prefersFPUse(UseMI, MRI, TRI);
-                 }))
+      if ((DstSize == 16) ||
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davemgreen wrote:

It might be worth having a comment about the variants that are available and why i16 is always fp.

https://github.com/llvm/llvm-project/pull/179693