[llvm] [LoopInterchange] Update tests for reduction2mem (NFC) (PR #181629)
Ryotaro Kasuga via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 16 02:51:50 PST 2026
https://github.com/kasuga-fj created https://github.com/llvm/llvm-project/pull/181629
The current ongoing work on DependenceAnalysis will degrade its analysis capability. As a result, some existing tests will start to fail, meaning that those tests are no longer meaningful. To preserve their original intent, they need to be updated so that DependenceAnalysis can still analyze them accurately.
This patch updates the test cases for the reduction2mem feature in LoopInterchange. Specifically, it replaces the loop bounds with constant values, which should not alter the intent of the tests.
>From 908304ceb0dbef170f13203f1ac9747b3fd4b7b7 Mon Sep 17 00:00:00 2001
From: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: Mon, 16 Feb 2026 10:39:31 +0000
Subject: [PATCH] [LoopInterchange] Fix tests for reduction2mem (NFC)
---
.../reduction2mem-limitation.ll | 89 +++++++++----------
.../LoopInterchange/reduction2mem.ll | 38 ++++----
2 files changed, 59 insertions(+), 68 deletions(-)
diff --git a/llvm/test/Transforms/LoopInterchange/reduction2mem-limitation.ll b/llvm/test/Transforms/LoopInterchange/reduction2mem-limitation.ll
index f9888f43dcb6e..16d42847cf6c2 100644
--- a/llvm/test/Transforms/LoopInterchange/reduction2mem-limitation.ll
+++ b/llvm/test/Transforms/LoopInterchange/reduction2mem-limitation.ll
@@ -5,9 +5,9 @@
; 1. The initial value of the reduction is not a constant.
-; for (int i = 0; i < n; i++) {
+; for (int i = 0; i < 100; i++) {
; r = s[i];
-; for (int j = 0; j < n; j++)
+; for (int j = 0; j < 100; j++)
; r = r + a[j][i] * b[j][i];
; s[i] = r;
; }
@@ -28,10 +28,9 @@
; IR-LABEL: @reduction_01(
; IR-NOT: split
-define void @reduction_01(ptr noalias readonly %a, ptr noalias readonly %b, ptr noalias writeonly %s, i64 %n) {
+define void @reduction_01(ptr noalias readonly %a, ptr noalias readonly %b, ptr noalias writeonly %s) {
entry:
- %cmp = icmp sgt i64 %n, 0
- br i1 %cmp, label %outerloop_header, label %exit
+ br label %outerloop_header
outerloop_header:
%index_i = phi i64 [ 0, %entry ], [ %index_i.next, %outerloop_latch ]
@@ -44,21 +43,21 @@ outerloop_header:
innerloop:
%index_j = phi i64 [ 0, %outerloop_header ], [ %index_j.next, %innerloop ]
%reduction = phi double [ %s_init, %outerloop_header ], [ %add, %innerloop ]
- %addr_a_j_i = getelementptr inbounds nuw double, ptr %invariant.gep.us, i64 %index_j
+ %addr_a_j_i = getelementptr inbounds nuw [100 x double], ptr %invariant.gep.us, i64 %index_j
%0 = load double, ptr %addr_a_j_i, align 8
- %addr_b_j_i = getelementptr inbounds nuw double, ptr %invariant.gep32.us, i64 %index_j
+ %addr_b_j_i = getelementptr inbounds nuw [100 x double], ptr %invariant.gep32.us, i64 %index_j
%1 = load double, ptr %addr_b_j_i, align 8
%mul = fmul fast double %1, %0
%add = fadd fast double %mul, %reduction
%index_j.next = add nuw nsw i64 %index_j, 1
- %cond1 = icmp eq i64 %index_j.next, %n
+ %cond1 = icmp eq i64 %index_j.next, 100
br i1 %cond1, label %outerloop_latch, label %innerloop
outerloop_latch:
%lcssa = phi double [ %add, %innerloop ]
store double %lcssa, ptr %addr_s, align 8
%index_i.next = add nuw nsw i64 %index_i, 1
- %cond2 = icmp eq i64 %index_i.next, %n
+ %cond2 = icmp eq i64 %index_i.next, 100
br i1 %cond2, label %exit, label %outerloop_header
exit:
@@ -66,10 +65,10 @@ exit:
}
; 2. There are two or more reductions
-; for (int i = 0; i < n; i++) {
+; for (int i = 0; i < 100; i++) {
; r1 = 0;
; r2 = 0;
-; for (int j = 0; j < n; j++){
+; for (int j = 0; j < 100; j++){
; r1 = r1 + a[j][i] * b[j][i];
; r2 = r2 + a[j][i];
; }
@@ -92,10 +91,9 @@ exit:
; IR-LABEL: @reduction_02(
; IR-NOT: split
-define void @reduction_02(ptr noalias readonly %a, ptr noalias readonly %b, ptr noalias writeonly %s, ptr noalias writeonly %s2, i64 %n) {
+define void @reduction_02(ptr noalias readonly %a, ptr noalias readonly %b, ptr noalias writeonly %s, ptr noalias writeonly %s2) {
entry:
- %cmp = icmp sgt i64 %n, 0
- br i1 %cmp, label %outerloop_header, label %exit
+ br label %outerloop_header
outerloop_header:
%index_i = phi i64 [ 0, %entry ], [ %index_i.next, %outerloop_latch ]
@@ -109,15 +107,15 @@ innerloop:
%index_j = phi i64 [ 0, %outerloop_header ], [ %index_j.next, %innerloop ]
%reduction = phi double [ 0.000000e+00, %outerloop_header ], [ %add, %innerloop ]
%reduction2 = phi double [ 0.000000e+00, %outerloop_header ], [ %add2, %innerloop ]
- %addr_a_j_i = getelementptr inbounds nuw double, ptr %invariant.gep.us, i64 %index_j
+ %addr_a_j_i = getelementptr inbounds nuw [100 x double], ptr %invariant.gep.us, i64 %index_j
%0 = load double, ptr %addr_a_j_i, align 8
- %addr_b_j_i = getelementptr inbounds nuw double, ptr %invariant.gep32.us, i64 %index_j
+ %addr_b_j_i = getelementptr inbounds nuw [100 x double], ptr %invariant.gep32.us, i64 %index_j
%1 = load double, ptr %addr_b_j_i, align 8
%mul = fmul fast double %1, %0
%add = fadd fast double %mul, %reduction
%add2 = fadd fast double %reduction2, %0
%index_j.next = add nuw nsw i64 %index_j, 1
- %cond1 = icmp eq i64 %index_j.next, %n
+ %cond1 = icmp eq i64 %index_j.next, 100
br i1 %cond1, label %outerloop_latch, label %innerloop
outerloop_latch:
@@ -126,7 +124,7 @@ outerloop_latch:
store double %lcssa, ptr %addr_s, align 8
store double %lcssa2, ptr %addr_s2, align 8
%index_i.next = add nuw nsw i64 %index_i, 1
- %cond2 = icmp eq i64 %index_i.next, %n
+ %cond2 = icmp eq i64 %index_i.next, 100
br i1 %cond2, label %exit, label %outerloop_header
exit:
@@ -134,9 +132,9 @@ exit:
}
; 3. The reduction is used more than once in the outer loop.
-; for (int i = 0; i < n; i++) {
+; for (int i = 0; i < 100; i++) {
; r = 0;
-; for (int j = 0; j < n; j++)
+; for (int j = 0; j < 100; j++)
; r = r + a[j][i] * b[j][i];
; r += 1;
; s[i] = r;
@@ -157,10 +155,9 @@ exit:
; IR-LABEL: @reduction_03(
; IR-NOT: split
-define void @reduction_03(ptr noalias readonly %a, ptr noalias readonly %b, ptr noalias writeonly %s, i64 %n) {
+define void @reduction_03(ptr noalias readonly %a, ptr noalias readonly %b, ptr noalias writeonly %s) {
entry:
- %cmp = icmp sgt i64 %n, 0
- br i1 %cmp, label %outerloop_header, label %exit
+ br label %outerloop_header
outerloop_header:
%index_i = phi i64 [ 0, %entry ], [ %index_i.next, %outerloop_latch ]
@@ -172,14 +169,14 @@ outerloop_header:
innerloop:
%index_j = phi i64 [ 0, %outerloop_header ], [ %index_j.next, %innerloop ]
%reduction = phi double [ 0.000000e+00, %outerloop_header ], [ %add, %innerloop ]
- %addr_a_j_i = getelementptr inbounds nuw double, ptr %invariant.gep.us, i64 %index_j
+ %addr_a_j_i = getelementptr inbounds nuw [100 x double], ptr %invariant.gep.us, i64 %index_j
%0 = load double, ptr %addr_a_j_i, align 8
- %addr_b_j_i = getelementptr inbounds nuw double, ptr %invariant.gep32.us, i64 %index_j
+ %addr_b_j_i = getelementptr inbounds nuw [100 x double], ptr %invariant.gep32.us, i64 %index_j
%1 = load double, ptr %addr_b_j_i, align 8
%mul = fmul fast double %1, %0
%add = fadd fast double %mul, %reduction
%index_j.next = add nuw nsw i64 %index_j, 1
- %cond1 = icmp eq i64 %index_j.next, %n
+ %cond1 = icmp eq i64 %index_j.next, 100
br i1 %cond1, label %outerloop_latch, label %innerloop
outerloop_latch:
@@ -188,7 +185,7 @@ outerloop_latch:
%add17.us = fadd fast double %lcssa, 1.000000e+00
store double %add17.us, ptr %addr_s, align 8
%index_i.next = add nuw nsw i64 %index_i, 1
- %cond2 = icmp eq i64 %index_i.next, %n
+ %cond2 = icmp eq i64 %index_i.next, 100
br i1 %cond2, label %exit, label %outerloop_header
exit:
@@ -197,11 +194,11 @@ exit:
; 4. The reduction is not in the innermost loop.
-; for (int i = 0; i < n; i++) {
+; for (int i = 0; i < 100; i++) {
; r = 0;
-; for (int j = 0; j < n; j++) {
+; for (int j = 0; j < 100; j++) {
; r = r + a[j][i] * b[j][i]; // reduction
-; for (int k = 0; k < n; k++)
+; for (int k = 0; k < 100; k++)
; c[k] = 1;
; }
; s[i] = r;
@@ -228,10 +225,9 @@ exit:
; IR-LABEL: @reduction_04(
; IR-NOT: split
-define void @reduction_04(ptr noalias readonly %a, ptr noalias readonly %b, ptr noalias writeonly %c, ptr noalias writeonly %s, i64 %n) {
+define void @reduction_04(ptr noalias readonly %a, ptr noalias readonly %b, ptr noalias writeonly %c, ptr noalias writeonly %s) {
entry:
- %cmp = icmp sgt i64 %n, 0
- br i1 %cmp, label %i_loop_header, label %exit
+ br label %i_loop_header
i_loop_header:
%index_i = phi i64 [ 0, %entry ], [ %index_i.next, %i_loop_latch ]
@@ -243,9 +239,9 @@ i_loop_header:
j_loop:
%index_j = phi i64 [ 0, %i_loop_header ], [ %index_j.next, %j_loop_latch ]
%reduction = phi double [ 0.000000e+00, %i_loop_header ], [ %add, %j_loop_latch ]
- %addr_a_j_i = getelementptr inbounds nuw double, ptr %invariant.gep.us, i64 %index_j
+ %addr_a_j_i = getelementptr inbounds nuw [100 x double], ptr %invariant.gep.us, i64 %index_j
%0 = load double, ptr %addr_a_j_i, align 8
- %addr_b_j_i = getelementptr inbounds nuw double, ptr %invariant.gep32.us, i64 %index_j
+ %addr_b_j_i = getelementptr inbounds nuw [100 x double], ptr %invariant.gep32.us, i64 %index_j
%1 = load double, ptr %addr_b_j_i, align 8
%mul = fmul fast double %1, %0
%add = fadd fast double %mul, %reduction
@@ -255,19 +251,19 @@ k_loop:
%index_k = phi i64 [ %index_k.next, %k_loop ], [ 0, %j_loop ]
%arrayidx22.us.us = getelementptr inbounds nuw double, ptr %c, i64 %index_k
%index_k.next = add nuw nsw i64 %index_k, 1
- %exitcond.not = icmp eq i64 %index_k.next, %n
+ %exitcond.not = icmp eq i64 %index_k.next, 100
br i1 %exitcond.not, label %j_loop_latch, label %k_loop
j_loop_latch:
%index_j.next = add nuw nsw i64 %index_j, 1
- %cond1 = icmp eq i64 %index_j.next, %n
+ %cond1 = icmp eq i64 %index_j.next, 100
br i1 %cond1, label %i_loop_latch, label %j_loop
i_loop_latch:
%lcssa = phi double [ %add, %j_loop_latch ]
store double %lcssa, ptr %addr_s, align 8
%index_i.next = add nuw nsw i64 %index_i, 1
- %cond2 = icmp eq i64 %index_i.next, %n
+ %cond2 = icmp eq i64 %index_i.next, 100
br i1 %cond2, label %exit, label %i_loop_header
exit:
@@ -276,9 +272,9 @@ exit:
; 5. MemRef doesn't dominate InnerLoop's HeaderBB.
-; for (int i = 0; i < n; i++) {
+; for (int i = 0; i < 100; i++) {
; r = 0;
-; for (int j = 0; j < n; j++)
+; for (int j = 0; j < 100; j++)
; r = r + a[j][i] * b[j][i];
; s[i] = r;
; }
@@ -298,10 +294,9 @@ exit:
; IR-LABEL: @reduction_05(
; IR-NOT: split
-define void @reduction_05(ptr noalias readonly %a, ptr noalias readonly %b, ptr noalias writeonly %s, i64 %n) {
+define void @reduction_05(ptr noalias readonly %a, ptr noalias readonly %b, ptr noalias writeonly %s) {
entry:
- %cmp = icmp sgt i64 %n, 0
- br i1 %cmp, label %outerloop_header, label %exit
+ br label %outerloop_header
outerloop_header:
%index_i = phi i64 [ 0, %entry ], [ %index_i.next, %outerloop_latch ]
@@ -312,14 +307,14 @@ outerloop_header:
innerloop:
%index_j = phi i64 [ 0, %outerloop_header ], [ %index_j.next, %innerloop ]
%reduction = phi double [ 0.000000e+00, %outerloop_header ], [ %add, %innerloop ]
- %addr_a_j_i = getelementptr inbounds nuw double, ptr %invariant.gep.us, i64 %index_j
+ %addr_a_j_i = getelementptr inbounds nuw [100 x double], ptr %invariant.gep.us, i64 %index_j
%0 = load double, ptr %addr_a_j_i, align 8
- %addr_b_j_i = getelementptr inbounds nuw double, ptr %invariant.gep32.us, i64 %index_j
+ %addr_b_j_i = getelementptr inbounds nuw [100 x double], ptr %invariant.gep32.us, i64 %index_j
%1 = load double, ptr %addr_b_j_i, align 8
%mul = fmul fast double %1, %0
%add = fadd fast double %mul, %reduction
%index_j.next = add nuw nsw i64 %index_j, 1
- %cond1 = icmp eq i64 %index_j.next, %n
+ %cond1 = icmp eq i64 %index_j.next, 100
br i1 %cond1, label %outerloop_latch, label %innerloop
outerloop_latch:
@@ -327,7 +322,7 @@ outerloop_latch:
%addr_s = getelementptr inbounds nuw double, ptr %s, i64 %index_i
store double %lcssa, ptr %addr_s, align 8
%index_i.next = add nuw nsw i64 %index_i, 1
- %cond2 = icmp eq i64 %index_i.next, %n
+ %cond2 = icmp eq i64 %index_i.next, 100
br i1 %cond2, label %exit, label %outerloop_header
exit:
diff --git a/llvm/test/Transforms/LoopInterchange/reduction2mem.ll b/llvm/test/Transforms/LoopInterchange/reduction2mem.ll
index de05b5ce4e5de..1293c22b5a7a0 100644
--- a/llvm/test/Transforms/LoopInterchange/reduction2mem.ll
+++ b/llvm/test/Transforms/LoopInterchange/reduction2mem.ll
@@ -2,19 +2,18 @@
; NOTE: Support the reduction in the inner loop.
; RUN: opt < %s -passes="loop-interchange" -loop-interchange-reduction-to-mem -loop-interchange-profitabilities=ignore -S | FileCheck %s
-; for (int i = 0; i < n; i++) {
+; for (int i = 0; i < 100; i++) {
; r = 0;
-; for (int j = 0; j < n; j++)
+; for (int j = 0; j < 100; j++)
; r = r + a[j][i] * b[j][i];
; s[i] = r;
; }
-define void @func(ptr noalias readonly %a, ptr noalias readonly %b, ptr noalias writeonly %s, i64 %n) {
+define void @func(ptr noalias readonly %a, ptr noalias readonly %b, ptr noalias writeonly %s) {
; CHECK-LABEL: define void @func(
-; CHECK-SAME: ptr noalias readonly [[A:%.*]], ptr noalias readonly [[B:%.*]], ptr noalias writeonly [[S:%.*]], i64 [[N:%.*]]) {
+; CHECK-SAME: ptr noalias readonly [[A:%.*]], ptr noalias readonly [[B:%.*]], ptr noalias writeonly [[S:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
-; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[N]], 0
-; CHECK-NEXT: br i1 [[CMP]], label %[[INNERLOOP_PREHEADER:.*]], label %[[EXIT:.*]]
+; CHECK-NEXT: br label %[[INNERLOOP_PREHEADER:.*]]
; CHECK: [[OUTERLOOPHEADER_PREHEADER:.*]]:
; CHECK-NEXT: br label %[[OUTERLOOP_HEADER:.*]]
; CHECK: [[OUTERLOOP_HEADER]]:
@@ -27,40 +26,37 @@ define void @func(ptr noalias readonly %a, ptr noalias readonly %b, ptr noalias
; CHECK-NEXT: br label %[[INNERLOOP:.*]]
; CHECK: [[INNERLOOP]]:
; CHECK-NEXT: [[INDEX_J:%.*]] = phi i64 [ [[J_NEXT:%.*]], %[[INNERLOOP_SPLIT:.*]] ], [ 0, %[[INNERLOOP_PREHEADER]] ]
-; CHECK-NEXT: [[DEAD_REDUCTION:%.*]] = phi double [ [[ADD_LCSSA:%.*]], %[[INNERLOOP_SPLIT]] ], [ 0.000000e+00, %[[INNERLOOP_PREHEADER]] ]
+; CHECK-NEXT: [[REDUCTION:%.*]] = phi double [ [[ADD_LCSSA:%.*]], %[[INNERLOOP_SPLIT]] ], [ 0.000000e+00, %[[INNERLOOP_PREHEADER]] ]
; CHECK-NEXT: [[FIRSTITER:%.*]] = phi i1 [ false, %[[INNERLOOP_SPLIT]] ], [ true, %[[INNERLOOP_PREHEADER]] ]
; CHECK-NEXT: br label %[[OUTERLOOPHEADER_PREHEADER]]
; CHECK: [[INNERLOOP_SPLIT1]]:
; CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[ADDR_S]], align 8
; CHECK-NEXT: [[NEW_VAR:%.*]] = select i1 [[FIRSTITER]], double 0.000000e+00, double [[TMP0]]
-; CHECK-NEXT: [[ADDR_A_J_I:%.*]] = getelementptr inbounds nuw double, ptr [[ADDR_A]], i64 [[INDEX_J]]
+; CHECK-NEXT: [[ADDR_A_J_I:%.*]] = getelementptr inbounds nuw [100 x double], ptr [[ADDR_A]], i64 [[INDEX_J]]
; CHECK-NEXT: [[A_J_I:%.*]] = load double, ptr [[ADDR_A_J_I]], align 8
-; CHECK-NEXT: [[ADDR_B_J_I:%.*]] = getelementptr inbounds nuw double, ptr [[ADDR_B]], i64 [[INDEX_J]]
+; CHECK-NEXT: [[ADDR_B_J_I:%.*]] = getelementptr inbounds nuw [100 x double], ptr [[ADDR_B]], i64 [[INDEX_J]]
; CHECK-NEXT: [[B_J_I:%.*]] = load double, ptr [[ADDR_B_J_I]], align 8
; CHECK-NEXT: [[MUL:%.*]] = fmul fast double [[B_J_I]], [[A_J_I]]
; CHECK-NEXT: [[ADD:%.*]] = fadd fast double [[MUL]], [[NEW_VAR]]
; CHECK-NEXT: store double [[ADD]], ptr [[ADDR_S]], align 8
; CHECK-NEXT: [[DEAD_J_NEXT:%.*]] = add nuw nsw i64 [[INDEX_J]], 1
-; CHECK-NEXT: [[DEAD_COND:%.*]] = icmp eq i64 [[DEAD_J_NEXT]], [[N]]
+; CHECK-NEXT: [[COND1:%.*]] = icmp eq i64 [[DEAD_J_NEXT]], 100
; CHECK-NEXT: br label %[[OUTERLOOP_LATCH]]
; CHECK: [[INNERLOOP_SPLIT]]:
; CHECK-NEXT: [[ADD_LCSSA]] = phi double [ [[ADD]], %[[OUTERLOOP_LATCH]] ]
-; CHECK-NEXT: [[DEAD_LCSSA:%.*]] = phi double [ [[ADD]], %[[OUTERLOOP_LATCH]] ]
+; CHECK-NEXT: [[LCSSA:%.*]] = phi double [ [[ADD]], %[[OUTERLOOP_LATCH]] ]
; CHECK-NEXT: [[J_NEXT]] = add nuw nsw i64 [[INDEX_J]], 1
-; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i64 [[J_NEXT]], [[N]]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i64 [[J_NEXT]], 100
; CHECK-NEXT: br i1 [[CMP1]], label %[[EXIT_LOOPEXIT:.*]], label %[[INNERLOOP]]
; CHECK: [[OUTERLOOP_LATCH]]:
; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[INDEX_I]], 1
-; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i64 [[I_NEXT]], [[N]]
+; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i64 [[I_NEXT]], 100
; CHECK-NEXT: br i1 [[CMP2]], label %[[INNERLOOP_SPLIT]], label %[[OUTERLOOP_HEADER]]
; CHECK: [[EXIT_LOOPEXIT]]:
-; CHECK-NEXT: br label %[[EXIT]]
-; CHECK: [[EXIT]]:
; CHECK-NEXT: ret void
;
entry:
- %cmp = icmp sgt i64 %n, 0
- br i1 %cmp, label %outerloop_header, label %exit
+ br label %outerloop_header
outerloop_header:
%index_i = phi i64 [ 0, %entry ], [ %index_i.next, %outerloop_latch ]
@@ -72,21 +68,21 @@ outerloop_header:
innerloop:
%index_j = phi i64 [ 0, %outerloop_header ], [ %index_j.next, %innerloop ]
%reduction = phi double [ 0.000000e+00, %outerloop_header ], [ %add, %innerloop ]
- %addr_a_j_i = getelementptr inbounds nuw double, ptr %invariant.gep.us, i64 %index_j
+ %addr_a_j_i = getelementptr inbounds nuw [100 x double], ptr %invariant.gep.us, i64 %index_j
%0 = load double, ptr %addr_a_j_i, align 8
- %addr_b_j_i = getelementptr inbounds nuw double, ptr %invariant.gep32.us, i64 %index_j
+ %addr_b_j_i = getelementptr inbounds nuw [100 x double], ptr %invariant.gep32.us, i64 %index_j
%1 = load double, ptr %addr_b_j_i, align 8
%mul = fmul fast double %1, %0
%add = fadd fast double %mul, %reduction
%index_j.next = add nuw nsw i64 %index_j, 1
- %cond1 = icmp eq i64 %index_j.next, %n
+ %cond1 = icmp eq i64 %index_j.next, 100
br i1 %cond1, label %outerloop_latch, label %innerloop
outerloop_latch:
%lcssa = phi double [ %add, %innerloop ]
store double %lcssa, ptr %addr_s, align 8
%index_i.next = add nuw nsw i64 %index_i, 1
- %cond2 = icmp eq i64 %index_i.next, %n
+ %cond2 = icmp eq i64 %index_i.next, 100
br i1 %cond2, label %exit, label %outerloop_header
exit:
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