[llvm] [PowerPC] Refactor immediate operand definitions (PR #179983)
Lei Huang via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 19 07:09:56 PST 2026
================
@@ -0,0 +1,215 @@
+//===-- PPCOperands.td - PowerPC instruction operands -------*- tablegen -*-==//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines PowerPC instruction operands, including immediate
+// operands and addressing modes.
+//
+//===----------------------------------------------------------------------===//
+
+//===----------------------------------------------------------------------===//
+// Immediate operand base classes
+//===----------------------------------------------------------------------===//
+
+// Base class for immediate AsmOperandClass definitions.
+class ImmediateAsmOperand<string predicate, string render="addImmOperands">
+: AsmOperandClass {
+ let Name = NAME;
+ let PredicateMethod = predicate;
+ let RenderMethod = render;
+}
+
+// Base class for immediate operands with optional encoder.
+class ImmediateOp<ValueType vt, string asmop, int width, bit is_signed = 0,
+ string encoder = "", string decoder = ""> : Operand<vt> {
+ let PrintMethod = "print"#asmop#"Operand";
+ let ParserMatchClass = !cast<AsmOperandClass>(asmop);
+ let OperandType = "OPERAND_IMMEDIATE";
+
+ // Set decoder method based on signedness if not explicitly provided
+ let DecoderMethod = !if(!eq(decoder, ""),
+ !if(is_signed,
+ "decodeSImmOperand<"#width#">",
+ "decodeUImmOperand<"#width#">"),
+ decoder);
+
+ // Set encoder method if provided
+ let EncoderMethod = !if(!eq(encoder, ""),
+ "",
+ "getImmEncoding<" # encoder # ">");
+}
+
+//===----------------------------------------------------------------------===//
+// Multiclasses for complete immediate definitions
+// (AsmOperand + Operand + ImmLeaf).
+//===----------------------------------------------------------------------===//
+
+// Helper multiclass that generates operand + patterns together while keeping
+// them as separate definitions for GlobalISel compatibility.
+multiclass ImmOpWithPatterns<ValueType vt, string asmop, int width,
+ bit is_signed, code pred, SDNodeXForm xform,
+ string encoder = ""> {
+ // Operand definition (for instruction operands)
+ def "" : ImmediateOp<vt, asmop, width, is_signed, encoder>;
+
+ // ImmLeaf for imm nodes (for DAG pattern matching)
+ def _pat : ImmLeaf<vt, pred, xform>;
----------------
lei137 wrote:
Yes, not all `_pat` will be used. It's generated by default for all for consistency.
https://github.com/llvm/llvm-project/pull/179983
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