[llvm] [AArch64] Prefer SVE2 for fixed-length i64 [S|U][MIN|MAX] reductions (PR #181161)

[Sander de Smalen via llvm-commits]

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@@ -17337,9 +17350,33 @@ SDValue AArch64TargetLowering::LowerVECREDUCE(SDValue Op,
                       Op.getOpcode() == ISD::VECREDUCE_FADD ||
                       (Op.getOpcode() != ISD::VECREDUCE_ADD &&
                        SrcVT.getVectorElementType() == MVT::i64);
-  if (SrcVT.isScalableVector() ||
-      useSVEForFixedLengthVectorVT(
-          SrcVT, OverrideNEON && Subtarget->useSVEForFixedLengthVectors())) {
+
+  bool UsesSVEForFixedLengthVT = useSVEForFixedLengthVectorVT(
+      SrcVT, OverrideNEON && Subtarget->useSVEForFixedLengthVectors());
+
+  // Always lower try to lower v2i64 pairwise operations (as NEON does not
+  // natively support reductions on these types). Try lowering any v2<ty> vector
+  // to pairwise operations when using SVE for fixed-length VTs, as the pairwise
+  // operations are likely to be cheaper than a full reduction.
+  bool TryPairwiseOps = SrcVT == MVT::v2i64 || (UsesSVEForFixedLengthVT &&
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sdesmalen-arm wrote:

Should the checks for the availability of SVE2/StreamingSVE be moved here? (otherwise, TryPairwiseOps might be true even if the target doesn't have them)

https://github.com/llvm/llvm-project/pull/181161