[llvm] [AArch64] optimize lowering for icmp on i128 when RHS is an immediate (PR #181822)

[Cheng Lingfei via llvm-commits]

clingfei wrote:

Hi, @Kmeakin. 
I optimized the above-mentioned cases based on the examples you provided. I think it's difficult to optimize `sgt` and `sge` in the same way because there are three high-order cases to distinguish: `hi < 0`, `hi == 0`, and `hi > 0`. How do you think about it?


https://github.com/llvm/llvm-project/pull/181822