[llvm] [AArch64] optimize vselect of bitcast (PR #180375)

[David Green via llvm-commits]

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@@ -27330,6 +27419,24 @@ static SDValue performVSelectCombine(SDNode *N, SelectionDAG &DAG) {
     }
   }
 
+  const TargetLowering &TLI = DAG.getTargetLoweringInfo();
+
+  // Attempt to convert a (vXi1 bitcast(iX N0)) selection mask before it might
+  // get split by legalization.
+  if (N0.getOpcode() == ISD::BITCAST && CCVT.isVector() &&
+      CCVT.getVectorElementType() == MVT::i1 &&
+      TLI.isTypeLegal(ResVT.getScalarType())) {
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davemgreen wrote:

Does this limit it to i32 and i64 vectors? It would be good to support other sizes too.

https://github.com/llvm/llvm-project/pull/180375