[llvm] [X86] combineSetCC - pull out repeated getTargetLoweringInfo calls. NFC. (PR #181873)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 17 09:54:58 PST 2026
https://github.com/RKSimon created https://github.com/llvm/llvm-project/pull/181873
None
>From e9ee605f8d0c1e529284c2f822ffcd281e34a398 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: Tue, 17 Feb 2026 17:54:13 +0000
Subject: [PATCH] [X86] combineSetCC - pull out repeated getTargetLoweringInfo
calls. NFC.
---
llvm/lib/Target/X86/X86ISelLowering.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 73a8e93e9f2ac..e409f5a170efa 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -57499,6 +57499,7 @@ static SDValue combineSetCC(SDNode *N, SelectionDAG &DAG,
TargetLowering::DAGCombinerInfo &DCI,
const X86Subtarget &Subtarget) {
using namespace SDPatternMatch;
+ const TargetLowering &TLI = DAG.getTargetLoweringInfo();
const ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
const SDValue LHS = N->getOperand(0);
const SDValue RHS = N->getOperand(1);
@@ -57591,7 +57592,6 @@ static SDValue combineSetCC(SDNode *N, SelectionDAG &DAG,
EVT SrcVT = LHS.getOperand(0).getValueType();
APInt UpperBits = APInt::getBitsSetFrom(SrcVT.getScalarSizeInBits(),
OpVT.getScalarSizeInBits());
- const TargetLowering &TLI = DAG.getTargetLoweringInfo();
if (DAG.MaskedValueIsZero(LHS.getOperand(0), UpperBits) &&
TLI.isTypeLegal(LHS.getOperand(0).getValueType()))
return DAG.getSetCC(DL, VT, LHS.getOperand(0),
@@ -57773,7 +57773,7 @@ static SDValue combineSetCC(SDNode *N, SelectionDAG &DAG,
// current form has a slight latency cost, but it probably worth saving a
// constant.
if (ISD::isConstantSplatVectorAllOnes(AddC.getNode()) &&
- DAG.getTargetLoweringInfo().isOperationLegal(ISD::UMIN, OpVT)) {
+ TLI.isOperationLegal(ISD::UMIN, OpVT)) {
// Pass
}
// Normal Cases
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