[llvm] [SPIRV] Fix printf regression after #178980 (PR #182423)
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Thu Feb 19 19:10:32 PST 2026
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-transforms
Author: Sang Ik Lee (silee2)
<details>
<summary>Changes</summary>
printf function is treated in a special way by SPIRV backend. It lowers to an SPIRV extension op instead of a function call. As such, printf should not be handled in the same way as general expand variadics. This PR restores filtering capability removed by #<!-- -->178980 in a more precise way to avoid false positives.
First, target triple is checked if it SPIR-V and then checks against more precise set of mangled names.
---
Full diff: https://github.com/llvm/llvm-project/pull/182423.diff
2 Files Affected:
- (modified) llvm/lib/Transforms/IPO/ExpandVariadics.cpp (+34)
- (modified) llvm/test/CodeGen/SPIRV/printf.ll (+17-19)
``````````diff
diff --git a/llvm/lib/Transforms/IPO/ExpandVariadics.cpp b/llvm/lib/Transforms/IPO/ExpandVariadics.cpp
index 97b95cce2a407..a1b7537182f9b 100644
--- a/llvm/lib/Transforms/IPO/ExpandVariadics.cpp
+++ b/llvm/lib/Transforms/IPO/ExpandVariadics.cpp
@@ -125,6 +125,9 @@ class VariadicABIInfo {
};
virtual VAArgSlotInfo slotInfo(const DataLayout &DL, Type *Parameter) = 0;
+ // Per-target overrides of special symbols.
+ virtual bool ignoreFunction(Function *F) { return false; }
+
// Targets implemented so far all have the same trivial lowering for these
bool vaEndIsNop() { return true; }
bool vaCopyIsMemcpy() { return true; }
@@ -242,6 +245,9 @@ class ExpandVariadics : public ModulePass {
F->hasFnAttribute(Attribute::Naked))
return false;
+ if (ABI->ignoreFunction(F))
+ return false;
+
if (!isValidCallingConv(F))
return false;
@@ -627,6 +633,9 @@ bool ExpandVariadics::expandCall(Module &M, IRBuilder<> &Builder, CallBase *CB,
bool Changed = false;
const DataLayout &DL = M.getDataLayout();
+ if (ABI->ignoreFunction(CB->getCalledFunction()))
+ return Changed;
+
if (!expansionApplicableToFunctionCall(CB)) {
if (rewriteABI())
report_fatal_error("Cannot lower callbase instruction");
@@ -984,6 +993,31 @@ struct SPIRV final : public VariadicABIInfo {
return {A, false};
}
+ // The SPIR-V backend has special handling for SPIR-V mangled printf
+ // functions.
+ // printf can be mangled in two ways with itanium mangling,
+ // either as a normal printf or with an additional __spirv_ocl_ prefix.
+ // For example:
+ // _Z6printfPU3AS2Kcz
+ // _Z18__spirv_ocl_printfPU3AS2Kcz
+ // Ignore those functions if target is SPIR-V
+ bool ignoreFunction(Function *F) override {
+ Module *M = F->getParent();
+ const Triple &T = M->getTargetTriple();
+ if (!T.isSPIRV())
+ return false;
+
+ size_t len = F->getName().str().length();
+ if (len == 18) {
+ return F->getName().starts_with("_Z6printfPU3AS") &&
+ F->getName().ends_with("Kcz");
+ } else if (len == 31) {
+ return F->getName().starts_with("_Z18__spirv_ocl_printfPU3AS") &&
+ F->getName().ends_with("Kcz");
+ }
+ return false;
+ }
+
// We will likely see va intrinsics in the generic addrspace (4).
SmallVector<unsigned> getTargetSpecificVaIntrinAddrSpaces() const override {
return {4};
diff --git a/llvm/test/CodeGen/SPIRV/printf.ll b/llvm/test/CodeGen/SPIRV/printf.ll
index f2747901c54e0..483fc1f244e57 100644
--- a/llvm/test/CodeGen/SPIRV/printf.ll
+++ b/llvm/test/CodeGen/SPIRV/printf.ll
@@ -6,35 +6,33 @@
; CHECK: %[[#ExtImport:]] = OpExtInstImport "OpenCL.std"
; CHECK: %[[#Char:]] = OpTypeInt 8 0
-; CHECK: %[[#ConstCharPtr:]] = OpTypePointer UniformConstant %[[#Char]]
-; CHECK: %[[#VarargStruct:]] = OpTypeStruct %[[#Char]]
-; CHECK: %[[#VarargStructPtr:]] = OpTypePointer Function %[[#VarargStruct]]
-; CHECK: %[[#CharPtr:]] = OpTypePointer Function %[[#Char]]
-; CHECK: %[[#IntConst:]] = OpConstant %[[#Char]] 97
+; CHECK: %[[#CharPtr:]] = OpTypePointer UniformConstant %[[#Char]]
; CHECK: %[[#GV:]] = OpVariable %[[#]] UniformConstant %[[#]]
; CHECK: OpFunction
-; CHECK: %[[#Arg:]] = OpFunctionParameter
-; CHECK: %[[#VarargBuffer1:]] = OpVariable %[[#VarargStructPtr]] Function
-; CHECK: %[[#VarargBuffer2:]] = OpVariable %[[#VarargStructPtr]] Function
-; CHECK: %[[#CastedBuffer1:]] = OpBitcast %[[#CharPtr]] %[[#VarargBuffer1]]
-; CHECK: %[[#GEP1:]] = OpInBoundsPtrAccessChain %[[#CharPtr]] %[[#VarargBuffer1]]
-; CHECK: OpStore %[[#GEP1]] %[[#IntConst]] Aligned 1
-; CHECK: %[[#CastedGV:]] = OpBitcast %[[#ConstCharPtr]] %[[#GV]]
-; CHECK: OpExtInst %[[#]] %[[#ExtImport]] printf %[[#CastedGV]] %[[#CastedBuffer1:]]
-; CHECK: %[[#CastedBuffer2:]] = OpBitcast %[[#CharPtr]] %[[#VarargBuffer2]]
-; CHECK: %[[#GEP2:]] = OpInBoundsPtrAccessChain %[[#CharPtr]] %[[#VarargBuffer2]]
-; CHECK: OpStore %[[#GEP2]] %[[#IntConst]] Aligned 1
-; CHECK: OpExtInst %[[#]] %[[#ExtImport]] printf %[[#Arg]] %[[#CastedBuffer2:]]
+; CHECK: %[[#Arg1:]] = OpFunctionParameter
+; CHECK: %[[#Arg2:]] = OpFunctionParameter
+; CHECK: %[[#CastedGV:]] = OpBitcast %[[#CharPtr]] %[[#GV]]
+; CHECK-NEXT: OpExtInst %[[#]] %[[#ExtImport]] printf %[[#CastedGV]] %[[#ArgConst:]]
+; CHECK-NEXT: OpExtInst %[[#]] %[[#ExtImport]] printf %[[#CastedGV]] %[[#ArgConst]]
+; CHECK-NEXT: OpExtInst %[[#]] %[[#ExtImport]] printf %[[#Arg1]] %[[#ArgConst:]]
+; CHECK-NEXT: OpExtInst %[[#]] %[[#ExtImport]] printf %[[#Arg1]] %[[#ArgConst]]
+; CHECK-NEXT: %[[#CastedArg2:]] = OpBitcast %[[#CharPtr]] %[[#Arg2]]
+; CHECK-NEXT: OpExtInst %[[#]] %[[#ExtImport]] printf %[[#CastedArg2]] %[[#ArgConst]]
+; CHECK-NEXT: OpExtInst %[[#]] %[[#ExtImport]] printf %[[#CastedArg2]] %[[#ArgConst]]
; CHECK: OpFunctionEnd
%struct = type { [6 x i8] }
@FmtStr = internal addrspace(2) constant [6 x i8] c"c=%c\0A\00", align 1
-define spir_kernel void @foo(ptr addrspace(2) %_arg_fmt) {
+define spir_kernel void @foo(ptr addrspace(2) %_arg_fmt1, ptr addrspace(2) byval(%struct) %_arg_fmt2) {
entry:
%r1 = tail call spir_func i32 (ptr addrspace(2), ...) @_Z6printfPU3AS2Kcz(ptr addrspace(2) @FmtStr, i8 signext 97)
- %r2 = tail call spir_func i32 (ptr addrspace(2), ...) @_Z18__spirv_ocl_printfPU3AS2Kcz(ptr addrspace(2) %_arg_fmt, i8 signext 97)
+ %r2 = tail call spir_func i32 (ptr addrspace(2), ...) @_Z18__spirv_ocl_printfPU3AS2Kcz(ptr addrspace(2) @FmtStr, i8 signext 97)
+ %r3 = tail call spir_func i32 (ptr addrspace(2), ...) @_Z6printfPU3AS2Kcz(ptr addrspace(2) %_arg_fmt1, i8 signext 97)
+ %r4 = tail call spir_func i32 (ptr addrspace(2), ...) @_Z18__spirv_ocl_printfPU3AS2Kcz(ptr addrspace(2) %_arg_fmt1, i8 signext 97)
+ %r5 = tail call spir_func i32 (ptr addrspace(2), ...) @_Z6printfPU3AS2Kcz(ptr addrspace(2) %_arg_fmt2, i8 signext 97)
+ %r6 = tail call spir_func i32 (ptr addrspace(2), ...) @_Z18__spirv_ocl_printfPU3AS2Kcz(ptr addrspace(2) %_arg_fmt2, i8 signext 97)
ret void
}
``````````
</details>
https://github.com/llvm/llvm-project/pull/182423
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