[llvm] 4973c9b - [AArch64][llvm] Remove +cmh gating (#181662)
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Mon Feb 16 13:20:11 PST 2026
Author: Jonathan Thackray
Date: 2026-02-16T21:20:05Z
New Revision: 4973c9b90ec673e10feaef65bce8b667c4903624
URL: https://github.com/llvm/llvm-project/commit/4973c9b90ec673e10feaef65bce8b667c4903624
DIFF: https://github.com/llvm/llvm-project/commit/4973c9b90ec673e10feaef65bce8b667c4903624.diff
LOG: [AArch64][llvm] Remove +cmh gating (#181662)
Remove gating of `shuh` and `stcph` since these are instructions from
the HINT space, and therefore is a NOP on cores that don't implement it,
so gating is superfluous. gcc doesn't gate these, so remove for better
compatibility.
Added:
Modified:
clang/test/Driver/aarch64-v97a.c
clang/test/Driver/print-supported-extensions-aarch64.c
llvm/lib/Target/AArch64/AArch64Features.td
llvm/lib/Target/AArch64/AArch64InstrInfo.td
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/test/MC/AArch64/armv9.7a-memsys.s
llvm/unittests/TargetParser/TargetParserTest.cpp
Removed:
################################################################################
diff --git a/clang/test/Driver/aarch64-v97a.c b/clang/test/Driver/aarch64-v97a.c
index 1e54e6bbe3ecc..04252a0ddc603 100644
--- a/clang/test/Driver/aarch64-v97a.c
+++ b/clang/test/Driver/aarch64-v97a.c
@@ -34,10 +34,6 @@
// RUN: %clang -target aarch64 -march=armv9.7-a+f16mm -### -c %s 2>&1 | FileCheck -check-prefix=V97A-F16MM %s
// V97A-F16MM: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.7a"{{.*}} "-target-feature" "+f16mm"
-// RUN: %clang -target aarch64 -march=armv9.7a+cmh -### -c %s 2>&1 | FileCheck -check-prefix=V97A-CMH %s
-// RUN: %clang -target aarch64 -march=armv9.7-a+cmh -### -c %s 2>&1 | FileCheck -check-prefix=V97A-CMH %s
-// V97A-CMH: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.7a"{{.*}} "-target-feature" "+cmh"
-
// RUN: %clang -target aarch64 -march=armv9.7a+lscp -### -c %s 2>&1 | FileCheck -check-prefix=V97A-LSCP %s
// RUN: %clang -target aarch64 -march=armv9.7-a+lscp -### -c %s 2>&1 | FileCheck -check-prefix=V97A-LSCP %s
// V97A-LSCP: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.7a"{{.*}} "-target-feature" "+lscp"
diff --git a/clang/test/Driver/print-supported-extensions-aarch64.c b/clang/test/Driver/print-supported-extensions-aarch64.c
index 7a6c628cd7238..33e26d3c25e02 100644
--- a/clang/test/Driver/print-supported-extensions-aarch64.c
+++ b/clang/test/Driver/print-supported-extensions-aarch64.c
@@ -9,7 +9,6 @@
// CHECK-NEXT: brbe FEAT_BRBE Enable Branch Record Buffer Extension
// CHECK-NEXT: bti FEAT_BTI Enable Branch Target Identification
// CHECK-NEXT: btie FEAT_BTIE Enable Enhanced Branch Target Identification extension
-// CHECK-NEXT: cmh FEAT_CMH Enable Armv9.7-A Contention Management Hints
// CHECK-NEXT: cmpbr FEAT_CMPBR Enable Armv9.6-A base compare and branch instructions
// CHECK-NEXT: fcma FEAT_FCMA Enable Armv8.3-A Floating-point complex number support
// CHECK-NEXT: cpa FEAT_CPA Enable Armv9.5-A Checked Pointer Arithmetic
diff --git a/llvm/lib/Target/AArch64/AArch64Features.td b/llvm/lib/Target/AArch64/AArch64Features.td
index eafdd105339ae..faee640a910d0 100644
--- a/llvm/lib/Target/AArch64/AArch64Features.td
+++ b/llvm/lib/Target/AArch64/AArch64Features.td
@@ -583,8 +583,6 @@ def FeatureSSVE_FEXPA : ExtensionWithMArch<"ssve-fexpa", "SSVE_FEXPA", "FEAT_SSV
// Armv9.7 Architecture Extensions
//===----------------------------------------------------------------------===//
-def FeatureCMH : ExtensionWithMArch<"cmh", "CMH", "FEAT_CMH",
- "Enable Armv9.7-A Contention Management Hints">;
def FeatureLSCP : ExtensionWithMArch<"lscp", "LSCP", "FEAT_LSCP",
"Enable Armv9.7-A Load-acquire and store-release pair extension">;
diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
index 9fb23d642f29f..0979122fdb9c7 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
@@ -219,8 +219,6 @@ def HasLSUI : Predicate<"Subtarget->hasLSUI()">,
AssemblerPredicateWithAll<(all_of FeatureLSUI), "lsui">;
def HasOCCMO : Predicate<"Subtarget->hasOCCMO()">,
AssemblerPredicateWithAll<(all_of FeatureOCCMO), "occmo">;
-def HasCMH : Predicate<"Subtarget->hasCMH()">,
- AssemblerPredicateWithAll<(all_of FeatureCMH), "cmh">;
def HasLSCP : Predicate<"Subtarget->hasLSCP()">,
AssemblerPredicateWithAll<(all_of FeatureLSCP), "lscp">;
def HasSVE2p2 : Predicate<"Subtarget->hasSVE2p2()">,
@@ -11797,10 +11795,8 @@ let Uses = [FPMR, FPCR] in
// Contention Management Hints (FEAT_CMH)
//===----------------------------------------------------------------------===//
-let Predicates = [HasCMH] in {
- defm SHUH : SHUH<"shuh">; // Shared Update Hint instruction
- def STCPH : STCPHInst<"stcph">; // Store Concurrent Priority Hint instruction
-}
+defm SHUH : SHUH<"shuh">; // Shared Update Hint instruction
+def STCPH : STCPHInst<"stcph">; // Store Concurrent Priority Hint instruction
//===----------------------------------------------------------------------===//
// Permission Overlays Extension 2 (FEAT_S1POE2)
diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index 12e0e4dc7ddf8..e513dcb77d0d1 100644
--- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -3937,7 +3937,6 @@ static const struct Extension {
{"ssve-bitperm", {AArch64::FeatureSSVE_BitPerm}},
{"sme-mop4", {AArch64::FeatureSME_MOP4}},
{"sme-tmop", {AArch64::FeatureSME_TMOP}},
- {"cmh", {AArch64::FeatureCMH}},
{"lscp", {AArch64::FeatureLSCP}},
{"tlbid", {AArch64::FeatureTLBID}},
{"mpamv2", {AArch64::FeatureMPAMv2}},
diff --git a/llvm/test/MC/AArch64/armv9.7a-memsys.s b/llvm/test/MC/AArch64/armv9.7a-memsys.s
index 228c71ef6e5c5..ce3ac9bc7e8ee 100644
--- a/llvm/test/MC/AArch64/armv9.7a-memsys.s
+++ b/llvm/test/MC/AArch64/armv9.7a-memsys.s
@@ -1,15 +1,15 @@
-// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+cmh,+lscp < %s \
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+lscp < %s \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
-// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+cmh,+lscp < %s \
-// RUN: | llvm-objdump -d --mattr=+cmh,+lscp --no-print-imm-hex - | FileCheck %s --check-prefix=CHECK-INST
-// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+cmh,+lscp < %s \
-// RUN: | llvm-objdump -d --mattr=-cmh,-lscp --no-print-imm-hex - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+lscp < %s \
+// RUN: | llvm-objdump -d --mattr=+lscp --no-print-imm-hex - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+lscp < %s \
+// RUN: | llvm-objdump -d --mattr=-lscp --no-print-imm-hex - | FileCheck %s --check-prefix=CHECK-UNKNOWN
// Disassemble encoding and check the re-encoding (-show-encoding) matches.
-// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+cmh,+lscp < %s \
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+lscp < %s \
// RUN: | sed '/.text/d' | sed 's/.*encoding: //g' \
-// RUN: | llvm-mc -triple=aarch64 -mattr=+cmh,+lscp -disassemble -show-encoding \
+// RUN: | llvm-mc -triple=aarch64 -mattr=+lscp -disassemble -show-encoding \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
// Armv9.7-A Contention Management Hints (FEAT_CMH).
@@ -17,20 +17,14 @@
shuh
// CHECK-INST: shuh
// CHECK-ENCODING: encoding: [0x5f,0x26,0x03,0xd5]
-// CHECK-ERROR: error: instruction requires: cmh
-// CHECK-UNKNOWN: d503265f hint #50
shuh ph
// CHECK-INST: shuh ph
// CHECK-ENCODING: encoding: [0x7f,0x26,0x03,0xd5]
-// CHECK-ERROR: error: instruction requires: cmh
-// CHECK-UNKNOWN: d503267f hint #51
stcph
// CHECK-INST: stcph
// CHECK-ENCODING: [0x9f,0x26,0x03,0xd5]
-// CHECK-ERROR: error: instruction requires: cmh
-// CHECK-UNKNOWN: d503269f hint #52
ldap x0, x1, [x2]
// CHECK-INST: ldap x0, x1, [x2]
diff --git a/llvm/unittests/TargetParser/TargetParserTest.cpp b/llvm/unittests/TargetParser/TargetParserTest.cpp
index 327af9c53157e..8cd6cda9a1ed9 100644
--- a/llvm/unittests/TargetParser/TargetParserTest.cpp
+++ b/llvm/unittests/TargetParser/TargetParserTest.cpp
@@ -1451,7 +1451,6 @@ TEST(TargetParserTest, AArch64ExtensionFeatures) {
AArch64::AEK_SVEAES, AArch64::AEK_SME_MOP4,
AArch64::AEK_SME_TMOP, AArch64::AEK_SVEBITPERM,
AArch64::AEK_SSVE_BITPERM, AArch64::AEK_SVESHA3,
- AArch64::AEK_SVESM4, AArch64::AEK_CMH,
AArch64::AEK_LSCP, AArch64::AEK_TLBID,
AArch64::AEK_MPAMV2, AArch64::AEK_MTETC,
AArch64::AEK_GCIE, AArch64::AEK_SME2P3,
@@ -1460,7 +1459,7 @@ TEST(TargetParserTest, AArch64ExtensionFeatures) {
AArch64::AEK_F16F32MM, AArch64::AEK_MOPS_GO,
AArch64::AEK_POE2, AArch64::AEK_TEV,
AArch64::AEK_BTIE, AArch64::AEK_F64MM,
- AArch64::AEK_POPS,
+ AArch64::AEK_POPS, AArch64::AEK_SVESM4,
};
std::vector<StringRef> Features;
@@ -1570,7 +1569,6 @@ TEST(TargetParserTest, AArch64ExtensionFeatures) {
EXPECT_TRUE(llvm::is_contained(Features, "+pops"));
EXPECT_TRUE(llvm::is_contained(Features, "+sme-mop4"));
EXPECT_TRUE(llvm::is_contained(Features, "+sme-tmop"));
- EXPECT_TRUE(llvm::is_contained(Features, "+cmh"));
EXPECT_TRUE(llvm::is_contained(Features, "+lscp"));
EXPECT_TRUE(llvm::is_contained(Features, "+tlbid"));
EXPECT_TRUE(llvm::is_contained(Features, "+mpamv2"));
@@ -1750,7 +1748,6 @@ TEST(TargetParserTest, AArch64ArchExtFeature) {
{"pops", "nopops", "+pops", "-pops"},
{"sme-mop4", "nosme-mop4", "+sme-mop4", "-sme-mop4"},
{"sme-tmop", "nosme-tmop", "+sme-tmop", "-sme-tmop"},
- {"cmh", "nocmh", "+cmh", "-cmh"},
{"lscp", "nolscp", "+lscp", "-lscp"},
{"tlbid", "notlbid", "+tlbid", "-tlbid"},
{"mpamv2", "nompamv2", "+mpamv2", "-mpamv2"},
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