[llvm] [RISCV] Cost UDIV/UREM by a constant power of 2 as a SHL/AND in getArithmeticInstrCost() (PR #179570)

[Simon Pilgrim via llvm-commits]

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@@ -1054,6 +1054,24 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
       TTI::OperandValueInfo Opd2Info = {TTI::OK_AnyValue, TTI::OP_None},
       ArrayRef<const Value *> Args = {},
       const Instruction *CxtI = nullptr) const override {
+
+    // Vector unsigned division/remainder will be simplified to shifts/masks.
+    if ((Opcode == Instruction::UDiv || Opcode == Instruction::URem) &&
+        Opd2Info.isConstant() && Opd2Info.isPowerOf2())
+      return getArithmeticInstrCost(
+          Opcode == Instruction::UDiv ? Instruction::LShr : Instruction::And,
+          Ty, CostKind, Opd1Info.getNoProps(), Opd2Info.getNoProps());
+
+    return getArithmeticInstrCostImpl(Opcode, Ty, CostKind, Opd1Info, Opd2Info,
+                                      Args, CxtI);
+  }
+
+  virtual InstructionCost getArithmeticInstrCostImpl(
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RKSimon wrote:

TTI's weird mixture of overrides and crtp is confusing enough without adding wrappers like this - why can't you just put this in riscv like we did for x86? Alternatively add an (opt-in) helper like we have with improveShuffleKindFromMask

https://github.com/llvm/llvm-project/pull/179570