[llvm] [NVPTX] Support intrinsics for shared memory special registers (PR #182354)

Durgadoss R via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 20 01:16:04 PST 2026


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@@ -4926,6 +4926,28 @@ def INT_PTX_SREG_PM1 : PTX_READ_SREG_R32<"pm1", int_nvvm_read_ptx_sreg_pm1>;
 def INT_PTX_SREG_PM2 : PTX_READ_SREG_R32<"pm2", int_nvvm_read_ptx_sreg_pm2>;
 def INT_PTX_SREG_PM3 : PTX_READ_SREG_R32<"pm3", int_nvvm_read_ptx_sreg_pm3>;
 
+// Reserved shared memory special register reads
+def INT_PTX_SREG_RESERVED_SMEM_OFFSET_BEGIN :
+    PTX_READ_SREG_R32<"reserved_smem_offset_begin",
+                      int_nvvm_read_ptx_sreg_reserved_smem_offset_begin,
+                      [hasPTX<76>, hasSM<80>]>;
+def INT_PTX_SREG_RESERVED_SMEM_OFFSET_END :
+    PTX_READ_SREG_R32<"reserved_smem_offset_end",
+                      int_nvvm_read_ptx_sreg_reserved_smem_offset_end,
+                      [hasPTX<76>, hasSM<80>]>;
+def INT_PTX_SREG_RESERVED_SMEM_OFFSET_CAP :
+    PTX_READ_SREG_R32<"reserved_smem_offset_cap",
+                      int_nvvm_read_ptx_sreg_reserved_smem_offset_cap,
+                      [hasPTX<76>, hasSM<80>]>;
+def INT_PTX_SREG_RESERVED_SMEM_OFFSET_0 :
+    PTX_READ_SREG_R32<"reserved_smem_offset_0",
+                      int_nvvm_read_ptx_sreg_reserved_smem_offset_0,
+                      [hasPTX<76>, hasSM<80>]>;
+def INT_PTX_SREG_RESERVED_SMEM_OFFSET_1 :
+    PTX_READ_SREG_R32<"reserved_smem_offset_1",
+                      int_nvvm_read_ptx_sreg_reserved_smem_offset_1,
+                      [hasPTX<76>, hasSM<80>]>;
----------------
durga4github wrote:

nit:
Since the predicates are also same, maybe there is a way to do it with a loop running over the suffixes


https://github.com/llvm/llvm-project/pull/182354


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