[llvm] Third Connex patch (#3) (PR #181711)
via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 16 09:56:38 PST 2026
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-ir
Author: None (alexsusu)
<details>
<summary>Changes</summary>
Committing all the files of the Connex back end (all files found in the folder llvm/lib/Target/Connex).
---
Patch is 2.36 MiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/181711.diff
75 Files Affected:
- (modified) llvm/CMakeLists.txt (+1)
- (modified) llvm/Maintainers.md (+5)
- (modified) llvm/include/llvm/IR/CMakeLists.txt (+1)
- (modified) llvm/include/llvm/IR/Intrinsics.td (+1)
- (added) llvm/include/llvm/IR/IntrinsicsConnex.td (+106)
- (modified) llvm/include/llvm/TargetParser/Triple.h (+1)
- (modified) llvm/lib/IR/Intrinsics.cpp (+1)
- (added) llvm/lib/Target/Connex/CMakeLists.txt (+53)
- (added) llvm/lib/Target/Connex/Connex.h (+41)
- (added) llvm/lib/Target/Connex/Connex.td (+66)
- (added) llvm/lib/Target/Connex/ConnexAsmPrinter.cpp (+1223)
- (added) llvm/lib/Target/Connex/ConnexAsmPrinterLoopNests.h (+131)
- (added) llvm/lib/Target/Connex/ConnexCallingConv.td (+33)
- (added) llvm/lib/Target/Connex/ConnexConfig.h (+101)
- (added) llvm/lib/Target/Connex/ConnexFrameLowering.cpp (+41)
- (added) llvm/lib/Target/Connex/ConnexFrameLowering.h (+43)
- (added) llvm/lib/Target/Connex/ConnexHazardRecognizer.cpp (+296)
- (added) llvm/lib/Target/Connex/ConnexHazardRecognizer.h (+55)
- (added) llvm/lib/Target/Connex/ConnexISelDAGToDAG.cpp (+4524)
- (added) llvm/lib/Target/Connex/ConnexISelLowering.cpp (+3274)
- (added) llvm/lib/Target/Connex/ConnexISelLowering.h (+209)
- (added) llvm/lib/Target/Connex/ConnexISelMisc.h (+18)
- (added) llvm/lib/Target/Connex/ConnexInstrFormats.td (+840)
- (added) llvm/lib/Target/Connex/ConnexInstrInfo.cpp (+860)
- (added) llvm/lib/Target/Connex/ConnexInstrInfo.h (+102)
- (added) llvm/lib/Target/Connex/ConnexInstrInfo.td (+22)
- (added) llvm/lib/Target/Connex/ConnexInstrInfoScalar.td (+659)
- (added) llvm/lib/Target/Connex/ConnexInstrInfoVec.td (+1294)
- (added) llvm/lib/Target/Connex/ConnexInstrInfoVecVsplat.td (+506)
- (added) llvm/lib/Target/Connex/ConnexMCInstLower.cpp (+123)
- (added) llvm/lib/Target/Connex/ConnexMCInstLower.h (+44)
- (added) llvm/lib/Target/Connex/ConnexRegisterInfo.cpp (+160)
- (added) llvm/lib/Target/Connex/ConnexRegisterInfo.h (+77)
- (added) llvm/lib/Target/Connex/ConnexRegisterInfo.td (+261)
- (added) llvm/lib/Target/Connex/ConnexSchedule.td (+10)
- (added) llvm/lib/Target/Connex/ConnexSelectionDAGInfo.cpp (+118)
- (added) llvm/lib/Target/Connex/ConnexSelectionDAGInfo.h (+56)
- (added) llvm/lib/Target/Connex/ConnexSubtarget.cpp (+42)
- (added) llvm/lib/Target/Connex/ConnexSubtarget.h (+72)
- (added) llvm/lib/Target/Connex/ConnexTargetMachine.cpp (+1533)
- (added) llvm/lib/Target/Connex/ConnexTargetMachine.h (+54)
- (added) llvm/lib/Target/Connex/ConnexTargetTransformInfo.h (+133)
- (added) llvm/lib/Target/Connex/MCTargetDesc/CMakeLists.txt (+15)
- (added) llvm/lib/Target/Connex/MCTargetDesc/ConnexAsmBackend.cpp (+134)
- (added) llvm/lib/Target/Connex/MCTargetDesc/ConnexELFObjectWriter.cpp (+91)
- (added) llvm/lib/Target/Connex/MCTargetDesc/ConnexInstPrinter.cpp (+368)
- (added) llvm/lib/Target/Connex/MCTargetDesc/ConnexInstPrinter.h (+69)
- (added) llvm/lib/Target/Connex/MCTargetDesc/ConnexMCAsmInfo.h (+45)
- (added) llvm/lib/Target/Connex/MCTargetDesc/ConnexMCCodeEmitter.cpp (+182)
- (added) llvm/lib/Target/Connex/MCTargetDesc/ConnexMCFixups.h (+27)
- (added) llvm/lib/Target/Connex/MCTargetDesc/ConnexMCTargetDesc.cpp (+99)
- (added) llvm/lib/Target/Connex/MCTargetDesc/ConnexMCTargetDesc.h (+64)
- (added) llvm/lib/Target/Connex/Misc.h (+143)
- (added) llvm/lib/Target/Connex/RecoverFromLlvmIR.h (+2220)
- (added) llvm/lib/Target/Connex/Select_ABSi32_OpincaaCodeGen.h (+306)
- (added) llvm/lib/Target/Connex/Select_ADDf16_OpincaaCodeGen.h (+3555)
- (added) llvm/lib/Target/Connex/Select_ADDf32_OpincaaCodeGen.h (+6637)
- (added) llvm/lib/Target/Connex/Select_ADDi32_OpincaaCodeGen.h (+189)
- (added) llvm/lib/Target/Connex/Select_DIVf16_OpincaaCodeGen.h (+2909)
- (added) llvm/lib/Target/Connex/Select_DIVi16_OpincaaCodeGen.h (+5741)
- (added) llvm/lib/Target/Connex/Select_LTf16_OpincaaCodeGen.h (+646)
- (added) llvm/lib/Target/Connex/Select_MULTf16_OpincaaCodeGen.h (+3242)
- (added) llvm/lib/Target/Connex/Select_MULTi32_ComplementedRepresentation_OpincaaCodeGen.h (+325)
- (added) llvm/lib/Target/Connex/Select_REDf16_OpincaaCodeGen.h (+1478)
- (added) llvm/lib/Target/Connex/Select_REDi32_OpincaaCodeGen.h (+174)
- (added) llvm/lib/Target/Connex/Select_SHRAi32_OpincaaCodeGen.h (+461)
- (added) llvm/lib/Target/Connex/Select_SUBf16_OpincaaCodeGen.h (+3566)
- (added) llvm/lib/Target/Connex/Select_SUBf32_OpincaaCodeGen.h (+6649)
- (added) llvm/lib/Target/Connex/Select_SUBi32_OpincaaCodeGen.h (+191)
- (added) llvm/lib/Target/Connex/TargetInfo/CMakeLists.txt (+10)
- (added) llvm/lib/Target/Connex/TargetInfo/ConnexTargetInfo.cpp (+29)
- (added) llvm/lib/Target/Connex/TargetInfo/ConnexTargetInfo.h (+22)
- (modified) llvm/lib/TargetParser/TargetDataLayout.cpp (+11)
- (modified) llvm/lib/TargetParser/Triple.cpp (+11)
- (modified) llvm/unittests/TargetParser/TripleTest.cpp (+3)
``````````diff
diff --git a/llvm/CMakeLists.txt b/llvm/CMakeLists.txt
index c450ee5a3d72e..0ea66c5f1df47 100644
--- a/llvm/CMakeLists.txt
+++ b/llvm/CMakeLists.txt
@@ -553,6 +553,7 @@ set(LLVM_ALL_TARGETS
set(LLVM_ALL_EXPERIMENTAL_TARGETS
ARC
CSKY
+ Connex
DirectX
M68k
Xtensa
diff --git a/llvm/Maintainers.md b/llvm/Maintainers.md
index e52259236fc19..47ea371b79977 100644
--- a/llvm/Maintainers.md
+++ b/llvm/Maintainers.md
@@ -238,6 +238,11 @@ eddyz87 at gmail.com (email), [eddyz87](https://github.com/eddyz87) (GitHub)
Zi Xuan Wu (Zeson) \
zixuan.wu at linux.alibaba.com (email), [zixuan-wu](https://github.com/zixuan-wu) (GitHub)
+#### Connex backend
+
+Alex Susu \
+alex.susu at gmail.com (email), [alexsusu](https://github.com/alexsusu) (GitHub)
+
#### DirectX backend
Justin Bogner \
diff --git a/llvm/include/llvm/IR/CMakeLists.txt b/llvm/include/llvm/IR/CMakeLists.txt
index c5c4cc4d21b84..1fe0b93d5f32c 100644
--- a/llvm/include/llvm/IR/CMakeLists.txt
+++ b/llvm/include/llvm/IR/CMakeLists.txt
@@ -11,6 +11,7 @@ tablegen(LLVM IntrinsicsAArch64.h -gen-intrinsic-enums -intrinsic-prefix=aarch64
tablegen(LLVM IntrinsicsAMDGPU.h -gen-intrinsic-enums -intrinsic-prefix=amdgcn)
tablegen(LLVM IntrinsicsARM.h -gen-intrinsic-enums -intrinsic-prefix=arm)
tablegen(LLVM IntrinsicsBPF.h -gen-intrinsic-enums -intrinsic-prefix=bpf)
+tablegen(LLVM IntrinsicsConnex.h -gen-intrinsic-enums -intrinsic-prefix=connex)
tablegen(LLVM IntrinsicsDirectX.h -gen-intrinsic-enums -intrinsic-prefix=dx)
tablegen(LLVM IntrinsicsHexagon.h -gen-intrinsic-enums -intrinsic-prefix=hexagon)
tablegen(LLVM IntrinsicsLoongArch.h -gen-intrinsic-enums -intrinsic-prefix=loongarch)
diff --git a/llvm/include/llvm/IR/Intrinsics.td b/llvm/include/llvm/IR/Intrinsics.td
index 4d59ee8676b9e..c60a1ba676b90 100644
--- a/llvm/include/llvm/IR/Intrinsics.td
+++ b/llvm/include/llvm/IR/Intrinsics.td
@@ -2881,6 +2881,7 @@ include "llvm/IR/IntrinsicsNVVM.td"
include "llvm/IR/IntrinsicsMips.td"
include "llvm/IR/IntrinsicsAMDGPU.td"
include "llvm/IR/IntrinsicsBPF.td"
+include "llvm/IR/IntrinsicsConnex.td"
include "llvm/IR/IntrinsicsSystemZ.td"
include "llvm/IR/IntrinsicsWebAssembly.td"
include "llvm/IR/IntrinsicsRISCV.td"
diff --git a/llvm/include/llvm/IR/IntrinsicsConnex.td b/llvm/include/llvm/IR/IntrinsicsConnex.td
new file mode 100644
index 0000000000000..b6a2f3b6adada
--- /dev/null
+++ b/llvm/include/llvm/IR/IntrinsicsConnex.td
@@ -0,0 +1,106 @@
+//===- IntrinsicsConnex.td - Defines Connex-S intrinsics ---*- tablegen -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines all of the Connex-specific intrinsics.
+//
+//===----------------------------------------------------------------------===//
+
+// All Connex-S vector processor intrinsics start with "llvm.connex."
+//
+let TargetPrefix = "connex" in {
+
+ /*
+ * Note: all intrinsics defined in these .td files start with
+ * the int_ prefix (from intrinsic). For this file they start with
+ * int_connex prefix - otherwise we get the following TableGen error
+ * <<error:Intrinsic 'int_end_repeat' does not start with 'llvm.connex.'!>>
+ *
+ * The LLVM IR intrinsics extend the LLVM language s.t. we can use
+ * these instructions in an LLVM IR program. We also need to define the
+ * corresponding assembly instructions in the back end TableGen files.
+ */
+
+ /* Note: Following Intrinsics.td:
+ class Intrinsic<list<LLVMType> ret_types,
+ list<LLVMType> param_types = [],
+ list<IntrinsicProperty> properties = [],
+ string name = "">
+ */
+
+
+ /* Small-note:
+ llvm_i64_ty makes simpler my LLVM IR generation in the LoopVectorize.cpp
+ module:
+ def int_connex_repeat_x_times : Intrinsic<[], [llvm_i64_ty], []>;
+ But llvm_i32_ty is in accordance to the original i32 type of n.vec in the
+ LoopVectorize.cpp module:
+ def int_connex_repeat_x_times : Intrinsic<[], [llvm_i32_ty], []>;
+
+ Small-note: We get inspired from include/llvm/IR/IntrinsicsPowerPC.td:
+ // Intrinsics used to generate ctrl-based loops.
+ def int_ppc_mtctr : Intrinsic<[], [llvm_anyint_ty], []>;
+
+ Small-note: Trying to use a polymorphic definition, which requires
+ specifying the actual type in Function::Create(FunctionType::get(), ...)
+ is:
+ def int_connex_repeat_x_times : Intrinsic<[], [llvm_anyint_ty], []>;
+ When instantiating it in LoopVectorize.cpp like this:
+ Value *instrinsicFunc = Intrinsic::getDeclaration(M,
+ Intrinsic::connex_repeat_x_times);
+ it gives error at runtime:
+ llvm::ArrayRef<T>::operator[](size_t) const [with T = llvm::Type*;
+ size_t = long unsigned int]: Assertion `Index < Length &&
+ "Invalid index!"' failed.
+ */
+ def int_connex_repeat_x_times : Intrinsic<[], [llvm_i64_ty], []>;
+ def int_connex_end_repeat : Intrinsic<[], [], []>;
+
+ /* Note: Possibly useful in the future.
+ Connex OPINCAA's END_REPEAT does not have a relative offset,
+ as the standard Connex assembly ijmpnzdec instruction,
+ since it falls on Opincaa to compute the jump back relative offset.
+ We can also use a setlc to position it outside the loop created by the
+ ijmpnzdec instruction by using it inside a delay-slot instruction.
+
+ def int_connex_setlc : Intrinsic<[], [llvm_i16_ty], []>;
+ def int_connex_ijmpnzdec : Intrinsic<[], [], []>;
+ */
+
+
+
+ /* IMPORTANT: REDUCE cannot return a value. It is the duty of the host (CPU)
+ to read the result itself from the REDUCE issued by Connex-S.
+ Therefore this definition is incorrect:
+ def int_connex_reduce : Intrinsic<[llvm_i32_ty], [llvm_v128i16_ty], []>;
+ */
+ /* Also good:
+ def int_connex_reduce : Intrinsic<[], [llvm_v128i16_ty], []>;
+ def int_connex_reduce_i32 : Intrinsic<[], [llvm_v64i32_ty], []>;
+ def int_connex_reduce_f16 : Intrinsic<[], [llvm_v128f16_ty], []>;
+ */
+ def int_connex_reduce : Intrinsic<[], [llvm_anyvector_ty], []>;
+
+ /* Note: ctpop is already defined in Intrinsics.td.
+ So the below definition is not required:
+ def int_connex_ctpop : Intrinsic<[llvm_v8i16_ty],
+ [llvm_v8i16_ty], []>;
+ */
+
+
+ // Inherited BPF scalar intrinsics: Specialized loads from packet
+ def int_connex_load_byte : ClangBuiltin<"__builtin_connex_load_byte">,
+ Intrinsic<[llvm_i64_ty], [llvm_ptr_ty, llvm_i64_ty], [IntrReadMem]>;
+ def int_connex_load_half : ClangBuiltin<"__builtin_connex_load_half">,
+ Intrinsic<[llvm_i64_ty], [llvm_ptr_ty, llvm_i64_ty], [IntrReadMem]>;
+ def int_connex_load_word : ClangBuiltin<"__builtin_connex_load_word">,
+ Intrinsic<[llvm_i64_ty], [llvm_ptr_ty, llvm_i64_ty], [IntrReadMem]>;
+ def int_connex_pseudo : ClangBuiltin<"__builtin_connex_pseudo">,
+ Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty]>;
+}
+
diff --git a/llvm/include/llvm/TargetParser/Triple.h b/llvm/include/llvm/TargetParser/Triple.h
index 0e82dd212f34d..83293df2eb11c 100644
--- a/llvm/include/llvm/TargetParser/Triple.h
+++ b/llvm/include/llvm/TargetParser/Triple.h
@@ -58,6 +58,7 @@ class Triple {
avr, // AVR: Atmel AVR microcontroller
bpfel, // eBPF or extended BPF or 64-bit BPF (little endian)
bpfeb, // eBPF or extended BPF or 64-bit BPF (big endian)
+ connex, // Connex vector processor (SIMD array)
csky, // CSKY: csky
dxil, // DXIL 32-bit DirectX bytecode
hexagon, // Hexagon: hexagon
diff --git a/llvm/lib/IR/Intrinsics.cpp b/llvm/lib/IR/Intrinsics.cpp
index 526800e217399..98fef823845b2 100644
--- a/llvm/lib/IR/Intrinsics.cpp
+++ b/llvm/lib/IR/Intrinsics.cpp
@@ -19,6 +19,7 @@
#include "llvm/IR/IntrinsicsAMDGPU.h"
#include "llvm/IR/IntrinsicsARM.h"
#include "llvm/IR/IntrinsicsBPF.h"
+#include "llvm/IR/IntrinsicsConnex.h"
#include "llvm/IR/IntrinsicsHexagon.h"
#include "llvm/IR/IntrinsicsLoongArch.h"
#include "llvm/IR/IntrinsicsMips.h"
diff --git a/llvm/lib/Target/Connex/CMakeLists.txt b/llvm/lib/Target/Connex/CMakeLists.txt
new file mode 100644
index 0000000000000..23e7b0dde2c8f
--- /dev/null
+++ b/llvm/lib/Target/Connex/CMakeLists.txt
@@ -0,0 +1,53 @@
+add_llvm_component_group(Connex)
+
+set(LLVM_TARGET_DEFINITIONS Connex.td)
+
+tablegen(LLVM ConnexGenRegisterInfo.inc -gen-register-info)
+tablegen(LLVM ConnexGenInstrInfo.inc -gen-instr-info)
+tablegen(LLVM ConnexGenAsmWriter.inc -gen-asm-writer)
+tablegen(LLVM ConnexGenAsmMatcher.inc -gen-asm-matcher)
+tablegen(LLVM ConnexGenDAGISel.inc -gen-dag-isel)
+tablegen(LLVM ConnexGenMCCodeEmitter.inc -gen-emitter)
+tablegen(LLVM ConnexGenCallingConv.inc -gen-callingconv)
+tablegen(LLVM ConnexGenSubtargetInfo.inc -gen-subtarget)
+add_public_tablegen_target(ConnexCommonTableGen)
+
+add_llvm_target(ConnexCodeGen
+ ConnexAsmPrinter.cpp
+ ConnexFrameLowering.cpp
+ ConnexHazardRecognizer.cpp
+ ConnexInstrInfo.cpp
+ ConnexISelDAGToDAG.cpp
+ ConnexISelLowering.cpp
+ ConnexMCInstLower.cpp
+ ConnexRegisterInfo.cpp
+ ConnexSelectionDAGInfo.cpp
+ ConnexSubtarget.cpp
+ ConnexTargetMachine.cpp
+
+ # similar to the ones of the Mips back end
+ LINK_COMPONENTS
+ Analysis
+ AsmPrinter
+ CodeGen
+ Core
+ MC
+ ConnexDesc
+ ConnexInfo
+ IPO
+ Scalar
+ SelectionDAG
+ Support
+ Target
+ TargetParser
+ TransformUtils
+
+ ADD_TO_COMPONENT
+ Connex
+ )
+
+# add_subdirectory(AsmParser)
+# add_subdirectory(InstPrinter)
+# add_subdirectory(Disassembler)
+add_subdirectory(MCTargetDesc)
+add_subdirectory(TargetInfo)
diff --git a/llvm/lib/Target/Connex/Connex.h b/llvm/lib/Target/Connex/Connex.h
new file mode 100644
index 0000000000000..cd6f8daf4a6b7
--- /dev/null
+++ b/llvm/lib/Target/Connex/Connex.h
@@ -0,0 +1,41 @@
+//===-- Connex.h - Top-level interface for Connex representation *- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+///
+/// \file
+///
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_LIB_TARGET_CONNEX_CONNEX_H
+#define LLVM_LIB_TARGET_CONNEX_CONNEX_H
+
+#include "MCTargetDesc/ConnexMCTargetDesc.h"
+#include "llvm/IR/Instructions.h"
+#include "llvm/IR/PassManager.h"
+#include "llvm/Pass.h"
+#include "llvm/Target/TargetMachine.h"
+
+// We define reserved register(s) of Connex to use for:
+// - handling COPY instructions in WHERE blocks
+// (see ConnexTargetMachine.cpp and ConnexISelLowering.cpp), etc
+#define CONNEX_RESERVED_REGISTER_01 Connex::Wh30
+#define CONNEX_RESERVED_REGISTER_02 Connex::Wh31
+#define CONNEX_RESERVED_REGISTER_03 Connex::Wh29
+
+// This definition is used also in the OPINCAA library
+#define COPY_REGISTER_IMPLEMENTED_WITH_ORV_H
+
+namespace llvm {
+class ConnexTargetMachine;
+
+FunctionPass *createConnexISelDag(ConnexTargetMachine &TM);
+
+// Inspired from lib/Target/BPF/BPF.h (from Oct 2025)
+void initializeConnexDAGToDAGISelLegacyPass(PassRegistry &);
+} // End namespace llvm
+
+#endif
diff --git a/llvm/lib/Target/Connex/Connex.td b/llvm/lib/Target/Connex/Connex.td
new file mode 100644
index 0000000000000..88d22c6020002
--- /dev/null
+++ b/llvm/lib/Target/Connex/Connex.td
@@ -0,0 +1,66 @@
+//===-- Connex.td - Describe the Connex Target Machine ----*- tablegen -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+
+// The processor system we define is a:
+// - scalar processor, which is basically an almost unmodified version of the
+// extended BPF (Berkeley Packet Filter) 64-bit RISC processor, implemented
+// in LLVM. eBPF is well-described at
+// https://www.kernel.org/doc/Documentation/networking/filter.txt.
+// - a vector/SIMD unit, which is the Connex-S processor, actually an
+// accelerator, with its own separate-space banked vector memory.
+// The back end implementation starts from the BPF LLVM back end (the version
+// from Jul 2016), to which we add
+// the vector instruction support inspired mostly from the Mips MSA vector
+// extensions.
+// Note: the scalar registers of Connex are R0-31 (e.g., Connex::R10), and the
+// vector registers are Wh0-31 (from wide; e.g., Connex::Wh0).
+//
+// VERY IMPORTANT: Note that currently our back end targets only our Connex
+// OPINCAA assembler (very easy to learn and use) available at
+// https://gitlab.dcae.pub.ro/research/ConnexRelated/opincaa/ .
+
+
+include "llvm/Target/Target.td"
+include "ConnexRegisterInfo.td"
+include "ConnexCallingConv.td"
+include "ConnexSchedule.td"
+include "ConnexInstrInfo.td"
+
+
+def ConnexInstrInfo : InstrInfo;
+
+class Proc<string Name, list<SubtargetFeature> Features>
+ : Processor<Name, NoItineraries, Features>;
+
+def : Proc<"generic", []>;
+
+def ConnexInstPrinter : AsmWriter {
+ string AsmWriterClassName = "InstPrinter";
+ bit isMCAsmWriter = 1;
+}
+
+// Inspired from https://github.com/llvm-mirror/llvm/commit/5ef1349
+// (see also https://groups.google.com/forum/#!topic/llvm-dev/_Zr4Oe5MLkE)
+def ConnexAsmParser : AsmParser {
+ bit HasMnemonicFirst = 0;
+}
+
+def ConnexAsmParserVariant : AsmParserVariant {
+ int Variant = 0;
+ string Name = "Connex";
+ string BreakCharacters = ".";
+}
+
+def Connex : Target {
+ let InstructionSet = ConnexInstrInfo;
+ let AssemblyWriters = [ConnexInstPrinter];
+ // Inspired from llvm/lib/Target/Hexagon/Hexagon.td
+ let AssemblyParsers = [ConnexAsmParser];
+ let AssemblyParserVariants = [ConnexAsmParserVariant];
+}
diff --git a/llvm/lib/Target/Connex/ConnexAsmPrinter.cpp b/llvm/lib/Target/Connex/ConnexAsmPrinter.cpp
new file mode 100644
index 0000000000000..bf99ecf468664
--- /dev/null
+++ b/llvm/lib/Target/Connex/ConnexAsmPrinter.cpp
@@ -0,0 +1,1223 @@
+//===-- ConnexAsmPrinter.cpp - Connex LLVM assembly writer ----------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file contains a printer that converts from our internal representation
+// of machine-dependent LLVM code to the Connex assembly language.
+//
+//===----------------------------------------------------------------------===//
+
+#include "Connex.h"
+#include "ConnexConfig.h"
+#include "ConnexInstrInfo.h"
+#include "ConnexMCInstLower.h"
+#include "ConnexTargetMachine.h"
+#include "MCTargetDesc/ConnexInstPrinter.h"
+#include "TargetInfo/ConnexTargetInfo.h"
+#include "Misc.h"
+#include "llvm/ADT/StringRef.h"
+#include "llvm/CodeGen/AsmPrinter.h"
+#include "llvm/CodeGen/MachineConstantPool.h"
+#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
+#include "llvm/MC/MCAsmInfo.h"
+#include "llvm/MC/MCInst.h"
+#include "llvm/MC/MCStreamer.h"
+#include "llvm/MC/MCSymbol.h"
+#include "llvm/MC/TargetRegistry.h"
+#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/raw_ostream.h"
+// TODO: #include "BTFDebug.h"
+
+using namespace llvm;
+
+// Inspired from llvm/lib/CodeGen/TargetPassConfig.cpp
+static cl::opt<bool> EnableCorrectBBsASMPrint(
+ "enable-correct-asm-print", cl::Hidden, cl::init(true),
+ cl::desc(
+ "Correct the BBs of the 2nd innermost loop in loop nests of kernels "
+ "and use normally REPEAT for it and 'host-side OPINCAA C++ for' as "
+ "the innermost loop"));
+
+static cl::opt<bool> TreatRepeat2ndInnerLoopGlobalTmp(
+ "treat-repeat-2nd-inner-loop", cl::Hidden, cl::init(true),
+ cl::desc("Treat well 2nd inner loop in kernel and use normally REPEAT "
+ "for it and host-side OPINCAA C++ for() as the inner loop"));
+
+#define DEBUG_TYPE "asm-printer"
+
+namespace {
+
+// Declarations for adapted RPO and DFS traversals of the CFG
+typedef bool (*CompareBBs)(MachineBasicBlock &b1, MachineBasicBlock &b2);
+//
+// We declare these vars static outside the class to avoid some strange C++
+// linker errors (used for adapted RPO or DFS traversal of the CFG).
+static std::map<MachineBasicBlock *, bool> visitedMBB;
+static std::map<MachineBasicBlock *, int> finishingTimeMBB; // DFS finish time
+static std::vector<MachineBasicBlock *> sortedListMBB;
+
+bool isMBBWithInlineAsmString(MachineBasicBlock *MBB, std::string strToSearch) {
+ LLVM_DEBUG(
+ dbgs() << "Entered isMBBWithOPINCAAKernelEndMarker(MBB->getName() = "
+ << MBB->getName() << ")\n");
+
+ for (auto MIItr = MBB->begin(), MBBend = MBB->end(); MIItr != MBBend;
+ ++MIItr) {
+ MachineInstr *MI = &(*MIItr);
+
+ if (MI->isInlineAsm()) {
+ LLVM_DEBUG(
+ dbgs()
+ << " isMBBWithOPINCAAKernelEndMarker(): found INLINEASM *MI = "
+ << *MI << "\n");
+
+ // See http://llvm.org/docs/doxygen/html/classllvm_1_1MachineInstr.html
+ for (unsigned index = 0; index < MI->getNumOperands(); index++) {
+ MachineOperand *miOpnd;
+ miOpnd = &(MI->getOperand(index));
+
+ if (miOpnd->isSymbol()) {
+ std::string symStr = miOpnd->getSymbolName();
+ LLVM_DEBUG(dbgs() << " isMBBWithOPINCAAKernelEndMarker(): symStr = "
+ << symStr << "\n");
+
+ if (symStr.find(strToSearch) != std::string::npos) {
+ LLVM_DEBUG(
+ dbgs()
+ << " isMBBWithOPINCAAKernelEndMarker(): Found INLINEASM "
+ "with strToSearch in the symbol "
+ "operand\n");
+ //"with host-side for loop"
+ return true;
+ }
+ }
+ }
+ }
+ }
+
+ return false;
+} // End isMBBWithInlineAsmString()
+
+class ConnexAsmPrinter : public AsmPrinter {
+#include "ConnexAsmPrinterLoopNests.h"
+ /*
+ TODO:
+private:
+ BTFDebug *BTF;
+ explicit BPFAsmPrinter(TargetMachine &TM,
+ std::unique_ptr<MCStreamer> Streamer)
+ : AsmPrinter(TM, std::move(Streamer)), BTF(nullptr) {}
+ */
+public:
+ explicit ConnexAsmPrinter(TargetMachine &TM,
+ std::unique_ptr<MCStreamer> Streamer)
+ : AsmPrinter(TM, std::move(Streamer)) {}
+
+ StringRef getPassName() const override { return "Connex Assembly Printer"; }
+
+ /*
+ // Inspired from BPF's BPFAsmPrinter::emitInstruction(const MachineInstr *MI)
+ void emitInstruction(const MachineInstr *MI) {
+ MCInst TmpInst;
+
+ //if (!BTF || !BTF->InstLower(MI, TmpInst)) {
+ ConnexMCInstLower MCInstLowering(OutContext, *this);
+ MCInstLowering.Lower(MI, TmpInst);
+ //}
+
+ EmitToStreamer(*OutStreamer, TmpInst);
+ }
+ */
+
+ /*
+ (From http://llvm.org/docs/doxygen/html/classllvm_1_1MachineFunctionPass.html
+ we see SelectionDAGISel and AsmPrinter were the only passes that inherit
+ MachineFunctionPass, from this back end.)
+ From http://llvm.org/docs/doxygen/html/AsmPrinter_8h_source.html:
+ /// Set up the AsmPrinter when we are working on a new module. If your pass
+ /// overrides this, it must make sure to explicitly call this implementation.
+ */
+
+ bool isVectorBody(StringRef &&strRef) {
+#define STR_VECTOR_BODY "vector.body"
+#define STR_VECTOR_BODY_PREHEADER ".preheader"
+
+ LLVM_DEBUG(dbgs() << "isVectorBody(): strRef = " << strRef << "\n");
+
+ // We can have several BBs with name vector.bodyXYZT (but we do NOT
+ // search for STR_VECTOR_BODY_PREHEADER, which can be e.g.,
+ // vector.body40.preheader)
+ if (strRef.starts_with(StringRef(STR_VECTOR_BODY)) &&
+ strRef.ends_with(StringRef(STR_VECTOR_BODY_PREHEADER)))
+ return f...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/181711
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