[llvm] [DAG] TargetLowering::expandCLMUL - avoid ISD::MUL if target hasBitTest (PR #177566)

[via llvm-commits]

================
@@ -8432,12 +8432,34 @@ SDValue TargetLowering::expandCLMUL(SDNode *Node, SelectionDAG &DAG) const {
     // calculation in BasicTTIImpl::getTypeBasedIntrinsicInstrCost for
     // Intrinsic::clmul.
----------------
fbrv wrote:

The generic cost model in BasicTTIImpl::getTypeBasedIntrinsicInstrCost currently models AND + MUL + XOR per bit, which still matches the fallback path (no hasBitTest) exactly as before.
For the new hasBitTest path the per-bit expansion becomes AND + SETCC + SHL + SELECT + XOR (no MUL), so the model is technically stale for those targets. However, properly fixing it would require a TTI-level hook mirroring the SelectionDAG hasBitTest() predicate, since the cost model has no access to SDValue nodes — which feels out of scope for this PR.
Neither X86TTIImpl nor RISCVTTIImpl override the clmul cost today, so the inaccuracy does affect them. I can either:
  - leave it as-is and update the note to clarify the two-path situation, or
  - add a TTI hook and update the cost model in a follow-up.

  Happy to do whichever you prefer, cc @RKSimon .

https://github.com/llvm/llvm-project/pull/177566