[llvm] [X86] combineSETCC - drop unnecessary shift amount bounds check for larger-than-legal ICMP_ZERO(AND(X,SHL(1,IDX))) folds (PR #182021)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 19 03:53:12 PST 2026
================
@@ -454,146 +431,64 @@ define i1 @scalar_i64_bitsinmiddle_eq(i64 %x, i64 %y) nounwind {
}
define i1 @scalar_i128_lowestbit_eq(i128 %x, i128 %y) nounwind {
-; X86-BMI1-LABEL: scalar_i128_lowestbit_eq:
-; X86-BMI1: # %bb.0:
-; X86-BMI1-NEXT: pushl %edi
-; X86-BMI1-NEXT: pushl %esi
-; X86-BMI1-NEXT: subl $36, %esp
-; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-BMI1-NEXT: movss {{.*#+}} xmm0 = [1,0,0,0]
-; X86-BMI1-NEXT: movaps %xmm0, {{[0-9]+}}(%esp)
-; X86-BMI1-NEXT: xorps %xmm0, %xmm0
-; X86-BMI1-NEXT: movaps %xmm0, (%esp)
-; X86-BMI1-NEXT: movl %ecx, %eax
-; X86-BMI1-NEXT: shrb $3, %al
-; X86-BMI1-NEXT: andb $12, %al
-; X86-BMI1-NEXT: negb %al
-; X86-BMI1-NEXT: movsbl %al, %esi
-; X86-BMI1-NEXT: movl 24(%esp,%esi), %edi
-; X86-BMI1-NEXT: movl 28(%esp,%esi), %eax
-; X86-BMI1-NEXT: shldl %cl, %edi, %eax
-; X86-BMI1-NEXT: movl 16(%esp,%esi), %edx
-; X86-BMI1-NEXT: movl 20(%esp,%esi), %esi
-; X86-BMI1-NEXT: shldl %cl, %esi, %edi
-; X86-BMI1-NEXT: shldl %cl, %edx, %esi
-; X86-BMI1-NEXT: # kill: def $cl killed $cl killed $ecx
-; X86-BMI1-NEXT: shll %cl, %edx
-; X86-BMI1-NEXT: andl {{[0-9]+}}(%esp), %edi
-; X86-BMI1-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X86-BMI1-NEXT: andl {{[0-9]+}}(%esp), %edx
-; X86-BMI1-NEXT: orl %edi, %edx
-; X86-BMI1-NEXT: andl {{[0-9]+}}(%esp), %esi
-; X86-BMI1-NEXT: orl %eax, %esi
-; X86-BMI1-NEXT: orl %edx, %esi
-; X86-BMI1-NEXT: sete %al
-; X86-BMI1-NEXT: addl $36, %esp
-; X86-BMI1-NEXT: popl %esi
-; X86-BMI1-NEXT: popl %edi
-; X86-BMI1-NEXT: retl
-;
-; X86-BMI2-SSE2-LABEL: scalar_i128_lowestbit_eq:
-; X86-BMI2-SSE2: # %bb.0:
-; X86-BMI2-SSE2-NEXT: pushl %edi
-; X86-BMI2-SSE2-NEXT: pushl %esi
-; X86-BMI2-SSE2-NEXT: subl $36, %esp
-; X86-BMI2-SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-BMI2-SSE2-NEXT: movss {{.*#+}} xmm0 = [1,0,0,0]
-; X86-BMI2-SSE2-NEXT: movaps %xmm0, {{[0-9]+}}(%esp)
-; X86-BMI2-SSE2-NEXT: xorps %xmm0, %xmm0
-; X86-BMI2-SSE2-NEXT: movaps %xmm0, (%esp)
-; X86-BMI2-SSE2-NEXT: movl %ecx, %eax
-; X86-BMI2-SSE2-NEXT: shrb $3, %al
-; X86-BMI2-SSE2-NEXT: andb $12, %al
-; X86-BMI2-SSE2-NEXT: negb %al
-; X86-BMI2-SSE2-NEXT: movsbl %al, %edx
-; X86-BMI2-SSE2-NEXT: movl 24(%esp,%edx), %esi
-; X86-BMI2-SSE2-NEXT: movl 28(%esp,%edx), %eax
-; X86-BMI2-SSE2-NEXT: shldl %cl, %esi, %eax
-; X86-BMI2-SSE2-NEXT: movl 16(%esp,%edx), %edi
-; X86-BMI2-SSE2-NEXT: movl 20(%esp,%edx), %edx
-; X86-BMI2-SSE2-NEXT: shldl %cl, %edx, %esi
-; X86-BMI2-SSE2-NEXT: shldl %cl, %edi, %edx
-; X86-BMI2-SSE2-NEXT: shlxl %ecx, %edi, %ecx
-; X86-BMI2-SSE2-NEXT: andl {{[0-9]+}}(%esp), %esi
-; X86-BMI2-SSE2-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X86-BMI2-SSE2-NEXT: andl {{[0-9]+}}(%esp), %ecx
-; X86-BMI2-SSE2-NEXT: orl %esi, %ecx
-; X86-BMI2-SSE2-NEXT: andl {{[0-9]+}}(%esp), %edx
-; X86-BMI2-SSE2-NEXT: orl %eax, %edx
-; X86-BMI2-SSE2-NEXT: orl %ecx, %edx
-; X86-BMI2-SSE2-NEXT: sete %al
-; X86-BMI2-SSE2-NEXT: addl $36, %esp
-; X86-BMI2-SSE2-NEXT: popl %esi
-; X86-BMI2-SSE2-NEXT: popl %edi
-; X86-BMI2-SSE2-NEXT: retl
+; X86-SSE2-LABEL: scalar_i128_lowestbit_eq:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: subl $44, %esp
+; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-SSE2-NEXT: movaps {{[0-9]+}}(%esp), %xmm0
+; X86-SSE2-NEXT: xorps %xmm1, %xmm1
+; X86-SSE2-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
+; X86-SSE2-NEXT: movaps %xmm0, (%esp)
+; X86-SSE2-NEXT: movl %eax, %ecx
+; X86-SSE2-NEXT: shrb $3, %cl
+; X86-SSE2-NEXT: andb $12, %cl
+; X86-SSE2-NEXT: movzbl %cl, %ecx
+; X86-SSE2-NEXT: movl (%esp,%ecx), %ecx
+; X86-SSE2-NEXT: btl %eax, %ecx
+; X86-SSE2-NEXT: setae %al
+; X86-SSE2-NEXT: addl $44, %esp
+; X86-SSE2-NEXT: retl
;
; X86-BMI2-AVX2-LABEL: scalar_i128_lowestbit_eq:
; X86-BMI2-AVX2: # %bb.0:
-; X86-BMI2-AVX2-NEXT: pushl %edi
-; X86-BMI2-AVX2-NEXT: pushl %esi
-; X86-BMI2-AVX2-NEXT: subl $36, %esp
-; X86-BMI2-AVX2-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-BMI2-AVX2-NEXT: vmovaps {{.*#+}} ymm0 = [0,0,0,0,1,0,0,0]
-; X86-BMI2-AVX2-NEXT: vmovups %ymm0, (%esp)
-; X86-BMI2-AVX2-NEXT: movl %ecx, %eax
-; X86-BMI2-AVX2-NEXT: shrb $3, %al
-; X86-BMI2-AVX2-NEXT: andb $12, %al
-; X86-BMI2-AVX2-NEXT: negb %al
-; X86-BMI2-AVX2-NEXT: movsbl %al, %edx
-; X86-BMI2-AVX2-NEXT: movl 24(%esp,%edx), %esi
-; X86-BMI2-AVX2-NEXT: movl 28(%esp,%edx), %eax
-; X86-BMI2-AVX2-NEXT: shldl %cl, %esi, %eax
-; X86-BMI2-AVX2-NEXT: movl 16(%esp,%edx), %edi
-; X86-BMI2-AVX2-NEXT: movl 20(%esp,%edx), %edx
-; X86-BMI2-AVX2-NEXT: shldl %cl, %edx, %esi
-; X86-BMI2-AVX2-NEXT: shldl %cl, %edi, %edx
-; X86-BMI2-AVX2-NEXT: shlxl %ecx, %edi, %ecx
-; X86-BMI2-AVX2-NEXT: andl {{[0-9]+}}(%esp), %esi
-; X86-BMI2-AVX2-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X86-BMI2-AVX2-NEXT: andl {{[0-9]+}}(%esp), %ecx
-; X86-BMI2-AVX2-NEXT: orl %esi, %ecx
-; X86-BMI2-AVX2-NEXT: andl {{[0-9]+}}(%esp), %edx
-; X86-BMI2-AVX2-NEXT: orl %eax, %edx
-; X86-BMI2-AVX2-NEXT: orl %ecx, %edx
-; X86-BMI2-AVX2-NEXT: sete %al
-; X86-BMI2-AVX2-NEXT: addl $36, %esp
-; X86-BMI2-AVX2-NEXT: popl %esi
-; X86-BMI2-AVX2-NEXT: popl %edi
-; X86-BMI2-AVX2-NEXT: vzeroupper
+; X86-BMI2-AVX2-NEXT: subl $44, %esp
+; X86-BMI2-AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-BMI2-AVX2-NEXT: vmovaps {{[0-9]+}}(%esp), %xmm0
+; X86-BMI2-AVX2-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; X86-BMI2-AVX2-NEXT: vmovaps %xmm1, {{[0-9]+}}(%esp)
+; X86-BMI2-AVX2-NEXT: vmovaps %xmm0, (%esp)
+; X86-BMI2-AVX2-NEXT: movl %eax, %ecx
+; X86-BMI2-AVX2-NEXT: shrb $3, %cl
+; X86-BMI2-AVX2-NEXT: andb $12, %cl
+; X86-BMI2-AVX2-NEXT: movzbl %cl, %ecx
+; X86-BMI2-AVX2-NEXT: movl (%esp,%ecx), %ecx
+; X86-BMI2-AVX2-NEXT: btl %eax, %ecx
+; X86-BMI2-AVX2-NEXT: setae %al
+; X86-BMI2-AVX2-NEXT: addl $44, %esp
; X86-BMI2-AVX2-NEXT: retl
;
; X64-BMI1-LABEL: scalar_i128_lowestbit_eq:
; X64-BMI1: # %bb.0:
-; X64-BMI1-NEXT: movq %rdx, %rcx
-; X64-BMI1-NEXT: xorl %eax, %eax
-; X64-BMI1-NEXT: movl $1, %edx
-; X64-BMI1-NEXT: xorl %r8d, %r8d
-; X64-BMI1-NEXT: shldq %cl, %rdx, %r8
-; X64-BMI1-NEXT: shlq %cl, %rdx
-; X64-BMI1-NEXT: testb $64, %cl
-; X64-BMI1-NEXT: cmovneq %rdx, %r8
-; X64-BMI1-NEXT: cmovneq %rax, %rdx
-; X64-BMI1-NEXT: andq %rsi, %r8
-; X64-BMI1-NEXT: andq %rdi, %rdx
-; X64-BMI1-NEXT: orq %r8, %rdx
-; X64-BMI1-NEXT: sete %al
+; X64-BMI1-NEXT: movl %edx, %ecx
+; X64-BMI1-NEXT: andb $32, %cl
----------------
RKSimon wrote:
Using i64 raises it own regressions - I reckon we'd be better off just improving (1) in a future commit.
https://github.com/llvm/llvm-project/pull/182021
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