[llvm] [X86] Enable custom lowering of 256/512-bit vXi32 and vXi64 CLMUL nodes (PR #177554)

[Folkert de Vries via llvm-commits]

folkertdev wrote:

@RKSimon is this the PR that makes this example optimize?

```llvm
define <2 x i64> @pclmul128_hi_lo_vector(<2 x i64> %a0, <2 x i64> %a1) {
; SSE-LABEL: pclmul128_hi_lo_vector:
; SSE:       # %bb.0:
; SSE-NEXT:    pclmulqdq $1, %xmm1, %xmm0
; SSE-NEXT:    retq
;
; AVX-LABEL: pclmul128_hi_lo_vector:
; AVX:       # %bb.0:
; AVX-NEXT:    vpclmulqdq $1, %xmm1, %xmm0, %xmm0
; AVX-NEXT:    retq
  %s0 = shufflevector <2 x i64> %a0, <2 x i64> poison, <1 x i32> <i32 1>
  %s1 = shufflevector <2 x i64> %a1, <2 x i64> poison, <1 x i32> <i32 0>
  %x0 = zext <1 x i64> %s0 to <1 x i128>
  %x1 = zext <1 x i64> %s1 to <1 x i128>
  %clmul = call <1 x i128> @llvm.clmul.v1i128(<1 x i128> %x0, <1 x i128> %x1)
  %res = bitcast <1 x i128> %clmul to <2 x i64>
  ret <2 x i64>%res
}
```

As best as I can test (from rust), the LLVM 22 branch does not actually optimize that example currently (but llc trunk does). So as it stands `clmul` won't be that useful with LLVM 22, maybe there is something we can cherry-pick?

https://github.com/llvm/llvm-project/pull/177554