[llvm] [AMDGPU][GISel] Add RegBankLegalize support for G_SI_CALL (PR #165747)

[Petar Avramovic via llvm-commits]

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@@ -21,6 +21,15 @@ class MachineIRBuilder;
 
 namespace AMDGPU {
 
+/// Holds waterfall loop information: the set of SGPR operand registers that
+/// need waterfalling, and an instruction range [Start, End) to wrap in the
+/// loop.
+struct WaterfallInfo {
+  SmallSet<Register, 4> SgprWaterfallOperandRegs;
+  const MachineInstr *Start = nullptr;
+  const MachineInstr *End = nullptr;
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petar-avramovic wrote:

It should be easier to use
  MachineBasicBlock::iterator Start;
  MachineBasicBlock::iterator End;
instead, just initialize them with MachineInstr * or iterator, should remove need for const_cast and &*

https://github.com/llvm/llvm-project/pull/165747