[llvm] [AMDGPU] Add additional optimization cases for llvm.amdgcn.wave.shuffle intrinsic (PR #182357)

[Matt Arsenault via llvm-commits]

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@@ -573,60 +573,154 @@ static bool isThreadID(const GCNSubtarget &ST, Value *V) {
 }
 
 // Attempt to capture situations where the index argument matches
-// a DPP pattern, and convert to a DPP-based mov
+// a DPP pattern, and convert to an amdgcn_update_dpp call
 static std::optional<Instruction *>
-tryWaveShuffleDPP(const GCNSubtarget &ST, InstCombiner &IC, IntrinsicInst &II) {
+tryWaveShuffleDpp(const GCNSubtarget &ST, InstCombiner &IC, IntrinsicInst &II) {
   Value *Val = II.getArgOperand(0);
   Value *Idx = II.getArgOperand(1);
   auto &B = IC.Builder;
 
-  // DPP16 Row Share requires known wave size, architecture support
-  if (!ST.isWaveSizeKnown() || !ST.hasDPPRowShare())
+  Value *Lid;
+
+  bool CanDppOpt = false;
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arsenm wrote:

I don't like the assign bool for validity pattern. Can you break this into smaller functions that exit?

https://github.com/llvm/llvm-project/pull/182357