[llvm] [AArch64] Optimize constant v2i32/v2f32 vector builds (PR #177076)

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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp -- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp --diff_from_common_commit
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``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 739a015e9..b3db92138 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -16365,7 +16365,8 @@ SDValue AArch64TargetLowering::LowerBUILD_VECTOR(SDValue Op,
 
   // Handle 64-bit constant BUILD_VECTORs by packing them into an i64 immediate.
   // This is cheaper than a load if the immediate can be materialized in a few
-  // mov instructions. This optimization is disabled for big-endian targets for now.
+  // mov instructions. This optimization is disabled for big-endian targets for
+  // now.
   if (BVN->isConstant() && VT.isFixedLengthVector() &&
       VT.getSizeInBits() == 64 && !DAG.getDataLayout().isBigEndian()) {
     const SDLoc DL(Op);

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https://github.com/llvm/llvm-project/pull/177076