The Week Of Monday 2 October 2023 Archives by author
Starting: Mon Oct 2 00:03:40 PDT 2023
Ending: Sun Oct 8 23:56:40 PDT 2023
Messages: 3534
- [llvm] [analyzer] Fix crash in BasicValueFactory.cpp with __int128_t integers (PR #67212)
Aaron Ballman via llvm-commits
- [compiler-rt] [clang-cl] Fix value of __FUNCTION__ in MSVC mode. (PR #67592)
Aaron Ballman via llvm-commits
- [llvm] [clang-cl] Fix value of __FUNCTION__ in MSVC mode. (PR #67592)
Aaron Ballman via llvm-commits
- [compiler-rt] [clang-cl] Fix value of __FUNCTION__ in MSVC mode. (PR #67592)
Aaron Ballman via llvm-commits
- [compiler-rt] [clang-cl] Fix value of __FUNCTION__ in MSVC mode. (PR #67592)
Aaron Ballman via llvm-commits
- [llvm] [clang-cl] Fix value of __FUNCTION__ in MSVC mode. (PR #67592)
Aaron Ballman via llvm-commits
- [llvm] 5d83756 - Fix Sphinx build with incorrect heading levels; NFC
Aaron Ballman via llvm-commits
- [llvm] 96dd50e - Fix LLVM Sphinx build
Aaron Ballman via llvm-commits
- [llvm] [Documentation] Fix some invalid references in sphinx documentation (PR #68239)
Aaron Ballman via llvm-commits
- [llvm] llvm-canon (PR #68176)
Aaron Ballman via llvm-commits
- [llvm] [libcxx] Allow string to use SSO in constant evaluation. (PR #66576)
Aaron Ballman via llvm-commits
- [compiler-rt] Diagnose problematic uses of constructor/destructor attribute (PR #67673)
Aaron Ballman via llvm-commits
- [PATCH] D140828: [C++] Implement "Deducing this" (P0847R7)
Aaron Ballman via Phabricator via llvm-commits
- [llvm] [DAG] Extend the computeOverflowForSignedSub/computeOverflowForUnsignedSub implementations with ConstantRange (PR #67890)
Aaron Jarmusch via llvm-commits
- [llvm] [DAG] Extend the computeOverflowForSignedSub/computeOverflowForUnsignedSub implementations with ConstantRange (PR #67890)
Aaron Jarmusch via llvm-commits
- [llvm] [DAG] Extend the computeOverflowForSignedSub/computeOverflowForUnsignedSub implementations with ConstantRange (PR #67890)
Aaron Jarmusch via llvm-commits
- [llvm] [DAG] Extend the computeOverflowForSignedSub/computeOverflowForUnsignedSub implementations with ConstantRange (PR #67890)
Aaron Jarmusch via llvm-commits
- [compiler-rt] [scudo] Add missing thread-safety analysis annotations. (PR #68072)
Aaron Puchert via llvm-commits
- [llvm] [mlir][sparse] Print new syntax (PR #68130)
Aart Bik via llvm-commits
- [llvm] [mlir][sparse] Print new syntax (PR #68130)
Aart Bik via llvm-commits
- [llvm] [mlir][sparse] Print new syntax (PR #68130)
Aart Bik via llvm-commits
- [llvm] [mlir][llvm] Fix elem type passing into `getelementptr` (PR #68136)
Aart Bik via llvm-commits
- [compiler-rt] [mlir][llvm] Fix elem type passing into `getelementptr` (PR #68136)
Aart Bik via llvm-commits
- [llvm] [mlir][sparse] introduce MapRef, unify conversion/codegen for reader (PR #68360)
Aart Bik via llvm-commits
- [llvm] [mlir][sparse] introduce MapRef, unify conversion/codegen for reader (PR #68360)
Aart Bik via llvm-commits
- [llvm] [mlir][sparse] introduce MapRef, unify conversion/codegen for reader (PR #68360)
Aart Bik via llvm-commits
- [llvm] [mlir][sparse] introduce MapRef, unify conversion/codegen for reader (PR #68360)
Aart Bik via llvm-commits
- [llvm] [mlir][sparse] introduce MapRef, unify conversion/codegen for reader (PR #68360)
Aart Bik via llvm-commits
- [llvm] [mlir][sparse] introduce MapRef, unify conversion/codegen for reader (PR #68360)
Aart Bik via llvm-commits
- [llvm] [mlir][sparse] introduce MapRef, unify conversion/codegen for reader (PR #68360)
Aart Bik via llvm-commits
- [llvm] [mlir][sparse] introduce MapRef, unify conversion/codegen for reader (PR #68360)
Aart Bik via llvm-commits
- [llvm] [mlir][sparse] introduce MapRef, unify conversion/codegen for reader (PR #68360)
Aart Bik via llvm-commits
- [llvm] [mlir][sparse] introduce MapRef, unify conversion/codegen for reader (PR #68360)
Aart Bik via llvm-commits
- [PATCH] D134129: [PATCH] [RISCV] Enable -msave-restore by default when optimizing for size
Aditya Kumar via Phabricator via llvm-commits
- [llvm] [CodeExtractor] Consider Value arguments of dbg.assign (PR #67987)
Adrian Prantl via llvm-commits
- [llvm] [CodeExtractor] Consider Value arguments of dbg.assign (PR #67987)
Adrian Prantl via llvm-commits
- [llvm] [CodeExtractor] Consider Value arguments of dbg.assign (PR #67987)
Adrian Prantl via llvm-commits
- [llvm] [Github] Add PR author name to subscription email (PR #68440)
Aiden Grossman via llvm-commits
- [llvm] [Github] Add PR author name to subscription email (PR #68440)
Aiden Grossman via llvm-commits
- [llvm] [Github] Add PR author name to subscription email (PR #68440)
Aiden Grossman via llvm-commits
- [llvm] [Github] Add PR author name to subscription email (PR #68440)
Aiden Grossman via llvm-commits
- [llvm] [Github] Add PR author name to subscription email (PR #68440)
Aiden Grossman via llvm-commits
- [llvm] [OpenMP][OpenMPIRBuilder][NFC] Move copyInput to a passed in lambda function (PR #68124)
Akash Banerjee via llvm-commits
- [llvm] [OpenMP][OpenMPIRBuilder][NFC] Move copyInput to a passed in lambda function (PR #68124)
Akash Banerjee via llvm-commits
- [llvm] [OpenMP][OpenMPIRBuilder][NFC] Move copyInput to a passed in lambda function (PR #68124)
Akash Banerjee via llvm-commits
- [llvm] [OpenMP][OpenMPIRBuilder][NFC] Move copyInput to a passed in lambda function (PR #68124)
Akash Banerjee via llvm-commits
- [llvm] [OpenMP][OpenMPIRBuilder] Move copyInput to a passed in lambda function and re-order kernel argument load/stores (PR #68124)
Akash Banerjee via llvm-commits
- [llvm] [CodeGen][arm64e] Add methods and data members to Address, which are needed to authenticate signed pointers (PR #67454)
Akira Hatanaka via llvm-commits
- [llvm] [CodeGen][arm64e] Add methods and data members to Address, which are needed to authenticate signed pointers (PR #67454)
Akira Hatanaka via llvm-commits
- [llvm] [CodeGen][arm64e] Add methods and data members to Address, which are needed to authenticate signed pointers (PR #67454)
Akira Hatanaka via llvm-commits
- [PATCH] D138846: MC/DC in LLVM Source-Based Code Coverage: LLVM back-end and compiler-rt
Alan Phipps via Phabricator via llvm-commits
- [PATCH] D138847: MC/DC in LLVM Source-Based Code Coverage: llvm-cov visualization
Alan Phipps via Phabricator via llvm-commits
- [llvm] [RISCV] Update Zfa extension version to 1.0 (PR #67964)
Alex Bradbury via llvm-commits
- [llvm] [MC][NFC] Allow MCInstrAnalysis to store state (PR #65479)
Alex Bradbury via llvm-commits
- [compiler-rt] [builtins] Start to refactor int to fp conversion functions to use a common implementation (PR #66903)
Alex Bradbury via llvm-commits
- [llvm] [RISCV] Update Zfa extension version to 1.0 (PR #67964)
Alex Bradbury via llvm-commits
- [llvm] [RISCV] Update Zfa extension version to 1.0 (PR #67964)
Alex Bradbury via llvm-commits
- [llvm] [docs] Advise contributors to check for truncated PR titles (PR #68021)
Alex Bradbury via llvm-commits
- [llvm] [docs] Advise contributors to check for truncated PR titles (PR #68021)
Alex Bradbury via llvm-commits
- [llvm] Add myself to CODEOWNERS (PR #66363)
Alex Bradbury via llvm-commits
- [llvm] 451255b - [RISCV][test] Extend test coverage for Zfa's fli instructions to cover miscompile
Alex Bradbury via llvm-commits
- [llvm] [RISCV] Fix incorrect codegen for Zfa with negated forms of constants in the lookup table (PR #68026)
Alex Bradbury via llvm-commits
- [llvm] [docs] Advise contributors to check for truncated PR titles (PR #68021)
Alex Bradbury via llvm-commits
- [llvm] [RISCV] Fix incorrect codegen for Zfa with negated forms of constants in the lookup table (PR #68026)
Alex Bradbury via llvm-commits
- [llvm] [RISCV] Fix incorrect codegen for Zfa with negated forms of constants in the lookup table (PR #68026)
Alex Bradbury via llvm-commits
- [llvm] [RISCV] Add sink-and-fold support for RISC-V. (PR #67602)
Alex Bradbury via llvm-commits
- [llvm] [RISCV] Update Zfa extension version to 1.0 (PR #67964)
Alex Bradbury via llvm-commits
- [llvm] [RISCV] Update Zfa extension version to 1.0 (PR #67964)
Alex Bradbury via llvm-commits
- [llvm] [RISCV] Mark the Zfa extension as non-experimental (PR #68113)
Alex Bradbury via llvm-commits
- [llvm] [RISCV] Relax some Zvbb patterns and lowerings to Zvkb (PR #68115)
Alex Bradbury via llvm-commits
- [llvm] [RISCV] Update Zfa extension version to 1.0 (PR #67964)
Alex Bradbury via llvm-commits
- [llvm] [RISCV] Mark the Zfa extension as non-experimental (PR #68113)
Alex Bradbury via llvm-commits
- [llvm] [RISCV] Mark the Zfa extension as non-experimental (PR #68113)
Alex Bradbury via llvm-commits
- [llvm] [RISCV] Mark the Zfa extension as non-experimental (PR #68113)
Alex Bradbury via llvm-commits
- [llvm] [RISCV] Update Zfa extension version to 1.0 (PR #67964)
Alex Bradbury via llvm-commits
- [llvm] [RISCV] Mark the Zfa extension as non-experimental (PR #68113)
Alex Bradbury via llvm-commits
- [llvm] [RISCV] Mark the Zfa extension as non-experimental (PR #68113)
Alex Bradbury via llvm-commits
- [llvm] 76227fc - [RISCV][test] +experimental-zfa -> +zfa in missed test
Alex Bradbury via llvm-commits
- [llvm] 824251c - Revert "[RISCV] Generaize reduction tree matching to all integer reductions (#68014)"
Alex Bradbury via llvm-commits
- [llvm] [RISCV] Generaize reduction tree matching to all integer reductions (PR #68014)
Alex Bradbury via llvm-commits
- [llvm] [RISCV] Be more aggressive about forming floating point constants (PR #68433)
Alex Bradbury via llvm-commits
- [PATCH] D157288: [TargetLowering][NFC] Document overloaded meaning of TypeSoftPromoteHalf
Alex Bradbury via Phabricator via llvm-commits
- [llvm] [DebugInfo] Separate error generation from reporting in DWARFHeaderUnit::extract (PR #68242)
Alex Langford via llvm-commits
- [llvm] [DebugInfo] Separate error generation from reporting in DWARFHeaderUnit::extract (PR #68242)
Alex Langford via llvm-commits
- [llvm] [DebugInfo] Separate error generation from reporting in DWARFHeaderUnit::extract (PR #68242)
Alex Langford via llvm-commits
- [llvm] 81232f2 - Re-generate pow-4.ll in preparation for D141060
Alex Richardson via llvm-commits
- [llvm] 83c4227 - Auto-generate test checks for tests affected by D141060
Alex Richardson via llvm-commits
- [llvm] e86d6a4 - Regenerate test checks for tests affected by D141060
Alex Richardson via llvm-commits
- [llvm] a8f8613 - Introduce and use codegen::createTargetMachineForTriple()
Alex Richardson via llvm-commits
- [llvm] eb1905d - opt: Don't exit when we can't create a TargetMachine
Alex Richardson via llvm-commits
- [PATCH] D155775: [HIP][Clang][Driver][RFC] Add driver support for C++ Parallel Algorithm Offload
Alex Voicu via Phabricator via llvm-commits
- [PATCH] D155775: [HIP][Clang][Driver][RFC] Add driver support for C++ Parallel Algorithm Offload
Alex Voicu via Phabricator via llvm-commits
- [PATCH] D155775: [HIP][Clang][Driver][RFC] Add driver support for C++ Parallel Algorithm Offload
Alex Voicu via Phabricator via llvm-commits
- [PATCH] D155775: [HIP][Clang][Driver][RFC] Add driver support for C++ Parallel Algorithm Offload
Alex Voicu via Phabricator via llvm-commits
- [PATCH] D155775: [HIP][Clang][Driver][RFC] Add driver support for C++ Parallel Algorithm Offload
Alex Voicu via Phabricator via llvm-commits
- [PATCH] D155775: [HIP][Clang][Driver][RFC] Add driver support for C++ Parallel Algorithm Offload
Alex Voicu via Phabricator via llvm-commits
- [llvm] [InstCombine] Add combines/simplifications for `llvm.ptrmask` (PR #67166)
Alexander Richardson via llvm-commits
- [llvm] [RISCV][MC] Implement evaluateBranch for auipc+jalr pairs (PR #65480)
Alexander Richardson via llvm-commits
- [llvm] [RISC-V][MC] Accept an absolute variable value as a CSR number (PR #67377)
Alexander Richardson via llvm-commits
- [llvm] [RISCV][MC] Implement evaluateBranch for auipc+jalr pairs (PR #65480)
Alexander Richardson via llvm-commits
- [llvm] [RISCV][MC] Implement evaluateBranch for auipc+jalr pairs (PR #65480)
Alexander Richardson via llvm-commits
- [llvm] [RISCV][MC] Implement evaluateBranch for auipc+jalr pairs (PR #65480)
Alexander Richardson via llvm-commits
- [compiler-rt] [builtins][NFC] Remove last usage of CRT_LDBL_128BIT (PR #68041)
Alexander Richardson via llvm-commits
- [compiler-rt] [builtins][NFC] Remove last usage of CRT_LDBL_128BIT (PR #68041)
Alexander Richardson via llvm-commits
- [compiler-rt] [builtins][NFC] Avoid using CRT_LDBL_128BIT in tests (PR #66832)
Alexander Richardson via llvm-commits
- [compiler-rt] [builtins][NFC] Avoid using CRT_LDBL_128BIT in tests (PR #66832)
Alexander Richardson via llvm-commits
- [compiler-rt] [builtins] Support building the 128-bit float functions on x86 (PR #68132)
Alexander Richardson via llvm-commits
- [compiler-rt] [builtins][NFC] Avoid using CRT_LDBL_128BIT in tests (PR #66832)
Alexander Richardson via llvm-commits
- [compiler-rt] [builtins] Support building the 128-bit float functions on x86 (PR #68132)
Alexander Richardson via llvm-commits
- [compiler-rt] [compiler-rt] Implement __extendxftf2 and __trunctfxf2 for x86_64 (PR #66918)
Alexander Richardson via llvm-commits
- [compiler-rt] [compiler-rt] Implement __extendxftf2 and __trunctfxf2 for x86_64 (PR #66918)
Alexander Richardson via llvm-commits
- [compiler-rt] [compiler-rt] Implement __extendxftf2 and __trunctfxf2 for x86_64 (PR #66918)
Alexander Richardson via llvm-commits
- [llvm] [runtimes] Fix parsing of LIB{CXX,CXXABI,UNWIND}_TEST_PARAMS (PR #67691)
Alexander Richardson via llvm-commits
- [llvm] [RISC-V][MC] Accept an absolute variable value as a CSR number (PR #67377)
Alexander Richardson via llvm-commits
- [llvm] [RISC-V][MC] Accept an absolute variable value as a CSR number (PR #67377)
Alexander Richardson via llvm-commits
- [compiler-rt] [compiler-rt] Implement __extendxftf2 and __trunctfxf2 for x86_64 (PR #66918)
Alexander Richardson via llvm-commits
- [PATCH] D141057: Introduce and use codegen::createTargetMachineForTriple()
Alexander Richardson via Phabricator via llvm-commits
- [PATCH] D141060: [opt] Infer DataLayout from triple if not specified
Alexander Richardson via Phabricator via llvm-commits
- [PATCH] D141057: Introduce and use codegen::createTargetMachineForTriple()
Alexander Richardson via Phabricator via llvm-commits
- [PATCH] D141057: Introduce and use codegen::createTargetMachineForTriple()
Alexander Richardson via Phabricator via llvm-commits
- [PATCH] D141060: [opt] Infer DataLayout from triple if not specified
Alexander Richardson via Phabricator via llvm-commits
- [PATCH] D141060: [opt] Infer DataLayout from triple if not specified
Alexander Richardson via Phabricator via llvm-commits
- [PATCH] D141060: [opt] Infer DataLayout from triple if not specified
Alexander Richardson via Phabricator via llvm-commits
- [PATCH] D141057: Introduce and use codegen::createTargetMachineForTriple()
Alexander Richardson via Phabricator via llvm-commits
- [PATCH] D141057: Introduce and use codegen::createTargetMachineForTriple()
Alexander Richardson via Phabricator via llvm-commits
- [llvm] [Object] Remove restriction universal archives having both IR and native (PR #67505)
Alexander Shaposhnikov via llvm-commits
- [llvm] [Object] Remove restriction universal archives having both IR and native (PR #67505)
Alexander Shaposhnikov via llvm-commits
- [compiler-rt] [compiler-rt] Implement __extendxftf2 and __trunctfxf2 for x86_64 (PR #66918)
Alexander Shaposhnikov via llvm-commits
- [llvm] [Object] Remove restriction universal archives having both IR and native (PR #67505)
Alexander Shaposhnikov via llvm-commits
- [compiler-rt] [compiler-rt] Implement __extendxftf2 and __trunctfxf2 for x86_64 (PR #66918)
Alexander Shaposhnikov via llvm-commits
- [compiler-rt] [compiler-rt] Implement __extendxftf2 and __trunctfxf2 for x86_64 (PR #66918)
Alexander Shaposhnikov via llvm-commits
- [compiler-rt] [compiler-rt] Implement __extendxftf2 and __trunctfxf2 for x86_64 (PR #66918)
Alexander Shaposhnikov via llvm-commits
- [compiler-rt] [compiler-rt] Implement __extendxftf2 and __trunctfxf2 for x86_64 (PR #66918)
Alexander Shaposhnikov via llvm-commits
- [compiler-rt] [builtins] Support building the 128-bit float functions on x86 (PR #68132)
Alexander Shaposhnikov via llvm-commits
- [compiler-rt] [compiler-rt] Implement __extendxftf2 and __trunctfxf2 for x86_64 (PR #66918)
Alexander Shaposhnikov via llvm-commits
- [compiler-rt] [builtins] Support building the 128-bit float functions on x86 (PR #68132)
Alexander Shaposhnikov via llvm-commits
- [compiler-rt] [compiler-rt] Implement __extendxftf2 and __trunctfxf2 for x86_64 (PR #66918)
Alexander Shaposhnikov via llvm-commits
- [compiler-rt] [compiler-rt] Implement __extendxftf2 and __trunctfxf2 for x86_64 (PR #66918)
Alexander Shaposhnikov via llvm-commits
- [compiler-rt] [compiler-rt] Implement __extendxftf2 and __trunctfxf2 for x86_64 (PR #66918)
Alexander Shaposhnikov via llvm-commits
- [compiler-rt] [compiler-rt] Implement __extendxftf2 and __trunctfxf2 for x86_64 (PR #66918)
Alexander Shaposhnikov via llvm-commits
- [compiler-rt] [compiler-rt] Implement __extendxftf2 and __trunctfxf2 for x86_64 (PR #66918)
Alexander Shaposhnikov via llvm-commits
- [compiler-rt] [compiler-rt] Implement __extendxftf2 and __trunctfxf2 for x86_64 (PR #66918)
Alexander Shaposhnikov via llvm-commits
- [compiler-rt] [compiler-rt] Implement __extendxftf2 and __trunctfxf2 for x86_64 (PR #66918)
Alexander Shaposhnikov via llvm-commits
- [llvm] [LLVM][DWARF] Add support for monolithic types in .debug_names (PR #68131)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Add support for monolithic types in .debug_names (PR #68131)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Add support for monolithic types in .debug_names (PR #68131)
Alexander Yermolovich via llvm-commits
- [llvm] [llvm-gsymutil] Print a DWO file missing warning under --quiet flag (PR #68062)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT] Fix typos (PR #68121)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Create thread safe context for DWP DWARFContext (PR #68262)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Create thread safe context for DWP DWARFContext (PR #68262)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Add support for monolithic types in .debug_names (PR #68131)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Add support for monolithic types in .debug_names (PR #68131)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Add support for monolithic types in .debug_names (PR #68131)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Create thread safe context for DWP DWARFContext (PR #68262)
Alexander Yermolovich via llvm-commits
- [llvm] [llvm-gsymutil] Print a DWO file missing warning under --quiet flag (PR #68062)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Add support for monolithic types in .debug_names (PR #68131)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Add support for monolithic types in .debug_names (PR #68131)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Add support for monolithic types in .debug_names (PR #68131)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Add support for monolithic types in .debug_names (PR #68131)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Add support for monolithic types in .debug_names (PR #68131)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Add support for monolithic types in .debug_names (PR #68131)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Add support for monolithic types in .debug_names (PR #68131)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Change to consistently print out abbrev code. (PR #68353)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Change to consistently print out abbrev code. (PR #68353)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Add support for monolithic types in .debug_names (PR #68131)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Add support for monolithic types in .debug_names (PR #68131)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Add support for monolithic types in .debug_names (PR #68131)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Change to consistently print out abbrev code. (PR #68353)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Change to consistently print out abbrev code. (PR #68353)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Add support for monolithic types in .debug_names (PR #68131)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Add support for monolithic types in .debug_names (PR #68131)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Add support for monolithic types in .debug_names (PR #68131)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Add support for monolithic types in .debug_names (PR #68131)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Change to consistently print out abbrev code. (PR #68353)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Change to consistently print out abbrev code. (PR #68353)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Change to consistently print out abbrev code. (PR #68353)
Alexander Yermolovich via llvm-commits
- [llvm] [DWARF] Change to consistently print out abbrev code in .debug_names (PR #68353)
Alexander Yermolovich via llvm-commits
- [llvm] [DWARF] Change to consistently print out abbrev code in .debug_names (PR #68353)
Alexander Yermolovich via llvm-commits
- [llvm] [DWARF] Change to consistently print out abbrev code in .debug_names (PR #68353)
Alexander Yermolovich via llvm-commits
- [llvm] [DWARF] Change to consistently print out abbrev code in .debug_names (PR #68353)
Alexander Yermolovich via llvm-commits
- [llvm] [DWARF] Change to consistently print out abbrev code in .debug_names (PR #68353)
Alexander Yermolovich via llvm-commits
- [llvm] [DWARF] Change to consistently print out abbrev code in .debug_names (PR #68353)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Create thread safe context for DWP DWARFContext (PR #68262)
Alexander Yermolovich via llvm-commits
- [llvm] [DWARF] Change to consistently print out abbrev code in .debug_names (PR #68353)
Alexander Yermolovich via llvm-commits
- [llvm] [RISCV][Zba] Optimize mul with SH*ADD (PR #68144)
Alexandr Lecomcev via llvm-commits
- [llvm] [RISCV][Zba] Optimize mul with SH*ADD (PR #68144)
Alexandr Lecomcev via llvm-commits
- [compiler-rt] 262e288 - [compiler-rt] Fix MSVC `/external` detection in cmake scripts
Alexandre Ganea via llvm-commits
- [compiler-rt] 2385cf6 - [compiler-rt] Fix "interception" file name
Alexandre Ganea via llvm-commits
- [compiler-rt] 6f2358e - [compiler-rt][asan] Silence MSVC warning
Alexandre Ganea via llvm-commits
- [compiler-rt] 82694d9 - [compiler-rt][asan] Silence MSVC warning
Alexandre Ganea via llvm-commits
- [compiler-rt] d58fb40 - [compiler-rt][asan] Silence warning
Alexandre Ganea via llvm-commits
- [lld] [lld][COFF][LTO] Implement /lldemit:llvm option (PR #66964)
Alexandre Ganea via llvm-commits
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Alexandre Ganea via llvm-commits
- [lld] 52d9f76 - [LLD][COFF] Remove unused `DebugSHandler::recordStringTableReferences`
Alexandre Ganea via llvm-commits
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Alexandre Ganea via llvm-commits
- [lld] [lld][COFF][LTO] Implement /lldemit:asm option (PR #67079)
Alexandre Ganea via llvm-commits
- [lld] [lld][COFF][LTO] Implement /lldemit:asm option (PR #67079)
Alexandre Ganea via llvm-commits
- [lld] [lld][COFF][LTO] Implement /lldemit:asm option (PR #67079)
Alexandre Ganea via llvm-commits
- [lld] [lld][COFF][LTO] Implement /lldemit:asm option (PR #67079)
Alexandre Ganea via llvm-commits
- [lld] [LLD][ELF] Don't instantiate ObjFile function but rather import it (PR #68025)
Alexandre Ganea via llvm-commits
- [lld] [LLD][ELF] Import `ObjFile::importCmseSymbols` at point of usage (PR #68025)
Alexandre Ganea via llvm-commits
- [lld] [LLD][ELF] Import `ObjFile::importCmseSymbols` at call site (PR #68025)
Alexandre Ganea via llvm-commits
- [lld] [LLD][ELF] Import `ObjFile::importCmseSymbols` at call site (PR #68025)
Alexandre Ganea via llvm-commits
- [lld] [lld][COFF][LTO] Implement /lldemit:asm option (PR #67079)
Alexandre Ganea via llvm-commits
- [lld] [lld][COFF][LTO] Implement /lldemit:asm option (PR #67079)
Alexandre Ganea via llvm-commits
- [lld] [LLD] [COFF] Fix handling of comdat .drectve sections (PR #68116)
Alexandre Ganea via llvm-commits
- [lld] [LLD] [COFF] Fix handling of comdat .drectve sections (PR #68116)
Alexandre Ganea via llvm-commits
- [lld] [LLD] [COFF] Fix handling of comdat .drectve sections (PR #68116)
Alexandre Ganea via llvm-commits
- [lld] [LLD] [COFF] Fix handling of comdat .drectve sections (PR #68116)
Alexandre Ganea via llvm-commits
- [lld] [LLD] [COFF] Fix handling of comdat .drectve sections (PR #68116)
Alexandre Ganea via llvm-commits
- [lld] [lld][COFF][LTO] Implement /lldemit:asm option (PR #67079)
Alexandre Ganea via llvm-commits
- [lld] Mark operator== const to avoid ambiguity in C++20. (PR #68119)
Alexandre Ganea via llvm-commits
- [lld] Mark operator== const to avoid ambiguity in C++20. (PR #68119)
Alexandre Ganea via llvm-commits
- [lld] [LLD] Mark operator== const to avoid ambiguity in C++20. (PR #68119)
Alexandre Ganea via llvm-commits
- [lld] [LLD][COFF] Mark operator== const to avoid ambiguity in C++20. (PR #68119)
Alexandre Ganea via llvm-commits
- [lld] [LLD][COFF] Mark operator== const to avoid ambiguity in C++20. (PR #68119)
Alexandre Ganea via llvm-commits
- [llvm] [LLD][COFF] Add support for `--time-trace` (PR #68236)
Alexandre Ganea via llvm-commits
- [llvm] [LLD][COFF] Add support for `--time-trace` (PR #68236)
Alexandre Ganea via llvm-commits
- [lld] [LLD][COFF] Add support for `--time-trace` (PR #68236)
Alexandre Ganea via llvm-commits
- [llvm] [LLD][COFF] Add support for `--time-trace` (PR #68236)
Alexandre Ganea via llvm-commits
- [lld] [LLD][COFF] Add support for `--time-trace` (PR #68236)
Alexandre Ganea via llvm-commits
- [lld] [LLD][COFF] Add support for `--time-trace` (PR #68236)
Alexandre Ganea via llvm-commits
- [lld] [LLD][COFF] Add support for `--time-trace` (PR #68236)
Alexandre Ganea via llvm-commits
- [llvm] 263a00f - [COST][AARCH64]Fix crash in cost calculation for shuffles.
Alexey Bataev via llvm-commits
- [llvm] d0d6083 - [SLP][NFC]Fix assert message, NFC.
Alexey Bataev via llvm-commits
- [llvm] 6f43d28 - [IR]Add NumSrcElts param to is..Mask static function in ShuffleVectorInst.
Alexey Bataev via llvm-commits
- [llvm] 1129dec - Revert "[IR]Add NumSrcElts param to is..Mask static function in ShuffleVectorInst."
Alexey Bataev via llvm-commits
- [llvm] ff48e83 - [SLP][NFC]Add a test for reused extracts corner case, NFC.
Alexey Bataev via llvm-commits
- [llvm] b186f1f - [IR]Add NumSrcElts param to is..Mask static function in ShuffleVectorInst.
Alexey Bataev via llvm-commits
- [llvm] 2c49311 - [SLP][NFC]Add insertsubvector test with small source vector, NFC.
Alexey Bataev via llvm-commits
- [llvm] e22818d - [IR]Add NumSrcElts param to is..Mask static function in ShuffleVectorInst.
Alexey Bataev via llvm-commits
- [llvm] [SLP]Improve isGatherShuffledEntry by trying per-register shuffle. (PR #66542)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Improve isGatherShuffledEntry by trying per-register shuffle. (PR #66542)
Alexey Bataev via llvm-commits
- [PATCH] D99750: [LV, VP]VP intrinsics support for the Loop Vectorizer
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D99750: [LV, VP]VP intrinsics support for the Loop Vectorizer
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D158449: [IR]Add NumSrcElts param to is..Mask static function in ShuffleVectorInst.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D99750: [LV, VP]VP intrinsics support for the Loop Vectorizer
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D158449: [IR]Add NumSrcElts param to is..Mask static function in ShuffleVectorInst.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D158449: [IR]Add NumSrcElts param to is..Mask static function in ShuffleVectorInst.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D149742: [SLP]Improve isGatherShuffledEntry by trying per-register shuffle.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D158124: [dsymutil] Add support for mergeable libraries
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- [llvm] add: hidden option to disable slow wasm pass (PR #67715)
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- [PATCH] D158124: [dsymutil] Add support for mergeable libraries
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- [llvm] [LVI] Handle icmp of ashr. (PR #68010)
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- [llvm] [AArch64][SME] Add remarks to flag lazy ZA saves, and SMSTART/SMSTOP transitions (PR #68255)
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- [llvm] [AArch64][SME] Tile slices to lazy-save/restore should be RDSVL. (PR #68403)
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- [llvm] [AArch64][SME] Tile slices to lazy-save/restore should be RDSVL. (PR #68403)
Amara Emerson via llvm-commits
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Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Legalize G_VECREDUCE_ADD bigger types (PR #68202)
Amara Emerson via llvm-commits
- [llvm] [AArch64][SME] Fix generating incorrect TBZ when lowering lazy save. (PR #68429)
Amara Emerson via llvm-commits
- [llvm] 7510f32 - [MachineSink] Fix crash due to use-after-free in a MachineInstr* cache.
Amara Emerson via llvm-commits
- [llvm] 11caef0 - [AArch64][GlobalISel][NFC] Re-generate a test.
Amara Emerson via llvm-commits
- [llvm] [BOLT] Fix 32-bit overflow in checkOffsets/checkVMA (PR #68274)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Fix 32-bit overflow in checkOffsets/checkVMA (PR #68274)
Amir Ayupov via llvm-commits
- [llvm] [AArch64][PAC] Specify Defs and Uses of PAUTH_(PROLOGUE|EPILOGUE) (PR #68205)
Anatoly Trosinenko via llvm-commits
- [llvm] [AArch64][PAC] Specify Defs and Uses of PAUTH_(PROLOGUE|EPILOGUE) (PR #68205)
Anatoly Trosinenko via llvm-commits
- [llvm] [AArch64][PAC] Specify Defs and Uses of PAUTH_(PROLOGUE|EPILOGUE) (PR #68205)
Anatoly Trosinenko via llvm-commits
- [llvm] [AArch64][PAC] Specify Defs and Uses of PAUTH_(PROLOGUE|EPILOGUE) (PR #68205)
Anatoly Trosinenko via llvm-commits
- [llvm] [AArch64][BTI] Prevent Machine Scheduler from moving branch targets (PR #68313)
Anatoly Trosinenko via llvm-commits
- [llvm] [AArch64][BTI] Prevent Machine Scheduler from moving branch targets (PR #68313)
Anatoly Trosinenko via llvm-commits
- [llvm] [AArch64] Fix for misched-branch-targets.mir test (PR #68424)
Anatoly Trosinenko via llvm-commits
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Anatoly Trosinenko via llvm-commits
- [llvm] [AArch64] Fix for misched-branch-targets.mir test (PR #68424)
Anatoly Trosinenko via llvm-commits
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Anatoly Trosinenko via llvm-commits
- [PATCH] D156716: [AArch64][PAC] Check authenticated LR value during tail call
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- [PATCH] D156716: [AArch64][PAC] Check authenticated LR value during tail call
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- [PATCH] D156716: [AArch64][PAC] Check authenticated LR value during tail call
Anatoly Trosinenko via Phabricator via llvm-commits
- [PATCH] D156716: [AArch64][PAC] Check authenticated LR value during tail call
Anatoly Trosinenko via Phabricator via llvm-commits
- [PATCH] D156716: [AArch64][PAC] Check authenticated LR value during tail call
Anatoly Trosinenko via Phabricator via llvm-commits
- [llvm] 6e594ef - Specified particular known to be good versions of Sphinx and dependencies
Andrei Lebedev via llvm-commits
- [PATCH] D154987: [lit] Implement PYTHON directive and config.prologue
Andrzej Warzynski via Phabricator via llvm-commits
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Andrzej Warzyński via llvm-commits
- [llvm] [RFC] Create floating-point semantics reference documentation (PR #68046)
Andy Kaylor via llvm-commits
- [llvm] Add divmod functions to RuntimeLibcalls.def (PR #68462)
Angelo Bulfone via llvm-commits
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Angelo Bulfone via llvm-commits
- [llvm] [R600] Unify divergent exit nodes before Structurize CFG (PR #66985)
Anshil Gandhi via llvm-commits
- [llvm] Adding Separate OpenMP Offloading Backend to `libcxx/include/__algorithm/pstl_backends` (PR #66968)
Anton Rydahl via llvm-commits
- [compiler-rt] Adding Separate OpenMP Offloading Backend to `libcxx/include/__algorithm/pstl_backends` (PR #66968)
Anton Rydahl via llvm-commits
- [llvm] Adding Separate OpenMP Offloading Backend to `libcxx/include/__algorithm/pstl_backends` (PR #66968)
Anton Rydahl via llvm-commits
- [compiler-rt] Adding Separate OpenMP Offloading Backend to `libcxx/include/__algorithm/pstl_backends` (PR #66968)
Anton Rydahl via llvm-commits
- [llvm] Adding Separate OpenMP Offloading Backend to `libcxx/include/__algorithm/pstl_backends` (PR #66968)
Anton Rydahl via llvm-commits
- [compiler-rt] Adding Separate OpenMP Offloading Backend to `libcxx/include/__algorithm/pstl_backends` (PR #66968)
Anton Rydahl via llvm-commits
- [llvm] Adding Separate OpenMP Offloading Backend to `libcxx/include/__algorithm/pstl_backends` (PR #66968)
Anton Rydahl via llvm-commits
- [compiler-rt] Adding Separate OpenMP Offloading Backend to `libcxx/include/__algorithm/pstl_backends` (PR #66968)
Anton Rydahl via llvm-commits
- [compiler-rt] Adding Separate OpenMP Offloading Backend to `libcxx/include/__algorithm/pstl_backends` (PR #66968)
Anton Rydahl via llvm-commits
- [llvm] Adding Separate OpenMP Offloading Backend to `libcxx/include/__algorithm/pstl_backends` (PR #66968)
Anton Rydahl via llvm-commits
- [llvm] [AArch64][ISel] Add support for v8.4a RCpc `ldapur`/`stlur` (PR #67879)
Antonio Frighetto via llvm-commits
- [llvm] [AArch64][ISel] Add support for v8.4a RCpc `ldapur`/`stlur` (PR #67879)
Antonio Frighetto via llvm-commits
- [llvm] [MLIR][Presburger] Fix reduce bug in Fraction class and add tests (PR #68298)
Arjun P via llvm-commits
- [llvm] [MLIR][Presburger] Fix reduce bug in Fraction class and add tests (PR #68298)
Arjun P via llvm-commits
- [llvm] [MLIR][Presburger] Fix reduce bug in Fraction class and add tests (PR #68298)
Arjun P via llvm-commits
- [llvm] [MLIR][Presburger] Fix reduce bug in Fraction class and add tests (PR #68298)
Arjun P via llvm-commits
- [llvm] [MLIR][Presburger] Fix reduce bug in Fraction class and add tests (PR #68298)
Arjun P via llvm-commits
- [llvm] [MLIR][Presburger] Fix reduce bug in Fraction class and add tests (PR #68298)
Arjun P via llvm-commits
- [llvm] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
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Artem Belevich via llvm-commits
- [llvm] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [llvm] [Target] Change `no-trap-after-noreturn` to `trap-after-noreturn` (PR #67925)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [llvm] [Target] Change `no-trap-after-noreturn` to `trap-after-noreturn` (PR #67925)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Teach NVPTX about predicates (PR #67468)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Teach NVPTX about predicates (PR #67468)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [compiler-rt] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [lld] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [lld] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [compiler-rt] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [lld] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [compiler-rt] [NVPTX] Improve lowering of v4i8 (PR #67866)
Artem Belevich via llvm-commits
- [llvm] [DiagnosticInfo] Output full file path instead of relative path (PR #68027)
Arthur Eubanks via llvm-commits
- [llvm] [DiagnosticInfo] Output full file path instead of relative path (PR #68027)
Arthur Eubanks via llvm-commits
- [llvm] [DiagnosticInfo] Output full file path instead of relative path (PR #68027)
Arthur Eubanks via llvm-commits
- [llvm] [DiagnosticInfo] Output full file path instead of relative path (PR #68027)
Arthur Eubanks via llvm-commits
- [llvm] [DiagnosticInfo] Output full file path instead of relative path (PR #68027)
Arthur Eubanks via llvm-commits
- [lld] 9d6ec28 - [lld/ELF] Don't relax R_X86_64_(REX_)GOTPCRELX when offset is too far
Arthur Eubanks via llvm-commits
- [llvm] 0738953 - Revert "[IR]Add NumSrcElts param to is..Mask static function in ShuffleVectorInst."
Arthur Eubanks via llvm-commits
- [llvm] [mlgo][coro] Fix Issue #62616 (PR #68263)
Arthur Eubanks via llvm-commits
- [PATCH] D156345: RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG
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- [PATCH] D156345: RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D157020: [lld/ELF] Don't relax R_X86_64_(REX_)GOTPCRELX when offset is too far
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- [PATCH] D158449: [IR]Add NumSrcElts param to is..Mask static function in ShuffleVectorInst.
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D157020: [lld/ELF] Don't relax R_X86_64_(REX_)GOTPCRELX when offset is too far
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- [PATCH] D155472: [DAG] Attempt shl narrowing in SimplifyDemandedBits
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- [PATCH] D155472: [DAG] Attempt shl narrowing in SimplifyDemandedBits
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- [PATCH] D158449: [IR]Add NumSrcElts param to is..Mask static function in ShuffleVectorInst.
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- [PATCH] D137149: Use PassGate from LLVMContext if any otherwise global one
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- [llvm] [AMDGPU][IGLP] SingleWaveOpt: Cache DSW Counters from PreRA (PR #67759)
Austin Kerbow via llvm-commits
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- [llvm] add: hidden option to disable slow wasm pass (PR #67715)
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- [llvm] add: hidden option to disable slow wasm pass (PR #67715)
Austin Theriault via llvm-commits
- [llvm] add: hidden option to disable slow wasm pass (PR #67715)
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- [llvm] [mlir][memref]: Add expand/collapse rewrite pattern to MemRef::CopyOp (PR #67808)
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- [PATCH] D149903: [VPlan] Replace IR based truncateToMinimalBitwidths with VPlan version.
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- [llvm] [clang][modules] Move `SLocEntry` search into `ASTReader` (PR #66966)
Ben Langmuir via llvm-commits
- [llvm] [clang][modules] Move `SLocEntry` search into `ASTReader` (PR #66966)
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- [llvm] [clang][modules] Move `SLocEntry` search into `ASTReader` (PR #66966)
Ben Langmuir via llvm-commits
- [llvm] [clang][modules] Move `SLocEntry` search into `ASTReader` (PR #66966)
Ben Langmuir via llvm-commits
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- [llvm] [clang][modules] Move `SLocEntry` search into `ASTReader` (PR #66966)
Ben Langmuir via llvm-commits
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- [llvm] [AVR] Fix a crash in AVRInstrInfo::insertIndirectBranch (PR #67324)
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- [lld] [lld][ELF][AVR] Add range check for R_AVR_13_PCREL (PR #67636)
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- [lld] [lld][ELF][AVR] Add range check for R_AVR_13_PCREL (PR #67636)
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Botond István Hprváth via llvm-commits
- [compiler-rt] Bugfix for chosing the correct deduction guide (PR #66487)
Botond István Hprváth via llvm-commits
- [lld] Bugfix for chosing the correct deduction guide (PR #66487)
Botond István Hprváth via llvm-commits
- [llvm] Bugfix for chosing the correct deduction guide (PR #66487)
Botond István Hprváth via llvm-commits
- [lld] Bugfix for chosing the correct deduction guide (PR #66487)
Botond István Hprváth via llvm-commits
- [llvm] Bugfix for chosing the correct deduction guide (PR #66487)
Botond István Hprváth via llvm-commits
- [compiler-rt] Bugfix for chosing the correct deduction guide (PR #66487)
Botond István Hprváth via llvm-commits
- [compiler-rt] Bugfix for chosing the correct deduction guide (PR #66487)
Botond István Hprváth via llvm-commits
- [lld] Bugfix for chosing the correct deduction guide (PR #66487)
Botond István Hprváth via llvm-commits
- [lld] Bugfix for chosing the correct deduction guide (PR #66487)
Botond István Hprváth via llvm-commits
- [llvm] Bugfix for chosing the correct deduction guide (PR #66487)
Botond István Hprváth via llvm-commits
- [compiler-rt] Bugfix for chosing the correct deduction guide (PR #66487)
Botond István Hprváth via llvm-commits
- [llvm] [Driver] Hook up Haiku ARM support (PR #67222)
Brad Smith via llvm-commits
- [llvm] [Driver] Hook up Haiku ARM support (PR #67222)
Brad Smith via llvm-commits
- [llvm] [Sparc] Replace CMP instructions with InstAlias (NFCI) (PR #66859)
Brad Smith via llvm-commits
- [llvm] [RISCV] Support VLS for VCIX (PR #67289)
Brandon Wu via llvm-commits
- [llvm] [RISCV] Support Xsfvqmaccdod and Xsfvqmaccqoq extensions (PR #68295)
Brandon Wu via llvm-commits
- [llvm] [RISCV] Support Xsfvfwmaccqqq extensions (PR #68296)
Brandon Wu via llvm-commits
- [llvm] [RISCV] Support Xsfvfnrclipxfqf extensions (PR #68297)
Brandon Wu via llvm-commits
- [llvm] [RISCV] Support VLS for VCIX (PR #67289)
Brandon Wu via llvm-commits
- [llvm] [RISCV] Support Xsfvqmaccdod and Xsfvqmaccqoq extensions (PR #68295)
Brandon Wu via llvm-commits
- [llvm] [RISCV] Support Xsfvfwmaccqqq extensions (PR #68296)
Brandon Wu via llvm-commits
- [llvm] [RISCV] Support Xsfvfnrclipxfqf extensions (PR #68297)
Brandon Wu via llvm-commits
- [llvm] [RISCV] Fix wrong implication for zvknhb. (PR #66860)
Brandon Wu via llvm-commits
- [llvm] [RISCV] Support Xsfvqmaccdod and Xsfvqmaccqoq extensions (PR #68295)
Brandon Wu via llvm-commits
- [llvm] [RISCV] Support Xsfvfnrclipxfqf extensions (PR #68297)
Brandon Wu via llvm-commits
- [llvm] [RISCV] Support Xsfvfnrclipxfqf extensions (PR #68297)
Brandon Wu via llvm-commits
- [llvm] [RISCV] Support Xsfvqmaccdod and Xsfvqmaccqoq extensions (PR #68295)
Brandon Wu via llvm-commits
- [llvm] [RISCV] Support Xsfvfwmaccqqq extensions (PR #68296)
Brandon Wu via llvm-commits
- [llvm] [RISCV] Support VLS for VCIX (PR #67289)
Brandon Wu via llvm-commits
- [llvm] [RISCV] Support VLS for VCIX (PR #67289)
Brandon Wu via llvm-commits
- [PATCH] D155995: [AMDGPU]: Allow combining into v_dot4
Brendon Cahoon via Phabricator via llvm-commits
- [PATCH] D155995: [AMDGPU]: Allow combining into v_dot4
Brendon Cahoon via Phabricator via llvm-commits
- [llvm] [AMDGPU] Allow shinking instruction with dead sdst (PR #68028)
Carl Ritson via llvm-commits
- [llvm] [AMDGPU] Add pal metadata 3.0 support to callable pal funcs (PR #67104)
Carl Ritson via llvm-commits
- [llvm] [AMDGPU] Add pal metadata 3.0 support to callable pal funcs (PR #67104)
Carl Ritson via llvm-commits
- [llvm] [AMDGPU] Detect kills in register sets when trying to form V_CMPX instructions. (PR #68293)
Carl Ritson via llvm-commits
- [llvm] [AMDGPU] Detect kills in register sets when trying to form V_CMPX instructions. (PR #68293)
Carl Ritson via llvm-commits
- [llvm] [IPSCCP] Variable not visible at Og: (PR #66745)
Carlos Alberto Enciso via llvm-commits
- [llvm] [IPSCCP] Variable not visible at Og: (PR #66745)
Carlos Alberto Enciso via llvm-commits
- [llvm] [IPSCCP] Variable not visible at Og: (PR #66745)
Carlos Alberto Enciso via llvm-commits
- [llvm] [IPSCCP] Variable not visible at Og: (PR #66745)
Carlos Alberto Enciso via llvm-commits
- [llvm] [IPSCCP] Variable not visible at Og: (PR #66745)
Carlos Alberto Enciso via llvm-commits
- [llvm] [IPSCCP] Variable not visible at Og: (PR #66745)
Carlos Alberto Enciso via llvm-commits
- [llvm] [IPSCCP] Variable not visible at Og: (PR #66745)
Carlos Alberto Enciso via llvm-commits
- [llvm] [IPSCCP] Variable not visible at Og: (PR #66745)
Carlos Alberto Enciso via llvm-commits
- [llvm] [IPSCCP] Variable not visible at Og: (PR #66745)
Carlos Alberto Enciso via llvm-commits
- [lld] [IPSCCP] Variable not visible at Og: (PR #66745)
Carlos Alberto Enciso via llvm-commits
- [llvm] [IPSCCP] Variable not visible at Og: (PR #66745)
Carlos Alberto Enciso via llvm-commits
- [llvm] [IPSCCP] Variable not visible at Og. (PR #66745)
Carlos Alberto Enciso via llvm-commits
- [llvm] [IPSCCP] Variable not visible at Og. (PR #66745)
Carlos Alberto Enciso via llvm-commits
- [llvm] [IPSCCP] Variable not visible at Og. (PR #66745)
Carlos Alberto Enciso via llvm-commits
- [llvm] [IPSCCP] Variable not visible at Og. (PR #66745)
Carlos Alberto Enciso via llvm-commits
- [llvm] 8abb2ac - Revert "Re-apply "[AArch64] Enable "sink-and-fold" in MachineSink by default (#67432)""
Caroline Tice via llvm-commits
- [llvm] Fix typo "x84_64" (PR #68419)
Casey Carter via llvm-commits
- [llvm] Fix typo "x84_64" (PR #68419)
Casey Carter via llvm-commits
- [llvm] Fix typo "x84_64" (PR #68419)
Casey Carter via llvm-commits
- [compiler-rt] [compiler-rt] Allow Fuchsia to use 64-bit allocator for RISCV (PR #68343)
Caslyn Tonelli via llvm-commits
- [llvm] Support big endian in llvm-symbolizer's data location dwarf info parser (PR #67284)
Chen Zheng via llvm-commits
- [llvm] [PowerPC] Inline callee if its target-features are a subset of the caller (PR #67710)
Chen Zheng via llvm-commits
- [llvm] [PowerPC] Inline callee if its target-features are a subset of the caller (PR #67710)
Chen Zheng via llvm-commits
- [llvm] [PowerPC] Inline callee if its target-features are a subset of the caller (PR #67710)
Chen Zheng via llvm-commits
- [llvm] [PowerPC] Inline callee if its target-features are a subset of the caller (PR #67710)
Chen Zheng via llvm-commits
- [llvm] [DX] Add support for program signatures (PR #67346)
Chris B via llvm-commits
- [llvm] f2aac19 - [DX] Fix copypasta that caused big-endian failure
Chris Bieneman via llvm-commits
- [lld] [Support] Add KnownBits::computeForSubBorrow (PR #67788)
Christian Kissig via llvm-commits
- [llvm] [Target] Change `no-trap-after-noreturn` to `trap-after-noreturn` (PR #67925)
Christian Sigg via llvm-commits
- [llvm] [Target] Change `no-trap-after-noreturn` to `trap-after-noreturn` (PR #67925)
Christian Sigg via llvm-commits
- [PATCH] D145284: WIP [clang] adds capabilities for SARIF to be written to file
Christoph Rüthing via Phabricator via llvm-commits
- [llvm] [Sema] Use underlying type of scoped enum for -Wformat diagnostics (PR #67378)
Christopher Di Bella via llvm-commits
- [compiler-rt] [scudo] Mark page status in getStats in secondary (PR #67588)
Christopher Ferris via llvm-commits
- [compiler-rt] [scudo] Relax MemtagTag.SelectRandomTag. (PR #68048)
Christopher Ferris via llvm-commits
- [compiler-rt] [scudo] Fix the use of ASSERT_CAPABILITY in TSD (PR #68273)
Christopher Ferris via llvm-commits
- [compiler-rt] [scudo] Make local cache be agnostic to the type of node in freelist (PR #67379)
Christopher Ferris via llvm-commits
- [compiler-rt] [scudo] Make local cache be agnostic to the type of node in freelist (PR #67379)
Christopher Ferris via llvm-commits
- [compiler-rt] [scudo] Make local cache be agnostic to the type of node in freelist (PR #67379)
Christopher Ferris via llvm-commits
- [compiler-rt] [scudo] Improve the message of region exhaustion (PR #68444)
Christopher Ferris via llvm-commits
- [compiler-rt] [scudo] Add missing thread-safety analysis annotations. (PR #68072)
Clement Courbet via llvm-commits
- [compiler-rt] [scudo] Add missing thread-safety analysis annotations. (PR #68072)
Clement Courbet via llvm-commits
- [llvm] [libc][bazel] Add a flag to configure LIBC_NAMESPACE (PR #68093)
Clement Courbet via llvm-commits
- [compiler-rt] [scudo] Add missing thread-safety analysis annotations. (PR #68072)
Clement Courbet via llvm-commits
- [compiler-rt] [scudo] Fix the use of ASSERT_CAPABILITY in TSD (PR #68273)
Clement Courbet via llvm-commits
- [compiler-rt] [scudo] Fix the use of ASSERT_CAPABILITY in TSD (PR #68273)
Clement Courbet via llvm-commits
- [PATCH] D140828: [C++] Implement "Deducing this" (P0847R7)
Corentin Jabot via Phabricator via llvm-commits
- [llvm] [RISCV] Create new build vector instead of relying on getNode constan… (PR #67944)
Craig Topper via llvm-commits
- [llvm] [RISCV][WIP] Enable sink-and-fold for RISC-V. (PR #67602)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Add ISel supports for SHXADD from Zba extension (PR #67863)
Craig Topper via llvm-commits
- [llvm] [RISCV] A test demonstrating missed opportunity to combine `addi` into (PR #67022)
Craig Topper via llvm-commits
- [llvm] [RISCV][WIP] Enable sink-and-fold for RISC-V. (PR #67602)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add sink-and-fold support for RISC-V. (PR #67602)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add sink-and-fold support for RISC-V. (PR #67602)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add sink-and-fold support for RISC-V. (PR #67602)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add sink-and-fold support for RISC-V. (PR #67602)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add sink-and-fold support for RISC-V. (PR #67602)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add sink-and-fold support for RISC-V. (PR #67602)
Craig Topper via llvm-commits
- [llvm] [RISCV] Generalize the (ADD (SLLI X, 32), X) special case in constant… (PR #66931)
Craig Topper via llvm-commits
- [llvm] [RISCV][SelectionDAG] Sign extend splats of i32 in getConstant on RV64 (PR #67027)
Craig Topper via llvm-commits
- [llvm] [RISCV] Move vector pseudo hasAllNBitUsers switch into RISCVInstrInfo. NFC (PR #67593)
Craig Topper via llvm-commits
- [llvm] [RISCV] Fix incorrect codegen for Zfa with negated forms of constants in the lookup table (PR #68026)
Craig Topper via llvm-commits
- [llvm] [RISCV] Generalize the (ADD (SLLI X, 32), X) special case in constant… (PR #66931)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add sink-and-fold support for RISC-V. (PR #67602)
Craig Topper via llvm-commits
- [llvm] [RISCV] Generaize reduction tree matching to all integer reductions (PR #68014)
Craig Topper via llvm-commits
- [llvm] [RISCV] Relax some Zvbb patterns and lowerings to Zvkb (PR #68115)
Craig Topper via llvm-commits
- [llvm] [RISCV] Mark the Zfa extension as non-experimental (PR #68113)
Craig Topper via llvm-commits
- [llvm] [RISCV] Support VLS for VCIX (PR #67289)
Craig Topper via llvm-commits
- [llvm] [RISCV] Relax some Zvbb patterns and lowerings to Zvkb (PR #68115)
Craig Topper via llvm-commits
- [llvm] [RISCV] Update Zfa extension version to 1.0 (PR #67964)
Craig Topper via llvm-commits
- [llvm] [RISCV] Mark the Zfa extension as non-experimental (PR #68113)
Craig Topper via llvm-commits
- [llvm] [RISCV][GlobalISel] Select G_PTR_ADD (PR #67605)
Craig Topper via llvm-commits
- [llvm] [RISCV][Zba] Optimize mul with SH*ADD (PR #68144)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (PR #67614)
Craig Topper via llvm-commits
- [llvm] [RISCV][GlobalISel] Legalize G_FRAME_INDEX (PR #67746)
Craig Topper via llvm-commits
- [llvm] [RISCV][GlobalISel] Select G_ICMP, G_LOAD, G_STORE, G_ZEXTLOAD (PR #67619)
Craig Topper via llvm-commits
- [llvm] [RISCV][GlobalISel] Select G_ICMP, G_LOAD, G_STORE, G_ZEXTLOAD (PR #67619)
Craig Topper via llvm-commits
- [llvm] [RISCV][GlobalISel] Select G_ICMP, G_LOAD, G_STORE, G_ZEXTLOAD (PR #67619)
Craig Topper via llvm-commits
- [llvm] [RISCV][GlobalISel] Select G_ICMP, G_LOAD, G_STORE, G_ZEXTLOAD (PR #67619)
Craig Topper via llvm-commits
- [llvm] [RISCV] Relax vslide*_vl patterns to allow any mask. NFC (PR #68203)
Craig Topper via llvm-commits
- [llvm] [RISCV] Use LMUL=1 for vmv_s_x_vl with non-undef passthru (PR #66659)
Craig Topper via llvm-commits
- [llvm] ISel: introduce vector ISD::LRINT, ISD::LLRINT; custom RISCV lowering (PR #66924)
Craig Topper via llvm-commits
- [llvm] ISel: introduce vector ISD::LRINT, ISD::LLRINT; custom RISCV lowering (PR #66924)
Craig Topper via llvm-commits
- [llvm] ISel: introduce vector ISD::LRINT, ISD::LLRINT; custom RISCV lowering (PR #66924)
Craig Topper via llvm-commits
- [llvm] [RISCV] Use LMUL=1 for vmv_s_x_vl with non-undef passthru (PR #66659)
Craig Topper via llvm-commits
- [llvm] [RISCV][CostModel] VPIntrinsics have same cost as their non-vp counterparts (PR #67178)
Craig Topper via llvm-commits
- [llvm] [RISCV][CostModel] VPIntrinsics have same cost as their non-vp counterparts (PR #67178)
Craig Topper via llvm-commits
- [llvm] [RISCV][CostModel] VPIntrinsics have same cost as their non-vp counterparts (PR #67178)
Craig Topper via llvm-commits
- [llvm] [RISCV][CostModel] VPIntrinsics have same cost as their non-vp counterparts (PR #67178)
Craig Topper via llvm-commits
- [llvm] [RISCV][CostModel] VPIntrinsics have same cost as their non-vp counterparts (PR #67178)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add MC layer support for Zicfiss. (PR #66043)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add MC layer support for Zicfiss. (PR #66043)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add MC layer support for Zicfiss. (PR #66043)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add MC layer support for Zicfiss. (PR #66043)
Craig Topper via llvm-commits
- [llvm] [RISCV][ISel] Fix comment to match direction of predicate in code. NFC. (PR #68248)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Craig Topper via llvm-commits
- [llvm] [RISCV][CostModel] VPIntrinsics have same cost as their non-vp counterparts (PR #67178)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Craig Topper via llvm-commits
- [llvm] [RISCV][GlobalISel] Lower calls to variadic functions (PR #68271)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Craig Topper via llvm-commits
- [llvm] [RISCV][GlobalISel] Select G_FRAME_INDEX (PR #68254)
Craig Topper via llvm-commits
- [llvm] [RISCV][GlobalISel] Select G_FRAME_INDEX (PR #68254)
Craig Topper via llvm-commits
- [llvm] [TableGen][GISel] Fix incorrect binding of predicate operands upon `PredicateUsesOperands = 1` (PR #68125)
Craig Topper via llvm-commits
- [llvm] [RISCV] Fix wrong implication for zvknhb. (PR #66860)
Craig Topper via llvm-commits
- [llvm] [RISCV] Fix wrong implication for zvknhb. (PR #66860)
Craig Topper via llvm-commits
- [llvm] [RISCV] Fix wrong implication for zvknhb. (PR #66860)
Craig Topper via llvm-commits
- [llvm] [RISCV] Fix wrong implication for zvknhb. (PR #66860)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Craig Topper via llvm-commits
- [llvm] [RISCV] Support Xsfvqmaccdod and Xsfvqmaccqoq extensions (PR #68295)
Craig Topper via llvm-commits
- [llvm] [RISCV] Support Xsfvqmaccdod and Xsfvqmaccqoq extensions (PR #68295)
Craig Topper via llvm-commits
- [llvm] [RISCV] Support Xsfvqmaccdod and Xsfvqmaccqoq extensions (PR #68295)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Craig Topper via llvm-commits
- [llvm] [InstCombine] Retain exact instruction name for some cases in Simplif… (PR #68371)
Craig Topper via llvm-commits
- [llvm] [InstCombine] Retain exact instruction name for some cases in SimplifyDemandedUseBits. (PR #68371)
Craig Topper via llvm-commits
- [llvm] [InstCombine] Retain exact instruction name for some cases in SimplifyDemandedUseBits. (PR #68371)
Craig Topper via llvm-commits
- [llvm] [RISCV] Strip W suffix from ADDIW, SRLIW, and SRAIW (PR #68425)
Craig Topper via llvm-commits
- [llvm] [RISCV] Strip W suffix from ADDIW, SRLIW, and SRAIW (PR #68425)
Craig Topper via llvm-commits
- [llvm] [RISCV] Strip W suffix from ADDIW, SRLIW, and SRAIW (PR #68425)
Craig Topper via llvm-commits
- [llvm] [RISCV] Strip W suffix from ADDIW, SRLIW, and SRAIW (PR #68425)
Craig Topper via llvm-commits
- [llvm] [InstCombine] Retain exact instruction name for some cases in SimplifyDemandedUseBits. (PR #68371)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Add ISel supports for SHXADD from Zba extension (PR #67863)
Craig Topper via llvm-commits
- [llvm] [RISCV] Strip W suffix from ADDIW, SRLIW, and SRAIW (PR #68425)
Craig Topper via llvm-commits
- [llvm] [RISCV] Strip W suffix from ADDIW (PR #68425)
Craig Topper via llvm-commits
- [lld] [RISCV][GlobalISel] Select G_FRAME_INDEX (PR #68254)
Craig Topper via llvm-commits
- [llvm] [RISCV][GlobalISel] Select G_ICMP, G_LOAD, G_STORE, G_ZEXTLOAD (PR #67619)
Craig Topper via llvm-commits
- [llvm] [RISCV][GlobalISel] Select G_ICMP, G_LOAD, G_STORE, G_ZEXTLOAD (PR #67619)
Craig Topper via llvm-commits
- [llvm] ee9f96b - [RISCV][GISel] Add FPR register bank.
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Add isel patterns for ADDIW/SRLIW/SRAIW/SLLIW and remo… (PR #68470)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Add isel patterns for ADDIW/SRLIW/SRAIW/SLLIW and remove custom selection. (PR #68470)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Add isel patterns for ADDIW/SRLIW/SRAIW/SLLIW and remove custom selection. (PR #68470)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add sink-and-fold support for RISC-V. (PR #67602)
Craig Topper via llvm-commits
- [llvm] [RISCV][GlobalISel] Lower calls to variadic functions (PR #68271)
Craig Topper via llvm-commits
- [llvm] [RISCV][GlobalISel] Select G_PTR_ADD (PR #67605)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add sink-and-fold support for RISC-V. (PR #67602)
Craig Topper via llvm-commits
- [llvm] [RISCV][NFC] Add base classes of Operand and uimm/simm (PR #68472)
Craig Topper via llvm-commits
- [PATCH] D99750: [LV, VP]VP intrinsics support for the Loop Vectorizer
Craig Topper via Phabricator via llvm-commits
- [PATCH] D158291: [PoC][WIP] Add an AArch64 specific pass for loop idiom recognition
Craig Topper via Phabricator via llvm-commits
- [PATCH] D88663: [AArch64] Use TargetRegisterClass::hasSubClassEq in tryToFindRegisterToRename
Cullen Rhodes via Phabricator via llvm-commits
- [PATCH] D154869: [Flang] [FlangRT] Introduce FlangRT project as solution to Flang's runtime LLVM integration
Daniel Chen via Phabricator via llvm-commits
- [PATCH] D157547: Arm64EC entry/exit thunks, consolidated.
Daniel Paoliello via Phabricator via llvm-commits
- [llvm] [Object] Remove restriction universal archives having both IR and native (PR #67505)
Daniel Rodríguez Troitiño via llvm-commits
- [llvm] [Object] Remove restriction universal archives having both IR and native (PR #67505)
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Felipe de Azevedo Piovezan via llvm-commits
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Felipe de Azevedo Piovezan via llvm-commits
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Felipe de Azevedo Piovezan via llvm-commits
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Giulio Eulisse via llvm-commits
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Giulio Eulisse via llvm-commits
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Giulio Eulisse via llvm-commits
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Giulio Eulisse via llvm-commits
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Giulio Eulisse via llvm-commits
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Giulio Eulisse via llvm-commits
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Giulio Eulisse via llvm-commits
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Giulio Eulisse via llvm-commits
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Giulio Eulisse via llvm-commits
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Giulio Eulisse via llvm-commits
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Giulio Eulisse via llvm-commits
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Giulio Eulisse via llvm-commits
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Giulio Eulisse via llvm-commits
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Giulio Eulisse via llvm-commits
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Giulio Eulisse via llvm-commits
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Giulio Eulisse via llvm-commits
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Giulio Eulisse via llvm-commits
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Giulio Eulisse via llvm-commits
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Giulio Eulisse via llvm-commits
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Giulio Eulisse via llvm-commits
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Giulio Eulisse via llvm-commits
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Giulio Eulisse via llvm-commits
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Giulio Eulisse via llvm-commits
- [llvm] Inline operator== and operator!= (PR #67958)
Giulio Eulisse via llvm-commits
- [llvm] Inline operator== and operator!= (PR #67958)
Giulio Eulisse via llvm-commits
- [llvm] [llvm-gsymutil] Print a DWO file missing warning under --quiet flag (PR #68062)
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- [lld] [lld][COFF][LTO] Implement /lldemit:llvm option (PR #66964)
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Guillaume Chatelet via llvm-commits
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- [PATCH] D151848: [X86, Peephole] Enable FoldImmediate for X86
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- [llvm] [MLIR][NVGPU] Introduce `nvgpu.wargroup.mma.store` Op for Hopper GPUs (PR #65441)
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Guray Ozen via llvm-commits
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Heejin Ahn via llvm-commits
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Heejin Ahn via llvm-commits
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Heejin Ahn via llvm-commits
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Heejin Ahn via llvm-commits
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Heejin Ahn via llvm-commits
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Heejin Ahn via llvm-commits
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Heejin Ahn via llvm-commits
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Heejin Ahn via llvm-commits
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Heejin Ahn via llvm-commits
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Heejin Ahn via llvm-commits
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Heejin Ahn via llvm-commits
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Heejin Ahn via llvm-commits
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Heejin Ahn via llvm-commits
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Heejin Ahn via llvm-commits
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Heejin Ahn via llvm-commits
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Heejin Ahn via llvm-commits
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J. Ryan Stinnett via llvm-commits
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J. Ryan Stinnett via llvm-commits
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J. Ryan Stinnett via llvm-commits
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J. Ryan Stinnett via llvm-commits
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Jakub Kuderski via llvm-commits
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Jakub Kuderski via llvm-commits
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- [llvm] [clang][modules] Move `SLocEntry` search into `ASTReader` (PR #66966)
Jan Svoboda via llvm-commits
- [llvm] [clang][modules] Move `SLocEntry` search into `ASTReader` (PR #66966)
Jan Svoboda via llvm-commits
- [PATCH] D147079: InlineSpiller: Consider if all subranges are the same when avoiding redundant spills
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- [PATCH] D147079: InlineSpiller: Consider if all subranges are the same when avoiding redundant spills
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- [llvm] [AMDGPU] Add another SIFoldOperands instance after shrink (PR #67878)
Jay Foad via llvm-commits
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Jay Foad via llvm-commits
- [llvm] [AMDGPU][CodeGen] Fold immediates in src1 operands of V_MAD/MAC/FMA/FMAC. (PR #68002)
Jay Foad via llvm-commits
- [llvm] Remove fold immediates from shrink (PR #68045)
Jay Foad via llvm-commits
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- [llvm] [AMDGPU] Allow shinking instruction with dead sdst (PR #68028)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Allow shinking instruction with dead sdst (PR #68028)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Allow shinking instruction with dead sdst (PR #68028)
Jay Foad via llvm-commits
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Jay Foad via llvm-commits
- [llvm] [AMDGPU][CodeGen] Fold immediates in src1 operands of V_MAD/MAC/FMA/FMAC. (PR #68002)
Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
- [llvm] [AMDGPU][CodeGen] Fold immediates in src1 operands of V_MAD/MAC/FMA/FMAC. (PR #68002)
Jay Foad via llvm-commits
- [llvm] [AMDGPU][CodeGen] Fold immediates in src1 operands of V_MAD/MAC/FMA/FMAC. (PR #68002)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Add encoding/decoding support for non-result-returning ATOMIC_CSUB instructions (PR #68197)
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
- [llvm] [AMDGPU][CodeGen] Fold immediates in src1 operands of V_MAD/MAC/FMA/FMAC. (PR #68002)
Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
- [llvm] [AMDGPU][CodeGen] Fold immediates in src1 operands of V_MAD/MAC/FMA/FMAC. (PR #68002)
Jay Foad via llvm-commits
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Jay Foad via llvm-commits
- [compiler-rt] [AMDGPU] Add another SIFoldOperands instance after shrink (PR #67878)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Add another SIFoldOperands instance after shrink (PR #67878)
Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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- [llvm] [AMDGPU][GlobalIsel] Introduce isRegType to check for legal types, instead of checking bit width. (PR #68189)
Jay Foad via llvm-commits
- [llvm] [AMDGPU][GlobalIsel] Introduce isRegType to check for legal types, instead of checking bit width. (PR #68189)
Jay Foad via llvm-commits
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Jay Foad via llvm-commits
- [llvm] [AMDGPU][GlobalIsel] Introduce isRegType to check for legal types, instead of checking bit width. (PR #68189)
Jay Foad via llvm-commits
- [llvm] [AMDGPU][GlobalIsel] Introduce isRegType to check for legal types, instead of checking bit width. (PR #68189)
Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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- [llvm] [RISC-V][MC] Accept an absolute variable value as a CSR number (PR #67377)
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Jessica Clarke via llvm-commits
- [llvm] [RISCV] Avoid using x7/t2 for indirect branches which need landing pad. (PR #68292)
Jessica Clarke via llvm-commits
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Jessica Clarke via llvm-commits
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Jessica Clarke via llvm-commits
- [llvm] [RISCV] Support fptoi like ops for fp16 vectors input when only have Zvfhmin (PR #67532)
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- [llvm] 2214026 - [CodeGen] Fix -Wunused-variable in RegisterCoalescer.cpp (NFC)
Jie Fu via llvm-commits
- [llvm] 7e77f19 - [TTI] Fix -Wsign-compare in BasicTTIImpl.h (NFC)
Jie Fu via llvm-commits
- [llvm] [MC][NFC] Allow MCInstrAnalysis to store state (PR #65479)
Job Noorman via llvm-commits
- [llvm] [RISCV][MC] Implement evaluateBranch for auipc+jalr pairs (PR #65480)
Job Noorman via llvm-commits
- [llvm] [RISCV][MC] Implement evaluateBranch for auipc+jalr pairs (PR #65480)
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- [llvm] [RISCV][MC] Implement evaluateBranch for auipc+jalr pairs (PR #65480)
Job Noorman via llvm-commits
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Job Noorman via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Job Noorman via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Job Noorman via llvm-commits
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Job Noorman via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Job Noorman via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Job Noorman via llvm-commits
- [llvm] [RISCV][MC] Implement evaluateBranch for auipc+jalr pairs (PR #65480)
Job Noorman via llvm-commits
- [llvm] [RISCV][MC] Implement evaluateBranch for auipc+jalr pairs (PR #65480)
Job Noorman via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Job Noorman via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Job Noorman via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Job Noorman via llvm-commits
- [llvm] [RISCV][MC] Implement evaluateBranch for auipc+jalr pairs (PR #65480)
Job Noorman via llvm-commits
- [llvm] [RISCV][MC] Implement evaluateBranch for auipc+jalr pairs (PR #65480)
Job Noorman via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Job Noorman via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Job Noorman via llvm-commits
- [llvm] [BOLT][RISCV] Implement TLS le/ie relocations (PR #67112)
Job Noorman via llvm-commits
- [llvm] [BOLT][RISCV] Implement TLS le/ie relocations (PR #67112)
Job Noorman via llvm-commits
- [llvm] [BOLT][RISCV] Handle long tail calls (PR #67098)
Job Noorman via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Job Noorman via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Job Noorman via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Job Noorman via llvm-commits
- [llvm] [BOLT][NFC] Add MCSubtargetInfo to MCPlusBuilder (PR #68223)
Job Noorman via llvm-commits
- [llvm] [BOLT] Fix typos (PR #68121)
Job Noorman via llvm-commits
- [llvm] [BOLT][RISCV] Implement TLS le/ie relocations (PR #67112)
Job Noorman via llvm-commits
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Job Noorman via llvm-commits
- [llvm] [BOLT] Improve handling of relocations targeting specific instructions (PR #66395)
Job Noorman via llvm-commits
- [llvm] [BOLT] Improve handling of relocations targeting specific instructions (PR #66395)
Job Noorman via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Job Noorman via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Job Noorman via llvm-commits
- [llvm] [JITLink][RISCV] Implement eh_frame handling (PR #68253)
Job Noorman via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Job Noorman via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Job Noorman via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Job Noorman via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Job Noorman via llvm-commits
- [llvm] [BOLT][NFC] Add MCSubtargetInfo to MCPlusBuilder (PR #68223)
Job Noorman via llvm-commits
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Job Noorman via llvm-commits
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Job Noorman via llvm-commits
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Job Noorman via llvm-commits
- [PATCH] D159089: [BOLT][RISCV] Add support for linker relaxation
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- [llvm] [libc++] Prevent calling the projection more than three times (PR #66315)
Jocelyn Castellano via llvm-commits
- [compiler-rt] [libc++] Prevent calling the projection more than three times (PR #66315)
Jocelyn Castellano via llvm-commits
- [llvm] [AMDGPU][CodeGen] Fold immediates in src1 operands of V_MAD/MAC/FMA/FMAC. (PR #68002)
Joe Nash via llvm-commits
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Joe Nash via llvm-commits
- [llvm] [AMDGPU] Add another SIFoldOperands instance after shrink (PR #67878)
Joe Nash via llvm-commits
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Joe Nash via llvm-commits
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Joe Nash via llvm-commits
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Joe Nash via llvm-commits
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Joe Nash via llvm-commits
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Joe Nash via llvm-commits
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Joe Nash via llvm-commits
- [llvm] [AMDGPU][CodeGen] Fold immediates in src1 operands of V_MAD/MAC/FMA/FMAC. (PR #68002)
Joe Nash via llvm-commits
- [llvm] [AMDGPU][CodeGen] Fold immediates in src1 operands of V_MAD/MAC/FMA/FMAC. (PR #68002)
Joe Nash via llvm-commits
- [llvm] [AMDGPU][CodeGen] Fold immediates in src1 operands of V_MAD/MAC/FMA/FMAC. (PR #68002)
Joe Nash via llvm-commits
- [llvm] [AMDGPU][CodeGen] Fold immediates in src1 operands of V_MAD/MAC/FMA/FMAC. (PR #68002)
Joe Nash via llvm-commits
- [llvm] [AMDGPU] Fold operand after shrinking instruction in SIFoldOperands (PR #68426)
Joe Nash via llvm-commits
- [llvm] [lit] Fix shell commands with newlines (PR #67898)
Joel E. Denny via llvm-commits
- [llvm] [lit] Fix shell commands with newlines (PR #67898)
Joel E. Denny via llvm-commits
- [llvm] [lit] Fix shell commands with newlines (PR #67898)
Joel E. Denny via llvm-commits
- [llvm] [lit] Fix shell commands with newlines (PR #67898)
Joel E. Denny via llvm-commits
- [llvm] [lit] Clean up internal shell parse errors with ScriptFatal (PR #68496)
Joel E. Denny via llvm-commits
- [PATCH] D154987: [lit] Implement PYTHON directive and config.prologue
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- [PATCH] D154987: [lit] Implement PYTHON directive and config.prologue
Joel E. Denny via Phabricator via llvm-commits
- [PATCH] D154987: [lit] Implement PYTHON directive and config.prologue
Joel E. Denny via Phabricator via llvm-commits
- [PATCH] D158954: WIP: [lit] Enable debugging lit tests with python's pdb
Joel E. Denny via Phabricator via llvm-commits
- [llvm] [OpenMP] Improve omp offload profiler (PR #68016)
Johannes Doerfert via llvm-commits
- [llvm] [OpenMP] Improve omp offload profiler (PR #68016)
Johannes Doerfert via llvm-commits
- [llvm] [HIP] Support compressing device binary (PR #67162)
Johannes Doerfert via llvm-commits
- [llvm] [CodeExtractor] Allow to use 0 addr space for aggregate arg (PR #66998)
Johannes Doerfert via llvm-commits
- [llvm] [CodeExtractor] Allow to use 0 addr space for aggregate arg (PR #66998)
Johannes Doerfert via llvm-commits
- [llvm] [CodeExtractor] Allow to use 0 addr space for aggregate arg (PR #66998)
Johannes Doerfert via llvm-commits
- [llvm] [OpenMP][OMPIRBuilder] Add support to omp target parallel (PR #67000)
Johannes Doerfert via llvm-commits
- [llvm] [OpenMP][OMPIRBuilder] Add support to omp target parallel (PR #67000)
Johannes Doerfert via llvm-commits
- [llvm] [OpenMP][OMPIRBuilder] Add support to omp target parallel (PR #67000)
Johannes Doerfert via llvm-commits
- [llvm] [OpenMP][OMPIRBuilder] Add support to omp target parallel (PR #67000)
Johannes Doerfert via llvm-commits
- [llvm] [OpenMP][OMPIRBuilder] Add support to omp target parallel (PR #67000)
Johannes Doerfert via llvm-commits
- [llvm] [OpenMP][OMPIRBuilder] Add support to omp target parallel (PR #67000)
Johannes Doerfert via llvm-commits
- [llvm] [OpenMP][OMPIRBuilder] Add support to omp target parallel (PR #67000)
Johannes Doerfert via llvm-commits
- [llvm] Changing TimeProfiler.cpp clock from microseconds to nanoseconds (PR #68096)
Johannes Doerfert via llvm-commits
- [llvm] [libc++abi] Handle null pointer-to-object: Issue #64593 (PR #68076)
John McCall via llvm-commits
- [llvm] [libc++abi] Handle null pointer-to-object: Issue #64593 (PR #68076)
John McCall via llvm-commits
- [llvm] [libc++abi] Handle null pointer-to-object: Issue #64593 (PR #68076)
John McCall via llvm-commits
- [llvm] [libc++abi] Handle null pointer-to-object: Issue #64593 (PR #68076)
John McCall via llvm-commits
- [llvm] [NFC] [Coverage] Do not use recursion for getMaxCounterID (PR #67870)
Jon Roelofs via llvm-commits
- [llvm] [AArch64][SME] Add remarks to flag lazy ZA saves, and SMSTART/SMSTOP transitions (PR #68255)
Jon Roelofs via llvm-commits
- [llvm] [AArch64][SME] Add remarks to flag lazy ZA saves, and SMSTART/SMSTOP transitions (PR #68255)
Jon Roelofs via llvm-commits
- [llvm] [AArch64][SME] Add remarks to flag lazy ZA saves, and SMSTART/SMSTOP transitions (PR #68255)
Jon Roelofs via llvm-commits
- [llvm] [AArch64][SME] Add remarks to flag lazy ZA saves, and SMSTART/SMSTOP transitions (PR #68255)
Jon Roelofs via llvm-commits
- [llvm] [AArch64][SME] Allow inlining when streaming-mode attributes dont match up. (PR #68415)
Jon Roelofs via llvm-commits
- [llvm] [AArch64][SME] Allow inlining when streaming-mode attributes dont match up. (PR #68415)
Jon Roelofs via llvm-commits
- [llvm] [AArch64][SME] Allow inlining when streaming-mode attributes dont match up. (PR #68415)
Jon Roelofs via llvm-commits
- [llvm] [AArch64][SME] Extend Inliner cost-model with custom penalty for calls. (PR #68416)
Jon Roelofs via llvm-commits
- [llvm] [AArch64][SME] Extend Inliner cost-model with custom penalty for calls. (PR #68416)
Jon Roelofs via llvm-commits
- [llvm] [AArch64][SME] Extend Inliner cost-model with custom penalty for calls. (PR #68416)
Jon Roelofs via llvm-commits
- [llvm] [AArch64][SME] Zero reserved bytes when allocating a new TPIDR2 object (PR #68411)
Jon Roelofs via llvm-commits
- [llvm] [AArch64][SME] Add remarks to flag lazy ZA saves, and SMSTART/SMSTOP transitions (PR #68255)
Jon Roelofs via llvm-commits
- [llvm] [AArch64][SME] Fix generating incorrect TBZ when lowering lazy save. (PR #68429)
Jon Roelofs via llvm-commits
- [llvm] [AArch64][SME] Add missing SMStartStop regmasks (PR #68458)
Jon Roelofs via llvm-commits
- [llvm] [llvm-gsymutil] Print a DWO file missing warning under --quiet flag (PR #68062)
Jonas Devlieghere via llvm-commits
- [llvm] [DWARFLinker] Release input DWARF after object has been linked (PR #68376)
Jonas Devlieghere via llvm-commits
- [llvm] [DWARFLinker] Release input DWARF after object has been linked (PR #68376)
Jonas Devlieghere via llvm-commits
- [PATCH] D158124: [dsymutil] Add support for mergeable libraries
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- [llvm] [JITLink] Some cleanups to EHFrameSupport (PR #66707)
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- [llvm] [JITLink] Allow multiple relocations at same offset in EHFrameEdgeFixer (PR #68252)
Jonas Hahnfeld via llvm-commits
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Jonas Hahnfeld via llvm-commits
- [llvm] [JITLink][RISCV] Implement eh_frame handling (PR #68253)
Jonas Hahnfeld via llvm-commits
- [llvm] [JITLink][RISCV] Implement .eh_frame handling (PR #66067)
Jonas Hahnfeld via llvm-commits
- [llvm] [JITLink] Some cleanups to EHFrameSupport (PR #66707)
Jonas Hahnfeld via llvm-commits
- [llvm] [JITLink] Allow multiple relocations at same offset in EHFrameEdgeFixer (PR #68252)
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- [llvm] 26bb22b - Revert "InstCombine: Introduce SimplifyDemandedUseFPClass"
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- [llvm] [JITLink] Some cleanups to EHFrameSupport (PR #66707)
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- [llvm] [libc] Fix linking of AMDGPU device runtime control constants for math (PR #65676)
Joseph Huber via llvm-commits
- [llvm] [libc] Fix linking of AMDGPU device runtime control constants for math (PR #65676)
Joseph Huber via llvm-commits
- [llvm] [HIP] Support compressing device binary (PR #67162)
Joseph Huber via llvm-commits
- [llvm] [HIP] Support compressing device binary (PR #67162)
Joseph Huber via llvm-commits
- [llvm] [libc] Partially implement 'rand' for the GPU (PR #66167)
Joseph Huber via llvm-commits
- [llvm] [libc] Partially implement 'rand' for the GPU (PR #66167)
Joseph Huber via llvm-commits
- [llvm] [HIP] Support compressing device binary (PR #67162)
Joseph Huber via llvm-commits
- [llvm] 0ca7e60 - [DX] Fix changed meaning of 'Signature' after #67346
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Mark Dewing via llvm-commits
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Mark Dewing via llvm-commits
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Markus Böck via llvm-commits
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Martin Storsjö via llvm-commits
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Martin Storsjö via llvm-commits
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Martin Storsjö via llvm-commits
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Martin Storsjö via llvm-commits
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Martin Storsjö via llvm-commits
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Matheus Izvekov via llvm-commits
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Matheus Izvekov via llvm-commits
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Matheus Izvekov via llvm-commits
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Matheus Izvekov via llvm-commits
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Matheus Izvekov via llvm-commits
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Matheus Izvekov via llvm-commits
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Matheus Izvekov via llvm-commits
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Matheus Izvekov via llvm-commits
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Matheus Izvekov via llvm-commits
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Matheus Izvekov via llvm-commits
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Matheus Izvekov via llvm-commits
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Matthias Braun via llvm-commits
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Matthias Braun via llvm-commits
- [llvm] [llvm-profdata] Do not create numerical strings for MD5 function names read from a Sample Profile. (PR #66164)
Matthias Braun via llvm-commits
- [llvm] [llvm-profdata] Do not create numerical strings for MD5 function names read from a Sample Profile. (PR #66164)
Matthias Braun via llvm-commits
- [llvm] [llvm-profdata] Do not create numerical strings for MD5 function names read from a Sample Profile. (PR #66164)
Matthias Braun via llvm-commits
- [llvm] [llvm-profdata] Do not create numerical strings for MD5 function names read from a Sample Profile. (PR #66164)
Matthias Braun via llvm-commits
- [llvm] [llvm-profdata] Do not create numerical strings for MD5 function names read from a Sample Profile. (PR #66164)
Matthias Braun via llvm-commits
- [llvm] [llvm-profdata] Do not create numerical strings for MD5 function names read from a Sample Profile. (PR #66164)
Matthias Braun via llvm-commits
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Matthias Braun via llvm-commits
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Matthias Braun via llvm-commits
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Matthias Braun via llvm-commits
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Matthias Braun via llvm-commits
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- [llvm] Use BlockFrequency type in more places (NFC) (PR #68266)
Matthias Braun via llvm-commits
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Matthias Braun via llvm-commits
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Matthias Braun via llvm-commits
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Matthias Braun via llvm-commits
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Matthias Braun via llvm-commits
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Matthias Braun via llvm-commits
- [llvm] Use BlockFrequency type in more places (NFC) (PR #68266)
Matthias Braun via llvm-commits
- [llvm] Use BlockFrequency type in more places (NFC) (PR #68266)
Matthias Braun via llvm-commits
- [compiler-rt] [llvm-profdata] Do not create numerical strings for MD5 function names read from a Sample Profile. (PR #66164)
Matthias Braun via llvm-commits
- [llvm] [llvm-profdata] Do not create numerical strings for MD5 function names read from a Sample Profile. (PR #66164)
Matthias Braun via llvm-commits
- [llvm] MachineFunctionPass: Clear properties before running function (PR #67962)
Matthias Braun via llvm-commits
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Matthias Braun via llvm-commits
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Matthias Braun via llvm-commits
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Matthias Braun via llvm-commits
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Matthias Braun via llvm-commits
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Matthias Braun via llvm-commits
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Matthias Braun via llvm-commits
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Matthias Braun via llvm-commits
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Matthias Braun via llvm-commits
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- [PATCH] D151848: [X86, Peephole] Enable FoldImmediate for X86
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Matthias Braun via Phabricator via llvm-commits
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Matthias Braun via Phabricator via llvm-commits
- [llvm] [InstCombine] Simplify the pattern `a ne/eq (zext/sext (a ne/eq c))` (PR #65852)
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Micah Weston via Phabricator via llvm-commits
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Micah Weston via Phabricator via llvm-commits
- [llvm] [RISCV][CostModel] VPIntrinsics have same cost as their non-vp counterparts (PR #67178)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Support fptoi like ops for fp16 vectors input when only have Zvfhmin (PR #67532)
Michael Maitland via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Michael Maitland via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Michael Maitland via llvm-commits
- [llvm] [RISCV][ISel] Fix comment to match direction of predicate in code. NFC. (PR #68248)
Michael Maitland via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Michael Maitland via llvm-commits
- [llvm] [RISCV][ISel] Fix comment to match direction of predicate in code. NFC. (PR #68248)
Michael Maitland via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Michael Maitland via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Michael Maitland via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Michael Maitland via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Michael Maitland via llvm-commits
- [llvm] [RISCV][CostModel] VPIntrinsics have same cost as their non-vp counterparts (PR #67178)
Michael Maitland via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Michael Maitland via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Michael Maitland via llvm-commits
- [llvm] [RISCV][CostModel] VPIntrinsics have same cost as their non-vp counterparts (PR #67178)
Michael Maitland via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Michael Maitland via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Michael Maitland via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Michael Maitland via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Michael Maitland via llvm-commits
- [llvm] [RISCV][GlobalISel] Lower calls to variadic functions (PR #68271)
Michael Maitland via llvm-commits
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Michael Maitland via llvm-commits
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Michael Maitland via llvm-commits
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Michael Maitland via llvm-commits
- [llvm] [RISCV][CostModel] VPIntrinsics have same cost as their non-vp counterparts (PR #67178)
Michael Maitland via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Michael Maitland via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Michael Maitland via llvm-commits
- [llvm] [GISel] Add LookThroughInstrs for getIConstantVRegVal and getIConstan… (PR #68327)
Michael Maitland via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Michael Maitland via llvm-commits
- [llvm] [GISel] Add LookThroughInstrs for getIConstantVRegVal and getIConstan… (PR #68327)
Michael Maitland via llvm-commits
- [llvm] [GISel] Add LookThroughInstrs for getIConstantVRegVal and getIConstan… (PR #68327)
Michael Maitland via llvm-commits
- [llvm] [GISel] Add LookThroughInstrs for getIConstantVRegVal and getIConstan… (PR #68327)
Michael Maitland via llvm-commits
- [llvm] [GISel] Add LookThroughInstrs for getIConstantVRegVal and getIConstan… (PR #68327)
Michael Maitland via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Support Xsfvqmaccdod and Xsfvqmaccqoq extensions (PR #68295)
Michael Maitland via llvm-commits
- [llvm] [RISCV][CostModel] VPIntrinsics have same cost as their non-vp counterparts (PR #67178)
Michael Maitland via llvm-commits
- [llvm] llvm-canon (PR #68176)
Michal Paszkowski via llvm-commits
- [llvm] llvm-canon (PR #68176)
Michal Paszkowski via llvm-commits
- [llvm] [SPIR-V] Emit proper pointer type for OpenCL kernel arguments (PR #67726)
Michal Paszkowski via llvm-commits
- [llvm] [SPIR-V] Emit proper pointer type for OpenCL kernel arguments (PR #67726)
Michal Paszkowski via llvm-commits
- [llvm] [SPIR-V] Emit proper pointer type for OpenCL kernel arguments (PR #67726)
Michal Paszkowski via llvm-commits
- [llvm] [SPIR-V] Emit proper pointer type for OpenCL kernel arguments (PR #67726)
Michal Paszkowski via llvm-commits
- [llvm] [SPIR-V] Emit proper pointer type for OpenCL kernel arguments (PR #67726)
Michal Paszkowski via llvm-commits
- [llvm] [SPIR-V] Emit proper pointer type for OpenCL kernel arguments (PR #67726)
Michal Paszkowski via llvm-commits
- [llvm] [SPIR-V] Remove calls to deprecated PointerType methods (1/2) (PR #68336)
Michal Paszkowski via llvm-commits
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Michal Paszkowski via llvm-commits
- [llvm] [CMake]Fully delete the deprecated LLVM_USE_CRT* (PR #66850)
Mike Hommey via llvm-commits
- [llvm] [CMake]Fully delete the deprecated LLVM_USE_CRT* (PR #66850)
Mike Hommey via llvm-commits
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Mike Hommey via Phabricator via llvm-commits
- [PATCH] D155924: [IR] Remove support for and/or constant expressions
Mike Hommey via Phabricator via llvm-commits
- [PATCH] D155924: [IR] Remove support for and/or constant expressions
Mike Hommey via Phabricator via llvm-commits
- [llvm] [RISCV] A test demonstrating missed opportunity to combine `addi` into (PR #67022)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV][WIP] Enable sink-and-fold for RISC-V. (PR #67602)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV][WIP] Enable sink-and-fold for RISC-V. (PR #67602)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV][WIP] Enable sink-and-fold for RISC-V. (PR #67602)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV][WIP] Enable sink-and-fold for RISC-V. (PR #67602)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV][WIP] Enable sink-and-fold for RISC-V. (PR #67602)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV][WIP] Enable sink-and-fold for RISC-V. (PR #67602)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV] A test demonstrating missed opportunity to combine `addi` into (PR #67022)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV] A test demonstrating missed opportunity to combine `addi` into (PR #67022)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV] A test demonstrating missed opportunity to combine `addi` into (PR #67022)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV] A test demonstrating missed opportunity to combine `addi` into (PR #67022)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV] A test demonstrating missed opportunity to combine `addi` into (PR #67022)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV] Add sink-and-fold support for RISC-V. (PR #67602)
Mikhail Gudim via llvm-commits
- [llvm] [ValueTracking] Try to infer range of select from true and false values. (PR #68256)
Mikhail Gudim via llvm-commits
- [llvm] [ValueTracking] Try to infer range of select from true and false values. (PR #68256)
Mikhail Gudim via llvm-commits
- [llvm] [ValueTracking] Try to infer range of select from true and false values. (PR #68256)
Mikhail Gudim via llvm-commits
- [llvm] [ValueTracking] Try to infer range of select from true and false values. (PR #68256)
Mikhail Gudim via llvm-commits
- [llvm] [ValueTracking] Try to infer range of select from true and false values. (PR #68256)
Mikhail Gudim via llvm-commits
- [llvm] [ValueTracking] Try to infer range of select from true and false values. (PR #68256)
Mikhail Gudim via llvm-commits
- [llvm] [ValueTracking] Try to infer range of select from true and false values. (PR #68256)
Mikhail Gudim via llvm-commits
- [llvm] [ValueTracking] Try to infer range of select from true and false values. (PR #68256)
Mikhail Gudim via llvm-commits
- [llvm] [ValueTracking] Try to infer range of select from true and false values. (PR #68256)
Mikhail Gudim via llvm-commits
- [llvm] [ValueTracking] Try to infer range of select from true and false values. (PR #68256)
Mikhail Gudim via llvm-commits
- [llvm] [ValueTracking] Try to infer range of select from true and false values. (PR #68256)
Mikhail Gudim via llvm-commits
- [llvm] [ValueTracking] Analyze `Select` in `isKnownNonEqual`. (PR #68427)
Mikhail Gudim via llvm-commits
- [llvm] [ValueTracking] Analyze `Select` in `isKnownNonEqual`. (PR #68427)
Mikhail Gudim via llvm-commits
- [llvm] [ValueTracking] Analyze `Select` in `isKnownNonEqual`. (PR #68427)
Mikhail Gudim via llvm-commits
- [llvm] [ValueTracking] Analyze `Select` in `isKnownNonEqual`. (PR #68427)
Mikhail Gudim via llvm-commits
- [llvm] [ValueTracking] Analyze `Select` in `isKnownNonEqual`. (PR #68427)
Mikhail Gudim via llvm-commits
- [llvm] [ValueTracking] Analyze `Select` in `isKnownNonEqual`. (PR #68427)
Mikhail Gudim via llvm-commits
- [llvm] [ValueTracking] Analyze `Select` in `isKnownNonEqual`. (PR #68427)
Mikhail Gudim via llvm-commits
- [llvm] [ValueTracking] Analyze `Select` in `isKnownNonEqual`. (PR #68427)
Mikhail Gudim via llvm-commits
- [llvm] [ValueTracking] Analyze `Select` in `isKnownNonEqual`. (PR #68427)
Mikhail Gudim via llvm-commits
- [llvm] [ValueTracking] Analyze `Select` in `isKnownNonEqual`. (PR #68427)
Mikhail Gudim via llvm-commits
- [llvm] [ValueTracking] Analyze `Select` in `isKnownNonEqual`. (PR #68427)
Mikhail Gudim via llvm-commits
- [llvm] [ValueTracking] Analyze `Select` in `isKnownNonEqual`. (PR #68427)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV][GISel] Add ISel supports for SHXADD from Zba extension (PR #67863)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV][GISel] Add ISel supports for SHXADD from Zba extension (PR #67863)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV][GISel] Add ISel supports for SHXADD from Zba extension (PR #67863)
Min-Yih Hsu via llvm-commits
- [llvm] [TableGen][GISel] Fix incorrect binding of predicate operands upon `PredicateUsesOperands = 1` (PR #68125)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV][GISel] Add ISel supports for SHXADD from Zba extension (PR #67863)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV][GISel] Add ISel supports for SHXADD from Zba extension (PR #67863)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV][GISel] Add ISel supports for SHXADD from Zba extension (PR #67863)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV][GISel] Add ISel supports for SHXADD from Zba extension (PR #67863)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV][GISel] Add ISel supports for SHXADD from Zba extension (PR #67863)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV][GISel] Add ISel supports for SHXADD from Zba extension (PR #67863)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV][GlobalISel] Select G_FRAME_INDEX (PR #68254)
Min-Yih Hsu via llvm-commits
- [llvm] [TableGen][GISel] Fix incorrect binding of predicate operands upon `PredicateUsesOperands = 1` (PR #68125)
Min-Yih Hsu via llvm-commits
- [compiler-rt] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
Mingming Liu via llvm-commits
- [compiler-rt] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
Mingming Liu via llvm-commits
- [llvm] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
Mingming Liu via llvm-commits
- [compiler-rt] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
Mingming Liu via llvm-commits
- [llvm] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
Mingming Liu via llvm-commits
- [llvm] aa6ee03 - [NFC][Inliner] Introduce another multiplier for cost benefit analysis and make multipliers overriddable in TargetTransformInfo.
Mingming Liu via llvm-commits
- [llvm] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
Mingming Liu via llvm-commits
- [llvm] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
Mingming Liu via llvm-commits
- [llvm] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
Mingming Liu via llvm-commits
- [llvm] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
Mingming Liu via llvm-commits
- [llvm] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
Mingming Liu via llvm-commits
- [compiler-rt] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
Mingming Liu via llvm-commits
- [llvm] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
Mingming Liu via llvm-commits
- [compiler-rt] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
Mingming Liu via llvm-commits
- [compiler-rt] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
Mingming Liu via llvm-commits
- [llvm] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
Mingming Liu via llvm-commits
- [compiler-rt] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
Mingming Liu via llvm-commits
- [llvm] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
Mingming Liu via llvm-commits
- [llvm] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
Mingming Liu via llvm-commits
- [llvm] [NFC]Rename InstrProf::getFuncName{,orExternalSymbol} to getValueName{,orExternalSymbol} (PR #68240)
Mingming Liu via llvm-commits
- [llvm] [NFC]Rename InstrProf::getFuncName{,orExternalSymbol} to getValueName{,orExternalSymbol} (PR #68240)
Mingming Liu via llvm-commits
- [llvm] [NFC]Rename InstrProf::getFuncName{,orExternalSymbol} to getValueName{,orExternalSymbol} (PR #68240)
Mingming Liu via llvm-commits
- [llvm] [NFC]Rename InstrProf::getFuncName{,orExternalSymbol} to getValueName{,orExternalSymbol} (PR #68240)
Mingming Liu via llvm-commits
- [llvm] [NFC]Rename InstrProf::getFuncName{,orExternalSymbol} to getValueName{,orExternalSymbol} (PR #68240)
Mingming Liu via llvm-commits
- [llvm] [NFC]Rename InstrProf::getFuncName{,orExternalSymbol} to getValueName{,orExternalSymbol} (PR #68240)
Mingming Liu via llvm-commits
- [llvm] [NFC]Rename InstrProf::getFuncName{,orExternalSymbol} to getValueName{,orExternalSymbol} (PR #68240)
Mingming Liu via llvm-commits
- [llvm] [NFC]Rename InstrProf::getFuncName{,orExternalSymbol} to getValueName{,orExternalSymbol} (PR #68240)
Mingming Liu via llvm-commits
- [PATCH] D153154: [NFC][Inliner] Introduce another multiplier for cost benefit analysis and make multipliers overriddable in TargetTransformInfo.
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- [PATCH] D153154: [NFC][Inliner] Introduce another multiplier for cost benefit analysis and make multipliers overriddable in TargetTransformInfo.
Mingming Liu via Phabricator via llvm-commits
- [llvm] [mlgo][coro] Fix Issue #62616 (PR #68263)
Mircea Trofin via llvm-commits
- [llvm] [mlgo][coro] Assign coro split-ed functions a `FunctionLevel` (PR #68263)
Mircea Trofin via llvm-commits
- [llvm] [mlgo][coro] Assign coro split-ed functions a `FunctionLevel` (PR #68263)
Mircea Trofin via llvm-commits
- [llvm] [mlgo][coro] Assign coro split-ed functions a `FunctionLevel` (PR #68263)
Mircea Trofin via llvm-commits
- [llvm] [mlgo][coro] Assign coro split-ed functions a `FunctionLevel` (PR #68263)
Mircea Trofin via llvm-commits
- [llvm] a4765c6 - [mlgo] Fix state-tracking-coro.ll test
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Nitin John Raj via llvm-commits
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Nitin John Raj via llvm-commits
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Nitin John Raj via llvm-commits
- [llvm] [RISCV][GlobalISel] Select G_FRAME_INDEX (PR #68254)
Nitin John Raj via llvm-commits
- [llvm] [RISCV][GlobalISel] Select G_FRAME_INDEX (PR #68254)
Nitin John Raj via llvm-commits
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- [llvm] Fix non-determinism in debuginfo (PR #68332)
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- [llvm] Fix non-determinism in debuginfo (PR #68332)
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- [llvm] [llvm][metadata][NFC] Minimize local variable scopes (PR #68438)
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- [llvm] Add -fkeep-system-includes modifier for -E (PR #67684)
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- [llvm] Add -fkeep-system-includes modifier for -E (PR #67684)
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- [llvm] [SVE][CodeGenPrepare] Sink address calculations that match SVE gather/scatter addressing modes. (PR #66996)
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- [llvm] [TLI] Added a guard for empty vector function name. (PR #68100)
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- [llvm] Tli nfc fix mechanism propagating mangled names for tli function mappings ac3 (PR #67308)
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- [llvm] [WebAssembly] Add path to PIC mode for wasm tables (PR #67545)
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- [llvm] [WebAssembly] Add path to PIC mode for wasm tables (PR #67545)
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- [llvm] [WebAssembly] Add path to PIC mode for wasm tables (PR #67545)
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- [llvm] [SPIRV] Fix SPV_KHR_expect_assume support (PR #67793)
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Paulo Matos via llvm-commits
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- [llvm] [LoopVectorize] Vectorize select-cmp reduction pattern for increasing integer induction variable (PR #67812)
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- [llvm] ISel: introduce vector ISD::LRINT, ISD::LLRINT; custom RISCV lowering (PR #66924)
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- [llvm] ISel: introduce vector ISD::LRINT, ISD::LLRINT; custom RISCV lowering (PR #66924)
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- [lld] [lld][COFF][LTO] Implement /lldemit:llvm option (PR #66964)
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- [lld] [LLD] [COFF] Fix handling of comdat .drectve sections (PR #68116)
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- [PATCH] D86310: [X86] Align i128 to 16 bytes in x86 datalayouts
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- [llvm] [Analysis][SVE] Improve cost model for some extending masked loads (PR #65957)
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- [llvm] [AArch64][SME] Add remarks to flag lazy ZA saves, and SMSTART/SMSTOP transitions (PR #68255)
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- [llvm] [AArch64][SME] Add remarks to flag lazy ZA saves, and SMSTART/SMSTOP transitions (PR #68255)
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- [llvm] [AArch64][SME] Add remarks to flag lazy ZA saves, and SMSTART/SMSTOP transitions (PR #68255)
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- [llvm] [AArch64][SME] Tile slices to lazy-save/restore should be RDSVL. (PR #68403)
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- [llvm] [AArch64][SME] Tile slices to lazy-save/restore should be RDSVL. (PR #68403)
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- [llvm] [AArch64][SME] Tile slices to lazy-save/restore should be RDSVL. (PR #68403)
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- [llvm] [AArch64][SME] Zero reserved bytes when allocating a new TPIDR2 object (PR #68411)
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- [llvm] [AArch64][SME] Allow inlining when streaming-mode attributes dont match up. (PR #68415)
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- [PATCH] D152205: [Aarch64][SVE]SVE2] Enable tbl, tbl2 for shuffle lowering for fixed vector types.
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- [PATCH] D152205: [Aarch64][SVE]SVE2] Enable tbl, tbl2 for shuffle lowering for fixed vector types.
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- [PATCH] D152205: [Aarch64][SVE]SVE2] Enable tbl, tbl2 for shuffle lowering for fixed vector types.
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- [llvm] [LLVM-C] Add LLVMCreateTargetMachineWithABI (PR #68406)
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- [llvm] [LLVM-C] Add LLVMCreateTargetMachineWithABI (PR #68406)
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- [llvm] 2b27948 - [symbolizer] Support symbol lookup
Serge Pavlov via llvm-commits
- [llvm] 39fec54 - Revert "[symbolizer] Support symbol lookup"
Serge Pavlov via llvm-commits
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Serge Pavlov via llvm-commits
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- [llvm] [Sparc] Replace CMP instructions with InstAlias (NFCI) (PR #66859)
Sergei Barannikov via llvm-commits
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Sergei Barannikov via llvm-commits
- [llvm] [clang] Replace uses of CreatePointerBitCastOrAddrSpaceCast (NFC) (PR #68277)
Sergei Barannikov via llvm-commits
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- [llvm] [Support] Deprecate system_endianness (PR #68279)
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- [llvm] [GVN] Drop Clobber dependency if store may overwrite only the same value (PR #68322)
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- [compiler-rt] [Clang] Fix crash when ill-formed code is treated as a deduction guide (PR #67373)
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- [llvm] [Clang] Fix crash when ill-formed code is treated as a deduction guide (PR #67373)
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- [llvm] [clang-cl] Fix value of __FUNCTION__ in MSVC mode. (PR #67592)
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- [llvm] [libc++] Implement ranges::contains_subrange (PR #66963)
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- [lld] [libc++] Implement ranges::contains_subrange (PR #66963)
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- [compiler-rt] [libc++] Implement ranges::contains_subrange (PR #66963)
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- [llvm] [RISCV] Support Xsfvfnrclipxfqf extensions (PR #68297)
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- [llvm] [RISCV] Support Xsfvqmaccdod and Xsfvqmaccqoq extensions (PR #68295)
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- [llvm] [X86] Support EGPR (R16-R31) for APX (PR #67702)
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Shivam Gupta via llvm-commits
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- [llvm] [CMake] Support per-target linker flags (PR #68393)
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- [llvm] [InstCombine] Improve `(icmp pred (and X, Y), ...)` fold. (PR #66787)
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- [llvm] 2908142 - [X86] Add test coverage for zext(or(shl_nuw(x,c1),c2)) pointer math
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- [llvm] 6741dd0 - Fix MSVC "cannot convert from 'llvm::Register' to 'llvm::MCRegister'" build error. NFCI.
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- [llvm] b4f5913 - [DAG] visitSHL - move SimplifyDemandedBits after all standard folds to give them a chance to match
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- [llvm] [Inliner] Improve propagation of return attributes. (PR #67756)
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- [llvm] d97f49b - [X86] Add pointer mask test coverage for implicit NSW/NUW adds
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- [llvm] d3e66a8 - [VectorCombine] foldBitcastShuf - compute scale factors using shuffle type element size instead of element count. NFCI.
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- [llvm] 3bae69e - [VectorCombine][X86] Add additional length changing foldBitcastShuf tests
Simon Pilgrim via llvm-commits
- [llvm] 94795a3 - [VectorCombine] foldBitcastShuf - add support for length changing shuffles
Simon Pilgrim via llvm-commits
- [llvm] a16f646 - [TTI] improveShuffleKindFromMask - detect SK_ExtractSubvector patterns from SK_PermuteSingleSrc
Simon Pilgrim via llvm-commits
- [llvm] [X86][ISel] Improve logic for optimizing `movmsk(bitcast(shuffle(x)))` (PR #68369)
Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
- [llvm] [X86][ISel] Improve logic for optimizing `movmsk(bitcast(shuffle(x)))` (PR #68369)
Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
- [PATCH] D155472: [DAG] Attempt shl narrowing in SimplifyDemandedBits
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- [PATCH] D155472: [DAG] Attempt shl narrowing in SimplifyDemandedBits
Simon Pilgrim via Phabricator via llvm-commits
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- [PATCH] D155472: [DAG] Attempt shl narrowing in SimplifyDemandedBits
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D148963: [X86] Support `X86ISD::PCMPEQ` and `X86ISD::PCMPGT` in ComputeKnownBits
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- [llvm] [AMDGPU] Save/Restore SCC bit across waterfall loop. (PR #68363)
Sirish Pande via llvm-commits
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Sirish Pande via llvm-commits
- [llvm] [AMDGPU] Save/Restore SCC bit across waterfall loop. (PR #68363)
Sirish Pande via llvm-commits
- [llvm] [AMDGPU] Save/Restore SCC bit across waterfall loop. (PR #68363)
Sirish Pande via llvm-commits
- [llvm] [AMDGPU] Save and restore SCC using only 32-bit SGPR. (PR #68367)
Sirish Pande via llvm-commits
- [llvm] [AMDGPU] Save/Restore SCC bit across waterfall loop. (PR #68363)
Sirish Pande via llvm-commits
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Stanislav Mekhanoshin via llvm-commits
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Stanislav Mekhanoshin via llvm-commits
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Stanislav Mekhanoshin via llvm-commits
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Stanislav Mekhanoshin via llvm-commits
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Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Allow shinking instruction with dead sdst (PR #68028)
Stanislav Mekhanoshin via llvm-commits
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Stanislav Mekhanoshin via llvm-commits
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Stanislav Mekhanoshin via llvm-commits
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Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Add another SIFoldOperands instance after shrink (PR #67878)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Allow shinking instruction with dead sdst (PR #68028)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Allow shinking instruction with dead sdst (PR #68028)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Allow shinking instruction with dead sdst (PR #68028)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Allow shinking instruction with dead sdst (PR #68028)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Allow shinking instruction with dead sdst (PR #68028)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Allow shinking instruction with dead sdst (PR #68028)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Allow shinking instruction with dead sdst (PR #68028)
Stanislav Mekhanoshin via llvm-commits
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Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Allow shinking instruction with dead sdst (PR #68028)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Allow shinking instruction with dead sdst (PR #68028)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Allow shinking instruction with dead sdst (PR #68028)
Stanislav Mekhanoshin via llvm-commits
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Stanislav Mekhanoshin via llvm-commits
- [compiler-rt] [AMDGPU] Add another SIFoldOperands instance after shrink (PR #67878)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Add another SIFoldOperands instance after shrink (PR #67878)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Add another SIFoldOperands instance after shrink (PR #67878)
Stanislav Mekhanoshin via llvm-commits
- [compiler-rt] [AMDGPU] Add another SIFoldOperands instance after shrink (PR #67878)
Stanislav Mekhanoshin via llvm-commits
- [lld] [AMDGPU] Add another SIFoldOperands instance after shrink (PR #67878)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Allow shinking instruction with dead sdst (PR #68028)
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- [llvm] AMDGPU/GlobalISel: Handle mubuf load/store for more types (PR #68268)
Stanislav Mekhanoshin via llvm-commits
- [compiler-rt] [AMDGPU] Add another SIFoldOperands instance after shrink (PR #67878)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Add another SIFoldOperands instance after shrink (PR #67878)
Stanislav Mekhanoshin via llvm-commits
- [lld] [AMDGPU] Add another SIFoldOperands instance after shrink (PR #67878)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fold operand after shrinking instruction in SIFoldOperands (PR #68426)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Add another SIFoldOperands instance after shrink (PR #67878)
Stanislav Mekhanoshin via llvm-commits
- [llvm] Remove fold immediates from shrink (PR #68045)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fold operand after shrinking instruction in SIFoldOperands (PR #68426)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fold operand after shrinking instruction in SIFoldOperands (PR #68426)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [PowerPC] Add the SCV instruction. (PR #68063)
Stefan Pintilie via llvm-commits
- [llvm] [PowerPC] Add the SCV instruction. (PR #68063)
Stefan Pintilie via llvm-commits
- [llvm] [PowerPC] Add the SCV instruction. (PR #68063)
Stefan Pintilie via llvm-commits
- [llvm] [RISCV][CostModel] VPIntrinsics have same cost as their non-vp counterparts (PR #67178)
Stella Laurenzo via llvm-commits
- [llvm] [RISCV][CostModel] VPIntrinsics have same cost as their non-vp counterparts (PR #67178)
Stella Laurenzo via llvm-commits
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Stella Laurenzo via llvm-commits
- [llvm] [mlir][llvm] Fix elem type passing into `getelementptr` (PR #68136)
Stella Laurenzo via llvm-commits
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Stella Laurenzo via llvm-commits
- [llvm] [AMDGPU] Add encoding/decoding support for non-result-returning ATOMIC_CSUB instructions (PR #68197)
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- [llvm] [AMDGPU] Add encoding/decoding support for non-result-returning ATOMIC_CSUB instructions (PR #68197)
Stephen Thomas via llvm-commits
- [llvm] [AMDGPU] Add encoding/decoding support for non-result-returning ATOMIC_CSUB instructions (PR #68197)
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Stephen Thomas via llvm-commits
- [lld] [AMDGPU] Add encoding/decoding support for non-result-returning ATOMIC_CSUB instructions (PR #68197)
Stephen Thomas via llvm-commits
- [llvm] 6d6b395 - [DebugInfo][SelectionDAG] Add debug info salvaging for TRUNC nodes
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- [llvm] 4c94aff - [ADT] Add more ArrayRef <-> StringRef conversion functions
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- [llvm] 5d2a710 - [ADT] Introduce LazyAtomicPointer
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Steven Wu via llvm-commits
- [llvm] [CAS] LLVMCAS implementation (PR #68448)
Steven Wu via llvm-commits
- [llvm] [CAS] LLVMCAS implementation (PR #68448)
Steven Wu via llvm-commits
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Steven Wu via llvm-commits
- [llvm] [llvm][objdump] Remove support for printing the embedded Bitcode section in MachO files. (PR #68457)
Steven Wu via llvm-commits
- [llvm] [llvm][objdump] Remove support for printing the embedded Bitcode section in MachO files. (PR #68457)
Steven Wu via llvm-commits
- [llvm] [CAS] LLVMCAS implementation (PR #68448)
Steven Wu via llvm-commits
- [PATCH] D139035: [ADT] Add more ArrayRef <-> StringRef conversion functions
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Steven Wu via Phabricator via llvm-commits
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Steven Wu via Phabricator via llvm-commits
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- [PATCH] D154869: [Flang] [FlangRT] Introduce FlangRT project as solution to Flang's runtime LLVM integration
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- [compiler-rt] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
Teresa Johnson via llvm-commits
- [llvm] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
Teresa Johnson via llvm-commits
- [llvm] [LIT] NFC. Add missing punctuation on a LIT driver message (PR #67941)
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- [llvm] [lit] Fix shell commands with newlines (PR #67898)
Thomas Preud'homme via llvm-commits
- [llvm] [lit] Fix shell commands with newlines (PR #67898)
Thomas Preud'homme via llvm-commits
- [llvm] [lit] Fix shell commands with newlines (PR #67898)
Thomas Preud'homme via llvm-commits
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Thomas Raoux via llvm-commits
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Thomas Raoux via llvm-commits
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Thomas Raoux via llvm-commits
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Thomas Raoux via llvm-commits
- [llvm] [NVPTX] Improve lowering of v4i8 (PR #67866)
Thomas Raoux via llvm-commits
- [llvm] [NVPTX] Improve lowering of v4i8 (PR #67866)
Thomas Raoux via llvm-commits
- [llvm] [AMDGPU] Use absolute relocations when compiling for AMDPAL and Mesa3D (PR #67791)
Thomas Symalla via llvm-commits
- [llvm] [AMDGPU] Use absolute relocations when compiling for AMDPAL and Mesa3D (PR #67791)
Thomas Symalla via llvm-commits
- [llvm] [AMDGPU] Use absolute relocations when compiling for AMDPAL and Mesa3D (PR #67791)
Thomas Symalla via llvm-commits
- [llvm] [AMDGPU] Detect renamable kills when trying to form V_CMPX instructions. (PR #68293)
Thomas Symalla via llvm-commits
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Thomas Symalla via llvm-commits
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Thomas Symalla via llvm-commits
- [llvm] [AMDGPU] Detect renamable kills when trying to form V_CMPX instructions. (PR #68293)
Thomas Symalla via llvm-commits
- [llvm] [AMDGPU] Detect renamable kills when trying to form V_CMPX instructions. (PR #68293)
Thomas Symalla via llvm-commits
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Thomas Symalla via llvm-commits
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Thomas Symalla via llvm-commits
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Thomas Symalla via llvm-commits
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Thomas Symalla via llvm-commits
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Thomas Symalla via llvm-commits
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Thomas Symalla via llvm-commits
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Thomas Symalla via llvm-commits
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Thomas Symalla via llvm-commits
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Thomas Symalla via llvm-commits
- [llvm] [AMDGPU] Detect kills in register sets when trying to form V_CMPX instructions. (PR #68293)
Thomas Symalla via llvm-commits
- [llvm] [AMDGPU] Detect kills in register sets when trying to form V_CMPX instructions. (PR #68293)
Thomas Symalla via llvm-commits
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Thomas Symalla via llvm-commits
- [llvm] [AMDGPU] Use absolute relocations when compiling for AMDPAL and Mesa3D (PR #67791)
Thomas Symalla via llvm-commits
- [llvm] [AMDGPU] Use absolute relocations when compiling for AMDPAL and Mesa3D (PR #67791)
Thomas Symalla via llvm-commits
- [llvm] [AMDGPU] Use absolute relocations when compiling for AMDPAL and Mesa3D (PR #67791)
Thomas Symalla via llvm-commits
- [llvm] [AMDGPU] Use absolute relocations when compiling for AMDPAL and Mesa3D (PR #67791)
Thomas Symalla via llvm-commits
- [llvm] [Support, ADT] Move llvm::endianness to bit.h (PR #68280)
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- [lld] [LLD] [COFF] Clarify -print-search-path for the empty string element (PR #67856)
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- [lld] [LLD] [COFF] Restore the current dir as the first entry in the search path (PR #67857)
Tobias Hieta via llvm-commits
- [lld] [LLD] [COFF] Don't look up relative paths to parent directories in the search paths (PR #67858)
Tobias Hieta via llvm-commits
- [compiler-rt] [compiler-rt] Reinstate removal of CRT choice flags from CMAKE_*_FLAGS* (PR #67935)
Tobias Hieta via llvm-commits
- [llvm] [workflow] Fix abi checker in llvm-tests. Same fix as in 99fb0af80d16b0ff886f032441392219e1cac452 (PR #67957)
Tobias Hieta via llvm-commits
- [llvm] [LIT] NFC. Add missing punctuation on a LIT driver message (PR #67941)
Tobias Hieta via llvm-commits
- [lld] [LLD] [COFF] Clarify -print-search-path for the empty string element (PR #67856)
Tobias Hieta via llvm-commits
- [llvm] [workflow] Fix abi checker in llvm-tests. Same fix as in 99fb0af80d16b0ff886f032441392219e1cac452 (PR #67957)
Tobias Hieta via llvm-commits
- [lld] [LLD][COFF] Add support for `--time-trace` (PR #68236)
Tobias Hieta via llvm-commits
- [llvm] [docs] Advise contributors to check for truncated PR titles (PR #68021)
Tom Stellard via llvm-commits
- [llvm] [docs] Advise contributors to check for truncated PR titles (PR #68021)
Tom Stellard via llvm-commits
- [llvm] workflows/release-binaries: Use more cores to avoid the 6 hour timeout (PR #67874)
Tom Stellard via llvm-commits
- [llvm] workflows: Run `apt update` before `apt install` (PR #67136)
Tom Stellard via llvm-commits
- [PATCH] D158648: InstCombine: Introduce SimplifyDemandedUseFPClass
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- [PATCH] D158648: InstCombine: Introduce SimplifyDemandedUseFPClass
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- [llvm] [LIT] NFC. Add missing punctuation on a LIT driver message (PR #67941)
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- [llvm] [LIT] NFC. Add missing punctuation on a LIT driver message (PR #67941)
Uday Bondhugula via llvm-commits
- [llvm] [SystemZ/z/OS] Add library names for intrinsics (PR #68114)
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- [llvm] [SystemZ/z/OS] Add library names for intrinsics (PR #68114)
Ulrich Weigand via llvm-commits
- [llvm] [SystemZ][z/OS] Update lowerCall (PR #68259)
Ulrich Weigand via llvm-commits
- [llvm] [SystemZ][z/OS] Update lowerCall (PR #68259)
Ulrich Weigand via llvm-commits
- [PATCH] D137149: Use PassGate from LLVMContext if any otherwise global one
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- [PATCH] D137149: Use PassGate from LLVMContext if any otherwise global one
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- [llvm] Introduce paged vector (PR #66430)
Vassil Vassilev via llvm-commits
- [llvm] Avoid need for SLocEntryLoaded BitVector (PR #67960)
Vassil Vassilev via llvm-commits
- [llvm] Avoid need for SLocEntryLoaded BitVector (PR #67960)
Vassil Vassilev via llvm-commits
- [llvm] Avoid need for SLocEntryLoaded BitVector (PR #67960)
Vassil Vassilev via llvm-commits
- [llvm] Avoid need for SLocEntryLoaded BitVector (PR #67960)
Vassil Vassilev via llvm-commits
- [llvm] Avoid need for SLocEntryLoaded BitVector (PR #67960)
Vassil Vassilev via llvm-commits
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Vassil Vassilev via llvm-commits
- [llvm] Inline operator== and operator!= (PR #67958)
Vassil Vassilev via llvm-commits
- [llvm] [Attributor] New attribute to identify what byte ranges are alive for an allocation (PR #66148)
Vidhush Singhal via llvm-commits
- [llvm] [Attributor] New attribute to identify what byte ranges are alive for an allocation (PR #66148)
Vidhush Singhal via llvm-commits
- [llvm] [Attributor] New attribute to identify what byte ranges are alive for an allocation (PR #66148)
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Vidhush Singhal via llvm-commits
- [llvm] [Attributor] New attribute to identify what byte ranges are alive for an allocation (PR #66148)
Vidhush Singhal via llvm-commits
- [llvm] [Attributor] New attribute to identify what byte ranges are alive for an allocation (PR #66148)
Vidhush Singhal via llvm-commits
- [llvm] [CMake] Support per-target linker flags (PR #68393)
Vincent Lee via llvm-commits
- [llvm] [CMake] Support per-target linker flags (PR #68393)
Vincent Lee via llvm-commits
- [llvm] [CMake] Support per-target linker flags (PR #68393)
Vincent Lee via llvm-commits
- [llvm] [CMake] Support per-target linker flags (PR #68393)
Vincent Lee via llvm-commits
- [PATCH] D156179: [CMake] Support per-target compiler and linker flags
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- [llvm] 55d8f0c - [lipo] Initialized variable after #67737
Vitaly Buka via llvm-commits
- [llvm] [lipo] Support creating Universal 64 bit Mach-O files. (PR #67737)
Vitaly Buka via llvm-commits
- [llvm] 63bbc25 - [RISCV] Remove a stray semi-colon [nfc]
Vitaly Buka via llvm-commits
- [PATCH] D140828: [C++] Implement "Deducing this" (P0847R7)
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- [PATCH] D154987: [lit] Implement PYTHON directive and config.prologue
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- [llvm] [runtimes] Fix parsing of LIB{CXX,CXXABI,UNWIND}_TEST_PARAMS (PR #67691)
Vladimir Vereschaka via llvm-commits
- [llvm] [runtimes] Fix parsing of LIB{CXX,CXXABI,UNWIND}_TEST_PARAMS (PR #67691)
Vladimir Vereschaka via llvm-commits
- [llvm] [runtimes] Fix parsing of LIB{CXX,CXXABI,UNWIND}_TEST_PARAMS (PR #67691)
Vladimir Vereschaka via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
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- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Vladislav Khmelevsky via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Vladislav Khmelevsky via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Vladislav Khmelevsky via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Vladislav Khmelevsky via llvm-commits
- [llvm] [BOLT][NFC] Set minimal alignment for BF (PR #67707)
Vladislav Khmelevsky via llvm-commits
- [llvm] [BOLT][NFC] Set minimal alignment for BF (PR #67707)
Vladislav Khmelevsky via llvm-commits
- [llvm] [BOLT] Return proper minimal alignment from BF (PR #67707)
Vladislav Khmelevsky via llvm-commits
- [llvm] [BOLT] Return proper minimal alignment from BF (PR #67707)
Vladislav Khmelevsky via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Vladislav Khmelevsky via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Vladislav Khmelevsky via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Vladislav Khmelevsky via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Vladislav Khmelevsky via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Vladislav Khmelevsky via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Vladislav Khmelevsky via llvm-commits
- [llvm] fix bolt typos (PR #68121)
Vladislav Khmelevsky via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Vladislav Khmelevsky via llvm-commits
- [llvm] [BOLT] Return proper minimal alignment from BF (PR #67707)
Vladislav Khmelevsky via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Vladislav Khmelevsky via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Vladislav Khmelevsky via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Vladislav Khmelevsky via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Vladislav Khmelevsky via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Vladislav Khmelevsky via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Vladislav Khmelevsky via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Vladislav Khmelevsky via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Vladislav Khmelevsky via llvm-commits
- [llvm] [BOLT] Fix long jump negative offset issue. (PR #67132)
Vladislav Khmelevsky via llvm-commits
- [llvm] [BOLT][runtime] Add start & fini symbols (PR #68505)
Vladislav Khmelevsky via llvm-commits
- [llvm] [BOLT] Support instrumentation hook via DT_FINI_ARRAY (PR #67348)
Vladislav Khmelevsky via llvm-commits
- [PATCH] D159089: [BOLT][RISCV] Add support for linker relaxation
Vladislav Khmelevsky via Phabricator via llvm-commits
- [llvm] [ThinLTO][NFC] Add Module Name Debug Print when Generating Module Maps (PR #67820)
Wael Yehia via llvm-commits
- [llvm] [ThinLTO][NFC] Add Module Name Debug Print when Generating Module Maps (PR #67820)
Wael Yehia via llvm-commits
- [llvm] [GVN] Invalidate ICF cache when clearing the instructions (PR #68145)
Wael Yehia via llvm-commits
- [llvm] [GVN] Invalidate ICF cache when clearing the instructions (PR #68145)
Wael Yehia via llvm-commits
- [llvm] [GVN] Invalidate ICF cache when clearing the instructions (PR #68145)
Wael Yehia via llvm-commits
- [llvm] [GVN] Invalidate ICF cache when clearing the instructions (PR #68145)
Wael Yehia via llvm-commits
- [llvm] [RISCV] Add sink-and-fold support for RISC-V. (PR #67602)
Wang Pengcheng via llvm-commits
- [llvm] [RISCV][NFC] Add base classes of Operand and uimm/simm (PR #68472)
Wang Pengcheng via llvm-commits
- [llvm] [RISCV] Match prefetch address with offset (PR #66072)
Wang Pengcheng via llvm-commits
- [llvm] [RISCV] Match prefetch address with offset (PR #66072)
Wang Pengcheng via llvm-commits
- [llvm] [RISCV][NFC] Add base classes of Operand and uimm/simm (PR #68472)
Wang Pengcheng via llvm-commits
- [llvm] [RISCV][NFC] Add base classes of Operand and uimm/simm (PR #68472)
Wang Pengcheng via llvm-commits
- [llvm] [RISCV] Select atomic_{load/store} to pseudos and expand them later (PR #67108)
Wang Pengcheng via llvm-commits
- [PATCH] D158062: [RISCV] Teach RISCVMergeBaseOffset to handle inline asm
Wang Pengcheng via Phabricator via llvm-commits
- [llvm] [llvm][CMake] Respect LIBCXX_HARDENING_MODE on command-line (PR #68541)
Will Hawkins via llvm-commits
- [llvm] [llvm][CMake] Respect LIBCXX_HARDENING_MODE on command-line (PR #68541)
Will Hawkins via llvm-commits
- [compiler-rt] [llvm-profdata] Do not create numerical strings for MD5 function names read from a Sample Profile. (PR #66164)
William Junda Huang via llvm-commits
- [llvm] [llvm-profdata] Do not create numerical strings for MD5 function names read from a Sample Profile. (PR #66164)
William Junda Huang via llvm-commits
- [compiler-rt] [llvm-profdata] Do not create numerical strings for MD5 function names read from a Sample Profile. (PR #66164)
William Junda Huang via llvm-commits
- [llvm] [llvm-profdata] Do not create numerical strings for MD5 function names read from a Sample Profile. (PR #66164)
William Junda Huang via llvm-commits
- [compiler-rt] [llvm-profdata] Do not create numerical strings for MD5 function names read from a Sample Profile. (PR #66164)
William Junda Huang via llvm-commits
- [llvm] [llvm-profdata] Do not create numerical strings for MD5 function names read from a Sample Profile. (PR #66164)
William Junda Huang via llvm-commits
- [compiler-rt] [llvm-profdata] Do not create numerical strings for MD5 function names read from a Sample Profile. (PR #66164)
William Junda Huang via llvm-commits
- [llvm] [llvm-profdata] Do not create numerical strings for MD5 function names read from a Sample Profile. (PR #66164)
William Junda Huang via llvm-commits
- [compiler-rt] [llvm-profdata] Do not create numerical strings for MD5 function names read from a Sample Profile. (PR #66164)
William Junda Huang via llvm-commits
- [llvm] [LTO] A static relocation model can override the PIC level wrt treating external address as directly accessible (PR #65512)
Wolfgang Pieb via llvm-commits
- [compiler-rt] [compiler-rt] Don't redefine LLVM_COMMON_CMAKE_UTILS if it's defined (PR #66761)
Xi Ruoyao via llvm-commits
- [PATCH] D83612: [NewPM][CodeGen] Add NPM support to llc
Yashwant Singh via Phabricator via llvm-commits
- [llvm] [HIP] Support compressing device binary (PR #67162)
Yaxun Liu via llvm-commits
- [llvm] [HIP] Support compressing device binary (PR #67162)
Yaxun Liu via llvm-commits
- [llvm] [HIP] Support compressing device binary (PR #67162)
Yaxun Liu via llvm-commits
- [llvm] [HIP] Support compressing device binary (PR #67162)
Yaxun Liu via llvm-commits
- [llvm] [HIP] Support compressing device binary (PR #67162)
Yaxun Liu via llvm-commits
- [llvm] [HIP] Support compressing device binary (PR #67162)
Yaxun Liu via llvm-commits
- [llvm] [HIP] Support compressing device binary (PR #67162)
Yaxun Liu via llvm-commits
- [llvm] c6ed5a6 - Revert "[HIP] Support compressing device binary (#67162)"
Yaxun Liu via llvm-commits
- [llvm] [HIP] Support compressing device binary (PR #67162)
Yaxun Liu via llvm-commits
- [llvm] [HIP] Support compressing device binary (PR #67162)
Yaxun Liu via llvm-commits
- [llvm] 7e28234 - Reland "[HIP] Support compressing device binary"
Yaxun Liu via llvm-commits
- [PATCH] D155775: [HIP][Clang][Driver][RFC] Add driver support for C++ Parallel Algorithm Offload
Yaxun Liu via Phabricator via llvm-commits
- [llvm] [RISCV] Add MC layer support for Zicfiss. (PR #66043)
Yeting Kuo via llvm-commits
- [llvm] [RISCV] Add MC layer support for Zicfiss. (PR #66043)
Yeting Kuo via llvm-commits
- [llvm] [RISCV] Implement shadow stack on shadow stack mode with Zicfiss. (PR #68075)
Yeting Kuo via llvm-commits
- [llvm] [RISCV] Implement shadow stack on shadow stack mode with Zicfiss. (PR #68075)
Yeting Kuo via llvm-commits
- [llvm] [RISCV] Avoid using x7/t2 for indirect branches which need landing pad. (PR #68292)
Yeting Kuo via llvm-commits
- [PATCH] D147448: [SimplifyCFG] Teach SinkCommonCodeFromPredecessors not to replace foldable GEPs with phi-nodes for sinking load/store.
Yeting Kuo via Phabricator via llvm-commits
- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Simplify the pattern `a ne/eq (zext/sext (a ne/eq c))` (PR #65852)
Yingwei Zheng via llvm-commits
- [llvm] [RISCV][SDAG] Prefer ShortForwardBranch to lower sdiv by pow2 (PR #67364)
Yingwei Zheng via llvm-commits
- [llvm] 33a194b - [InstCombine] Add pre-commit tests for #67915. NFC.
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Canonicalize `(X +/- Y) & Y` into `~X & Y` when Y is a power of 2 (PR #67915)
Yingwei Zheng via llvm-commits
- [llvm] 253ee85 - [CVP] Add pre-commit cttz/ctpop tests. NFC.
Yingwei Zheng via llvm-commits
- [llvm] [ConstantRange] Handle `Intrinsic::cttz` and `Intrinsic::ctpop` (PR #67917)
Yingwei Zheng via llvm-commits
- [llvm] [ConstantRange] Handle `Intrinsic::cttz` (PR #67917)
Yingwei Zheng via llvm-commits
- [llvm] [ConstantRange] Handle `Intrinsic::cttz` (PR #67917)
Yingwei Zheng via llvm-commits
- [llvm] [ConstantRange] Handle `Intrinsic::cttz` (PR #67917)
Yingwei Zheng via llvm-commits
- [llvm] [ConstantRange] Handle `Intrinsic::cttz` (PR #67917)
Yingwei Zheng via llvm-commits
- [llvm] [ConstantRange] Handle `Intrinsic::ctpop` (PR #68310)
Yingwei Zheng via llvm-commits
- [llvm] [ConstantRange] Handle `Intrinsic::cttz` (PR #67917)
Yingwei Zheng via llvm-commits
- [llvm] [ConstantRange] Handle `Intrinsic::cttz` (PR #67917)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Add support for non-splat vecs in cmpExcludesZero (PR #68331)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Add support for non-splat vecs in cmpExcludesZero (PR #68331)
Yingwei Zheng via llvm-commits
- [llvm] [X86][ISel] Improve logic for optimizing `movmsk(bitcast(shuffle(x)))` (PR #68369)
Yingwei Zheng via llvm-commits
- [llvm] [X86][ISel] Improve logic for optimizing `movmsk(bitcast(shuffle(x)))` (PR #68369)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Simplify the pattern `a ne/eq (zext/sext (a ne/eq c))` (PR #65852)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Canonicalize `(X +/- Y) & Y` into `~X & Y` when Y is a power of 2 (PR #67915)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Simplify the pattern `a ne/eq (zext/sext (a ne/eq c))` (PR #65852)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Simplify the pattern `a ne/eq (zext/sext (a ne/eq c))` (PR #65852)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Simplify the pattern `a ne/eq (zext/sext (a ne/eq c))` (PR #65852)
Yingwei Zheng via llvm-commits
- [llvm] b9edf6d - [InstCombine] Add additional pre-commit tests for #67915. NFC.
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Canonicalize `(X +/- Y) & Y` into `~X & Y` when Y is a power of 2 (PR #67915)
Yingwei Zheng via llvm-commits
- [lld] [InstCombine] Canonicalize `(X +/- Y) & Y` into `~X & Y` when Y is a power of 2 (PR #67915)
Yingwei Zheng via llvm-commits
- [compiler-rt] [InstCombine] Canonicalize `(X +/- Y) & Y` into `~X & Y` when Y is a power of 2 (PR #67915)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Simplify the pattern `a ne/eq (zext/sext (a ne/eq c))` (PR #65852)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Improve constant range computation for `shl` and `and`. (PR #68446)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Improve constant range computation for `shl` and `and`. (PR #68446)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Improve constant range computation for `shl` and `and`. (PR #68446)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Improve constant range computation for `shl` and `and`. (PR #68446)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Improve constant range computation for `shl` and `and`. (PR #68446)
Yingwei Zheng via llvm-commits
- [llvm] [MemCpyOpt] Fix the invalid code modification for GEP (PR #68479)
Yingwei Zheng via llvm-commits
- [llvm] [MemCpyOpt] Fix the invalid code modification for GEP (PR #68479)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] optimize powi(X,Y)/X with Ofast (PR #67236)
Yingwei Zheng via llvm-commits
- [llvm] [MemCpyOpt] Fix the invalid code modification for GEP (PR #68479)
Yingwei Zheng via llvm-commits
- [compiler-rt] [mlir][sparse] Update Enum name for CompressedWithHigh (PR #67845)
Yinying Li via llvm-commits
- [llvm] [mlir][sparse] Update Enum name for CompressedWithHigh (PR #67845)
Yinying Li via llvm-commits
- [llvm] [mlir][sparse] Print new syntax (PR #68130)
Yinying Li via llvm-commits
- [llvm] [mlir][sparse] Print new syntax (PR #68130)
Yinying Li via llvm-commits
- [llvm] [mlir][sparse] Print new syntax (PR #68130)
Yinying Li via llvm-commits
- [llvm] [mlir][sparse] Print new syntax (PR #68130)
Yinying Li via llvm-commits
- [llvm] [mlir][sparse] Print new syntax (PR #68130)
Yinying Li via llvm-commits
- [llvm] [mlir][sparse] Print new syntax (PR #68130)
Yinying Li via llvm-commits
- [compiler-rt] [mlir][sparse] Print new syntax (PR #68130)
Yinying Li via llvm-commits
- [lld] [mlir][sparse] Print new syntax (PR #68130)
Yinying Li via llvm-commits
- [llvm] [mlir][sparse] Print new syntax (PR #68130)
Yinying Li via llvm-commits
- [compiler-rt] [mlir][sparse] Print new syntax (PR #68130)
Yinying Li via llvm-commits
- [lld] [mlir][sparse] Print new syntax (PR #68130)
Yinying Li via llvm-commits
- [llvm] [mlir][sparse] introduce MapRef, unify conversion/codegen for reader (PR #68360)
Yinying Li via llvm-commits
- [llvm] [mlir][sparse] introduce MapRef, unify conversion/codegen for reader (PR #68360)
Yinying Li via llvm-commits
- [PATCH] D113366: [InstCombine] Canonicalize range test idiom
Yiran Wang via Phabricator via llvm-commits
- [llvm] [clang] Replace uses of CreatePointerBitCastOrAddrSpaceCast (NFC) (PR #68277)
Youngsuk Kim via llvm-commits
- [llvm] [clang] Replace uses of CreatePointerBitCastOrAddrSpaceCast (NFC) (PR #68277)
Youngsuk Kim via llvm-commits
- [llvm] [clang] Replace uses of CreatePointerBitCastOrAddrSpaceCast (NFC) (PR #68277)
Youngsuk Kim via llvm-commits
- [llvm] [clang] Replace uses of CreatePointerBitCastOrAddrSpaceCast (NFC) (PR #68277)
Youngsuk Kim via llvm-commits
- [llvm] [clang] Replace uses of CreatePointerBitCastOrAddrSpaceCast (NFC) (PR #68277)
Youngsuk Kim via llvm-commits
- [llvm] [clang] Replace uses of CreatePointerBitCastOrAddrSpaceCast (NFC) (PR #68277)
Youngsuk Kim via llvm-commits
- [llvm] [clang] Replace uses of CreatePointerBitCastOrAddrSpaceCast (NFC) (PR #68277)
Youngsuk Kim via llvm-commits
- [llvm] [clang] Replace uses of CreatePointerBitCastOrAddrSpaceCast (NFC) (PR #68277)
Youngsuk Kim via llvm-commits
- [llvm] [clang] Replace uses of CreatePointerBitCastOrAddrSpaceCast (NFC) (PR #68277)
Youngsuk Kim via llvm-commits
- [llvm] [clang] Replace uses of CreatePointerBitCastOrAddrSpaceCast (NFC) (PR #68277)
Youngsuk Kim via llvm-commits
- [compiler-rt] [compiler-rt] Fix MSVC compiler warnings (PR #67975)
Yury Bura via llvm-commits
- [compiler-rt] [compiler-rt] Fix MSVC compiler warnings (PR #67975)
Yury Bura via llvm-commits
- [compiler-rt] [compiler-rt] Fix MSVC compiler warnings (PR #67975)
Yury Bura via llvm-commits
- [llvm] [SystemZ][z/OS] Update lowerCall (PR #68259)
Yusra Syeda via llvm-commits
- [llvm] [SystemZ][z/OS] Add UtcClock extension to chrono.h/.cpp (PR #67846)
Yusra Syeda via llvm-commits
- [llvm] [WebAssembly] Define local sp if `llvm.stacksave` is used (PR #68133)
Yuta Saito via llvm-commits
- [llvm] [WebAssembly] Define local sp if `llvm.stacksave` is used (PR #68133)
Yuta Saito via llvm-commits
- [llvm] [WebAssembly] Define local sp if `llvm.stacksave` is used (PR #68133)
Yuta Saito via llvm-commits
- [llvm] [WebAssembly] Define local sp if `llvm.stacksave` is used (PR #68133)
Yuta Saito via llvm-commits
- [llvm] [WebAssembly] Define local sp if `llvm.stacksave` is used (PR #68133)
Yuta Saito via llvm-commits
- [llvm] [WebAssembly] Define local sp if `llvm.stacksave` is used (PR #68133)
Yuta Saito via llvm-commits
- [llvm] [AIX][TOC] Add -mtocdata/-mno-tocdata options on AIX (PR #67999)
Zaara Syeda via llvm-commits
- [compiler-rt] [clang-cl] Fix value of __FUNCTION__ and __FUNC__ in MSVC mode for c++. (PR #66120)
Zahira Ammarguellat via llvm-commits
- [llvm] [clang-cl] Fix value of __FUNCTION__ and __FUNC__ in MSVC mode for c++. (PR #66120)
Zahira Ammarguellat via llvm-commits
- [compiler-rt] [clang-cl] Fix value of __FUNCTION__ in MSVC mode. (PR #67592)
Zahira Ammarguellat via llvm-commits
- [compiler-rt] [clang-cl] Fix value of __FUNCTION__ in MSVC mode. (PR #67592)
Zahira Ammarguellat via llvm-commits
- [compiler-rt] [clang-cl] Fix value of __FUNCTION__ in MSVC mode. (PR #67592)
Zahira Ammarguellat via llvm-commits
- [llvm] [clang-cl] Fix value of __FUNCTION__ in MSVC mode. (PR #67592)
Zahira Ammarguellat via llvm-commits
- [compiler-rt] [clang-cl] Fix value of __FUNCTION__ in MSVC mode. (PR #67592)
Zahira Ammarguellat via llvm-commits
- [llvm] [clang-cl] Fix value of __FUNCTION__ in MSVC mode. (PR #67592)
Zahira Ammarguellat via llvm-commits
- [llvm] [clang-cl] Fix value of __FUNCTION__ in MSVC mode. (PR #67592)
Zahira Ammarguellat via llvm-commits
- [compiler-rt] [clang-cl] Fix value of __FUNCTION__ in MSVC mode. (PR #67592)
Zahira Ammarguellat via llvm-commits
- [llvm] [clang-cl] Fix value of __FUNCTION__ in MSVC mode. (PR #67592)
Zahira Ammarguellat via llvm-commits
- [llvm] [clang-cl] Fix value of __FUNCTION__ in MSVC mode. (PR #67592)
Zahira Ammarguellat via llvm-commits
- [compiler-rt] [clang-cl] Fix value of __FUNCTION__ in MSVC mode. (PR #67592)
Zahira Ammarguellat via llvm-commits
- [compiler-rt] [Profile] Use upper 32 bits of profile version for profile variants. (PR #67695)
Zequan Wu via llvm-commits
- [llvm] [Profile] Use upper 32 bits of profile version for profile variants. (PR #67695)
Zequan Wu via llvm-commits
- [llvm] [Profile] Use upper 32 bits of profile version for profile variants. (PR #67695)
Zequan Wu via llvm-commits
- [llvm] [Profile] Use upper 32 bits of profile version for profile variants. (PR #67695)
Zequan Wu via llvm-commits
- [PATCH] D140828: [C++] Implement "Deducing this" (P0847R7)
Zequan Wu via Phabricator via llvm-commits
- [PATCH] D70401: [RISCV] CodeGen of RVE and ilp32e/lp64e ABIs
Zixuan Wu via Phabricator via llvm-commits
- [PATCH] D158648: InstCombine: Introduce SimplifyDemandedUseFPClass
antoine moynault via Phabricator via llvm-commits
- [PATCH] D138846: MC/DC in LLVM Source-Based Code Coverage: LLVM back-end and compiler-rt
wael yehia via Phabricator via llvm-commits
- [compiler-rt] [ASan][Windows] Fix rip-relative instruction replacement (PR #68432)
nicole mazzuca via llvm-commits
- [compiler-rt] [ASan][Windows] Fix rip-relative instruction replacement (PR #68432)
nicole mazzuca via llvm-commits
- [compiler-rt] [ASan][Windows] Fix rip-relative instruction replacement (PR #68432)
nicole mazzuca via llvm-commits
- [compiler-rt] [ASan][Windows] Fix rip-relative instruction replacement (PR #68432)
nicole mazzuca via llvm-commits
- [llvm] [workflow] Fix abi checker in llvm-tests. Same fix as in 99fb0af80d16b0ff886f032441392219e1cac452 (PR #67957)
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- [llvm] [MC][NFC] Allow MCInstrAnalysis to store state (PR #65479)
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- [llvm] Inline operator== and operator!= (PR #67958)
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- [llvm] [RISCV][MC] Implement evaluateBranch for auipc+jalr pairs (PR #65480)
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- [llvm] Avoid need for SLocEntryLoaded BitVector (PR #67960)
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- [lld] [LLD] [COFF] Clarify -print-search-path for the empty string element (PR #67856)
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- [llvm] MachineFunctionPass: Clear properties before running function (PR #67962)
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- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
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- [llvm] fad69a5 - [Analysis][SVE] Improve cost model for some extending masked loads (#65957)
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- [llvm] 4533d47 - [LIT] NFC. Add missing punctuation on a LIT driver message (#67941)
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- [llvm] [RISCV] Update Zfa extension version to 1.0 (PR #67964)
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- [compiler-rt] 7bc09a4 - [compiler-rt] Reinstate removal of CRT choice flags from CMAKE_*_FLAGS* (#67935)
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- [lld] 7d7d9e4 - [LLD] [COFF] Clarify -print-search-path for the empty string element (#67856)
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- [lld] f906fd5 - [LLD] [COFF] Restore the current dir as the first entry in the search path (#67857)
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- [llvm] [InstCombine] Expand redundant phi cycle elimination (PR #67968)
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- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
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- [llvm] [InstCombine] Expand redundant phi cycle elimination (PR #67968)
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- [compiler-rt] [compiler-rt] Fix MSVC compiler warnings (PR #67975)
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- [llvm] [SPIRV] Fix SPV_KHR_expect_assume support (PR #67793)
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- [llvm] Introduce paged vector (PR #66430)
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- [llvm] [MLIR][Presburger] Define matrix inverse for rational matrices (PR #67382)
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- [llvm] [MLIR][Presburger] Define matrix inverse for rational matrices (PR #67382)
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- [llvm] [MLIR][Presburger] Fix reduction of Fractions and add tests (PR #67382)
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- [llvm] [MLIR][Presburger] Fix reduction of Fractions and add tests (PR #67382)
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- [llvm] [MLIR][Presburger] Fix reduction of Fractions and add tests (PR #67382)
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- [llvm] [AArch64][LoopVectorize] Use either fixed-width or scalable VF when tail-folding (PR #67543)
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- [llvm] [analyzer] Fix crash in BasicValueFactory.cpp with __int128_t integers (PR #67212)
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- [llvm] [analyzer] Fix crash in BasicValueFactory.cpp with __int128_t integers (PR #67212)
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- [llvm] [analyzer] Fix crash in BasicValueFactory.cpp with __int128_t integers (PR #67212)
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- [llvm] [analyzer] Fix crash in BasicValueFactory.cpp with __int128_t integers (PR #67212)
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- [llvm] [IR] Add zext nneg flag (PR #67982)
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- [llvm] [AArch64][LoopVectorize] Use either fixed-width or scalable VF when tail-folding (PR #67543)
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- [llvm] [AArch64][LoopVectorize] Use either fixed-width or scalable VF when tail-folding (PR #67543)
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- [llvm] [AArch64][LoopVectorize] Use either fixed-width or scalable VF when tail-folding (PR #67543)
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- [llvm] 5db0a45 - [AVR] Fix a crash in AVRInstrInfo::insertIndirectBranch (#67324)
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- [llvm] [CodeExtractor] Consider Value arguments of dbg.assign (PR #67987)
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- [llvm] a41ce98 - [FastISel][DebugInfo] Handle dbg.value targeting allocas (#67187)
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- [llvm] [OpenMPIRBuilder] Remove wrapper function in `createTask` (PR #67723)
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- [llvm] [OpenMPIRBuilder] Remove wrapper function in `createTask` (PR #67723)
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- [lld] [OpenMPIRBuilder] Remove wrapper function in `createTask` (PR #67723)
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- [llvm] [OpenMPIRBuilder] Remove wrapper function in `createTask` (PR #67723)
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- [lld] [OpenMPIRBuilder] Remove wrapper function in `createTask` (PR #67723)
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- [llvm] [OpenMPIRBuilder] Remove wrapper function in `createTask` (PR #67723)
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- [lld] [OpenMPIRBuilder] Remove wrapper function in `createTask` (PR #67723)
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- [llvm] [OpenMPIRBuilder] Remove wrapper function in `createTask`, `createTeams` (PR #67723)
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- [compiler-rt] [OpenMPIRBuilder] Remove wrapper function in `createTask`, `createTeams` (PR #67723)
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- [lld] [OpenMPIRBuilder] Remove wrapper function in `createTask`, `createTeams` (PR #67723)
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- [llvm] [OpenMPIRBuilder] Remove wrapper function in `createTask`, `createTeams` (PR #67723)
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- [llvm] [AArch64][LoopVectorize] Use upper bound trip count instead of the constant TC when choosing max VF (PR #67697)
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- [llvm] [PowerPC] Fix missing kill flag update for XVCVDPSP transformations (PR #67997)
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- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
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- [llvm] [AIX][TOC] Add -mtocdata/-mno-tocdata options on AIX (PR #67999)
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- [llvm] [DAG] Extend the computeOverflowForSignedSub/computeOverflowForUnsignedSub implementations with ConstantRange (PR #67890)
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- [llvm] 8f4ffbb - [RISCV] Create new build vector instead of relying on getNode constan… (#67944)
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- [llvm] [AMDGPU][MachineScheduler] Alternative way to control excess RP. (PR #68004)
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- [llvm] [AMDGPU][MachineScheduler] Alternative way to control excess RP. (PR #68004)
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- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
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- [llvm] f776e0b - [AArch64][Win] Work around an MSVC arm64 compiler bug (#67865)
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- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
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- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
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- [llvm] [AArch64] Fix x18 being used by nest ptrs with MSVC ABI (PR #68008)
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- [compiler-rt] [scudo] Mark page status in getStats in secondary (PR #67588)
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- [compiler-rt] [scudo] Mark page status in getStats in secondary (PR #67588)
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- [llvm] [LVI] Handle icmp of ashr. (PR #68010)
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- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
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- [llvm] [PowerPC] Inline callee if its target-features are a subset of the caller (PR #67710)
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- [llvm] 01797da - Fix mechanism propagating mangled names for TLI function mappings (#66656)
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- [llvm] Fix mechanism propagating mangled names for TLI function mappings (PR #66656)
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- [llvm] [InstCombine] Extend Phi-Icmp use to include or (PR #67682)
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- [llvm] [RISCV] Generaize reduction tree matching to all integer reductions (PR #68014)
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- [llvm] [RISCV] Generaize reduction tree matching to all integer reductions (PR #68014)
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- [llvm] Improve omp offload profiler (PR #68016)
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- [lld] Improve omp offload profiler (PR #68016)
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- [compiler-rt] Improve omp offload profiler (PR #68016)
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- [llvm] [llvm-profgen] Print DWP related warnings under show-detailed-warning (PR #68019)
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- [lld] Improve omp offload profiler (PR #68016)
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- [compiler-rt] Improve omp offload profiler (PR #68016)
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- [llvm] Improve omp offload profiler (PR #68016)
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- [llvm] [libc++] Implement ranges::contains_subrange (PR #66963)
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- [compiler-rt] [libc++] Implement ranges::contains_subrange (PR #66963)
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- [llvm] Use Log2_64_Ceil to compute PowerOf2Ceil (PR #67580)
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- [compiler-rt] Adding Separate OpenMP Offloading Backend to `libcxx/include/__algorithm/pstl_backends` (PR #66968)
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- [llvm] Use Log2_64_Ceil to compute PowerOf2Ceil (PR #67580)
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- [lld] [LLD][ELF] Don't instantiate ObjFile function but rather import it (PR #68025)
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- [llvm] [RISCV] Fix incorrect codegen for Zfa with negated forms of constants in the lookup table (PR #68026)
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- [llvm] [DiagnosticInfo] Output full file path instead of relative path (PR #68027)
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- [llvm] [DiagnosticInfo] Output full file path instead of relative path (PR #68027)
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- [llvm] 3c0990c - [RISCV] Generalize the (ADD (SLLI X, 32), X) special case in constant materialization. (#66931)
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- [llvm] 3dda104 - [docs] Advise contributors to check for truncated PR titles (#68021)
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- [llvm] [DiagnosticInfo] Output full file path instead of relative path (PR #68027)
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- [llvm] [AMDGPU] Allow shinking instruction with dead sdst (PR #68028)
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- [llvm] 0152e1f - [RISCV] Fix incorrect codegen for Zfa with negated forms of constants in the lookup table (#68026)
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- [llvm] [ELF] Handle relocations in synthetic .eh_frame with a non-zero offset within the output section (PR #65966)
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- [llvm] [AMDGPU] Allow shinking instruction with dead sdst (PR #68028)
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- [llvm] [DiagnosticInfo] Output full file path instead of relative path (PR #68027)
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- [llvm] [ConstraintElim] Support arbitrary incoming values for indcutions. (PR #68032)
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- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
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- [llvm] 3f417a7 - [NFC] [Coverage] Do not use recursion for getMaxCounterID (#67870)
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- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
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- [lld] [ELF] Handle relocations in synthetic .eh_frame with a non-zero offset within the output section (PR #65966)
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- [lld] [ELF] Handle relocations in synthetic .eh_frame with a non-zero offset within the output section (PR #65966)
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- [lld] [ELF] Handle relocations in synthetic .eh_frame with a non-zero offset within the output section (PR #65966)
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- [lld] [ELF] Handle relocations in synthetic .eh_frame with a non-zero offset within the output section (PR #65966)
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- [lld] Improve omp offload profiler (PR #68016)
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- [compiler-rt] Improve omp offload profiler (PR #68016)
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- [lld] 3923e61 - [lld][COFF][LTO] Implement /lldemit:llvm option (#66964)
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- [llvm] 6ae36c0 - [AArch64] Disable loop alignment for Windows targets (#67894)
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- [llvm] [DiagnosticInfo] Output full file path instead of relative path (PR #68027)
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- [llvm] [Inliner] Improve propagation of return attributes. (PR #67756)
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- [llvm] [Inliner] Improve propagation of return attributes. (PR #67756)
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- [llvm] [mlir][OpenMP] Added translation for `omp.teams` to LLVM IR (PR #68042)
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- [lld] [mlir][OpenMP] Added translation for `omp.teams` to LLVM IR (PR #68042)
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- [llvm] [mlir][OpenMP] Added translation for `omp.teams` to LLVM IR (PR #68042)
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- [lld] [mlir][OpenMP] Added translation for `omp.teams` to LLVM IR (PR #68042)
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- [llvm] [mlir][OpenMP] Added translation for `omp.teams` to LLVM IR (PR #68042)
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- [lld] [mlir][OpenMP] Added translation for `omp.teams` to LLVM IR (PR #68042)
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- [compiler-rt] ce00dde - [scudo] Mark page status in getStats in secondary (#67588)
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- [compiler-rt] [scudo] Mark page status in getStats in secondary (PR #67588)
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- [llvm] Remove fold immediates from shrink (PR #68045)
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- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
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- [compiler-rt] [scudo] Relax MemtagTag.SelectRandomTag. (PR #68048)
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- [llvm] [BOLT][NFC] Set minimal alignment for BF (PR #67707)
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- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
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- [llvm] [InstCombine] Fold comparison of adding two z/sext booleans (PR #67895)
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- [llvm] [Debuginfod] Accept compressed encodings in client (PR #68055)
via llvm-commits
- [llvm] Use Log2_64_Ceil to compute PowerOf2Ceil (PR #67580)
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- [lld] [lld][ELF] Warn instead of error when linker script fails to find section (PR #68058)
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- [lld] [lld][ELF] Warn instead of error when linker script fails to find section (PR #68058)
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- [lld] [lld][ELF] Warn instead of error when linker script fails to find section (PR #68058)
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- [llvm] [Clang][OpenMP][OMPIRBuilder] Move Clang's OpenMP Member/MemberOf flag helpers into the OMPIRBuilder (PR #67844)
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- [lld] [libc++] Implement ranges::contains_subrange (PR #66963)
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- [llvm] [mlir][OpenMP] Added translation for `omp.teams` to LLVM IR (PR #68042)
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- [llvm] [llvm-gsymutil] Print a DWO file missing warning under --quiet flag (PR #68062)
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- [llvm] [llvm-gsymutil] Print a DWO file missing warning under --quiet flag (PR #68062)
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- [llvm] [llvm-gsymutil] Print a DWO file missing warning under --quiet flag (PR #68062)
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- [llvm] b116747 - [Object] Remove restriction universal archives having both IR and native (#67505)
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- [llvm] [PowerPC] Add the SCV instruction. (PR #68063)
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- [llvm] Inline operator== and operator!= (PR #67958)
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- [llvm] [DiagnosticInfo] Output full file path instead of relative path (PR #68027)
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- [llvm] a29e8ef - [WebAssembly] Add path to PIC mode for wasm tables (#67545)
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- [llvm] [SPIRV] Fix SPV_KHR_expect_assume support (PR #67793)
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- [compiler-rt] [scudo] Add missing thread-safety analysis annotations. (PR #68072)
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- [compiler-rt] [scudo] Add missing thread-safety analysis annotations. (PR #68072)
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- [llvm] [Profile] Use upper 32 bits of profile version for profile variants. (PR #67695)
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- [llvm] Inline operator== and operator!= (PR #67958)
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- [llvm] [Profile] Use upper 32 bits of profile version for profile variants. (PR #67695)
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- [compiler-rt] [Profile] Use upper 32 bits of profile version for profile variants. (PR #67695)
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- [compiler-rt] [Profile] Use upper 32 bits of profile version for profile variants. (PR #67695)
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- [llvm] [RISCV] Add MC layer support for Zicfiss. (PR #66043)
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- [llvm] 864beb1 - [llvm][CMake] Expand error message shown when -fuse-ld= test fails (#66778)
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- [llvm] [RISCV] Implement shadow stack on shadow stack mode with Zicfiss. (PR #68075)
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- [llvm] [LoopVectorize] Vectorize select-cmp reduction pattern for increasing integer induction variable (PR #67812)
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- [lld] 3cde1d8 - [ELF] Handle relocations in synthetic .eh_frame with a non-zero offset within the output section (#65966)
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- [lld] [ELF] Handle relocations in synthetic .eh_frame with a non-zero offset within the output section (PR #65966)
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- [compiler-rt] [compiler-rt] Fix typo in FuzzedDataProvider.h (PR #68083)
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- [llvm] [AMDGPU][MachineScheduler] Alternative way to control excess RP. (PR #68004)
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- [llvm] Fix mechanism propagating mangled names for TLI function mappings (PR #66656)
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- [llvm] [mlir] enable python bindings for nvgpu transforms (PR #68088)
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- [llvm] Late temporal divergence lowering for SDAG (PR #67033)
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- [llvm] Late temporal divergence lowering for SDAG (PR #67033)
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- [llvm] e577e70 - [RISCV] Move vector pseudo hasAllNBitUsers switch into RISCVInstrInfo. NFC (#67593)
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- [llvm] 00396e6 - [ConstraintElim] Support arbitrary incoming values for inductions (#68032)
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- [llvm] 481df27 - [RISCV][SelectionDAG] Sign extend splats of i32 in getConstant on RV64 (#67027)
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- [lld] [OpenMP] Improve omp offload profiler (PR #68016)
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- [llvm] [OpenMP] Improve omp offload profiler (PR #68016)
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- [compiler-rt] [OpenMP] Improve omp offload profiler (PR #68016)
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- [llvm] [mlir] enable python bindings for nvgpu transforms (PR #68088)
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- [llvm] [mlir] enable python bindings for nvgpu transforms (PR #68088)
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- [llvm] [mlir] enable python bindings for nvgpu transforms (PR #68088)
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- [llvm] [OpenMP] Improve omp offload profiler (PR #68016)
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- [lld] [OpenMP] Improve omp offload profiler (PR #68016)
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- [llvm] Fix mechanism propagating mangled names for TLI function mappings (PR #66656)
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- [llvm] Changing TimeProfiler.cpp clock from microseconds to nanoseconds (PR #68096)
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- [llvm] Changing TimeProfiler.cpp clock from microseconds to nanoseconds (PR #68096)
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- [llvm] bc0c178 - [Clang][OpenMP][OMPIRBuilder] Move Clang's OpenMP Member/MemberOf flag helpers into the OMPIRBuilder (#67844)
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- [llvm] [Clang][OpenMP][OMPIRBuilder] Move Clang's OpenMP Member/MemberOf flag helpers into the OMPIRBuilder (PR #67844)
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- [llvm] [TLI] Added a guard for empty vector function name. (PR #68100)
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- [llvm] [TLI] Added a guard for empty vector function name. (PR #68100)
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- [llvm] [TLI] Added a guard for empty vector function name. (PR #68100)
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- [llvm] Changing TimeProfiler.cpp clock from microseconds to nanoseconds (PR #68096)
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- [compiler-rt] [AArch64][FMV] Add rcpc3 support, introduce bits for features extensi… (PR #68104)
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- [llvm] 9084934 - [ThinLTO][NFC] Add Module Name Debug Print when Generating Module Maps (#67820)
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- [llvm] 3dc7039 - [lit] Fix shell commands with newlines (#67898)
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- [llvm] Tli nfc fix mechanism propagating mangled names for tli function mappings ac3 (PR #67308)
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- [llvm] [OpenMP] Improve omp offload profiler (PR #68016)
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- [llvm] 9546b5d - [TLI] Added a guard for empty vector function name. (#68100)
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- [llvm] [TLI] Added a guard for empty vector function name. (PR #68100)
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- [lld] a2ef046 - [LLD][ELF] Import `ObjFile::importCmseSymbols` at call site (#68025)
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- [llvm] 3c34245 - [Profile] Use upper 32 bits of profile version for profile variants. (#67695)
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- [llvm] 9b51200 - [RISCV] A test demonstrating missed opportunity to combine `addi` into (#67022)
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- [llvm] [RISCV] Update Zfa extension version to 1.0 (PR #67964)
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- [llvm] 7a0b9da - [RISCV] Generaize reduction tree matching to all integer reductions (#68014)
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- [llvm] LoopVectorize: vectorize decreasing integer IV in select-cmp (PR #68112)
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- [llvm] [RISCV] Mark the Zfa extension as non-experimental (PR #68113)
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- [llvm] Use Log2_64_Ceil to compute PowerOf2Ceil (PR #67580)
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- [llvm] [RISCV] Mark the Zfa extension as non-experimental (PR #68113)
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- [llvm] [SystemZ/z/OS] Add library names for intrinsics (PR #68114)
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- [llvm] [RISCV] Relax some Zvbb patterns and lowerings to Zvkb (PR #68115)
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- [lld] [LLD] [COFF] Fix handling of comdat .drectve sections (PR #68116)
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- [llvm] [NVPTX] Teach NVPTX about predicates (PR #67468)
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- [llvm] [LV] Stability fix for outerloop vectorization (PR #68118)
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- [lld] Mark operator== const to avoid ambiguity in C++20. (PR #68119)
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- [llvm] [DiagnosticInfo] Output full file path instead of relative path (PR #68027)
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- [llvm] [DiagnosticInfo] Output full file path instead of relative path (PR #68027)
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- [llvm] [DiagnosticInfo] Output full file path instead of relative path (PR #68027)
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- [llvm] [DiagnosticInfo] Output full file path instead of relative path (PR #68027)
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- [llvm] [DiagnosticInfo] Output full file path instead of relative path (PR #68027)
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- [llvm] 42de2b7 - [SystemZ/z/OS] Add library names for intrinsics (#68114)
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- [llvm] fix bolt typos (PR #68121)
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- [llvm] Tli nfc fix mechanism propagating mangled names for tli function mappings ac3 (PR #67308)
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- [llvm] fix bolt typos (PR #68121)
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- [llvm] [OpenMP][OpenMPIRBuilder][NFC] Move copyInput to a passed in lambda function (PR #68124)
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- [llvm] [OpenMP][OpenMPIRBuilder][NFC] Move copyInput to a passed in lambda function (PR #68124)
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- [llvm] [TableGen][GISel] Fix incorrect binding of predicate operands upon `PredicateUsesOperands = 1` (PR #68125)
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- [llvm] [llvm-profgen] Print DWP related warnings under show-detailed-warning (PR #68019)
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- [compiler-rt] [scudo] Add missing thread-safety analysis annotations. (PR #68072)
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- [llvm] 169c205 - [RISCV] Relax some Zvbb patterns and lowerings to Zvkb (#68115)
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- [llvm] [AMDGPU][MachineScheduler] Alternative way to control excess RP. (PR #68004)
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- [llvm] [AMDGPU][MachineScheduler] Alternative way to control excess RP. (PR #68004)
via llvm-commits
- [llvm] 18c3c46 - [RISCV] Update Zfa extension version to 1.0 (#67964)
via llvm-commits
- [llvm] 5064ca8 - [CodeExtractor] Consider Value arguments of dbg.assign (#67987)
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- [llvm] f2357da - [Debuginfod] Accept compressed encodings in client (#68055)
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- [llvm] AMDGPU: Fix temporal divergence introduced by machine-sink and performance regression introduced by D155343 (PR #67456)
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- [llvm] AMDGPU: Fix temporal divergence introduced by machine-sink and performance regression introduced by D155343 (PR #67456)
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- [llvm] eae1e28 - [RISCV] Mark the Zfa extension as non-experimental (#68113)
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- [llvm] [OpenMP][OpenMPIRBuilder][NFC] Move copyInput to a passed in lambda function (PR #68124)
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- [llvm] [OpenMP][OpenMPIRBuilder][NFC] Move copyInput to a passed in lambda function (PR #68124)
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- [llvm] [LLVM][DWARF] Add support for monolithic types in .debug_names (PR #68131)
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- [llvm] fix bolt typos (PR #68121)
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- [llvm] [WebAssembly] Define local sp if `llvm.stacksave` is used (PR #68133)
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- [llvm] fix bolt typos (PR #68121)
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- [compiler-rt] [builtins] Support building the 128-bit float functions on x86 (PR #68132)
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- [llvm] [OpenMP][OpenMPIRBuilder][NFC] Move copyInput to a passed in lambda function (PR #68124)
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- [llvm] [WebAssembly] Define local sp if `llvm.stacksave` is used (PR #68133)
via llvm-commits
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via llvm-commits
- [llvm] [OpenMP][OpenMPIRBuilder][NFC] Move copyInput to a passed in lambda function (PR #68124)
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- [llvm] [DiagnosticInfo] Output full file path instead of relative path (PR #68027)
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- [llvm] [Inliner] Improve propagation of return attributes. (PR #67756)
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- [llvm] [Inliner] Add argument/function attribute propagation before inlining. (PR #68164)
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- [lld] [mlir][OpenMP] Added translation for `omp.teams` to LLVM IR (PR #68042)
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- [llvm] [Inliner] Add argument/function attribute propagation before inlining. (PR #68164)
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- [llvm] [Inliner] Add argument/function attribute propagation before inlining. (PR #68164)
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- [llvm] [Inliner] Add argument/function attribute propagation before inlining. (PR #68164)
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- [llvm] 61785ff - Do not remove empty basic blocks which have address taken. (#67740)
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- [llvm] [DiagnosticInfo] Output full file path instead of relative path (PR #68027)
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- [llvm] [DiagnosticInfo] Output full file path instead of relative path (PR #68027)
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- [llvm] Use Log2_64_Ceil to compute PowerOf2Ceil (PR #67580)
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- [lld] d12b99a - [lld][COFF][LTO] Implement /lldemit:asm option (#67079)
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- [llvm] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
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- [llvm] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
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- [llvm] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
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- [compiler-rt] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
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- [compiler-rt] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
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- [llvm] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
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- [compiler-rt] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
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- [compiler-rt] [libc++] Implement ranges::contains (PR #65148)
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- [llvm] [llvm-profgen] Print DWP related warnings under show-detailed-warning (PR #68019)
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- [llvm] [llvm-profgen] Print DWP related warnings under show-detailed-warning (PR #68019)
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- [llvm] 9370271 - [Support] Redefine endianness::native (#67876)
via llvm-commits
- [llvm] [llvm-profgen] Print DWP related warnings under show-detailed-warning (PR #68019)
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- [llvm] [OpenMP][OpenMPIRBuilder][NFC] Move copyInput to a passed in lambda function (PR #68124)
via llvm-commits
- [llvm] [OpenMP][OpenMPIRBuilder][NFC] Move copyInput to a passed in lambda function (PR #68124)
via llvm-commits
- [llvm] [Support] Rename HashBuilderImpl to HashBuilder (NFC) (PR #68173)
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- [llvm] [Support] Rename llvm::support::endianness to llvm::endianness (PR #68174)
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- [llvm] llvm-canon (PR #68176)
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- [llvm] 9677678 - [llvm-profgen] Print DWP related warnings under show-detailed-warning (#68019)
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- [llvm] [LoopVectorize] Vectorize select-cmp reduction pattern for increasing integer induction variable (PR #67812)
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- [llvm] [AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (PR #68186)
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- [llvm] [LoopVectorize] Vectorize select-cmp reduction pattern for increasing integer induction variable (PR #67812)
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- [llvm] [AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (PR #68186)
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- [lld] 503bc5f - [LLD] [COFF] Fix handling of comdat .drectve sections (#68116)
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- [llvm] [AMDGPU][GlobalIsel] Introduce isRegType to check for legal types, (PR #68189)
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- [llvm] [AMDGPU][GlobalIsel] Introduce isRegType to check for legal types, (PR #68189)
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- [llvm] [AMDGPU][GlobalIsel] Introduce isRegType to check for legal types, instead of checking bit width. (PR #68189)
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- [llvm] 186c907 - [InstCombine] Expand redundant phi cycle elimination (#67968)
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- [llvm] [AMDGPU][GlobalIsel] Introduce isRegType to check for legal types, instead of checking bit width. (PR #68189)
via llvm-commits
- [llvm] [LVI][CVP] `getRangeFor` propagates `MayIncludeUndef` (PR #68190)
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- [llvm] [AMDGPU][GlobalIsel] Introduce isRegType to check for legal types, instead of checking bit width. (PR #68189)
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- [llvm] b30765c - [AArch64] Fix an incorrect handling of debug values in MachineSink (#68107)
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- [llvm] [InlineCost] Enable the cost benefit analysis for Sample PGO (PR #66457)
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- [llvm] [SPIRV] Do not remove capability from all caps (PR #68194)
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- [llvm] [AMDGPU] Add encoding/decoding support for non-result-returning ATOMIC_CSUB instructions (PR #68197)
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- [llvm] [AArch64][GlobalISel] Legalize G_VECREDUCE_ADD bigger types (PR #68202)
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- [llvm] [AArch64][GlobalISel] Legalize G_VECREDUCE_ADD bigger types (PR #68202)
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- [llvm] [RISCV] Relax vslide*_vl patterns to allow any mask. NFC (PR #68203)
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- [llvm] [AArch64][PAC] Specify Defs and Uses of PAUTH_(PROLOGUE|EPILOGUE) (PR #68205)
via llvm-commits
- [llvm] Reorganise tests for using SLEEF symbols in LV. (PR #68207)
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- [llvm] Reorganise tests for using SLEEF symbols in LV. (PR #68207)
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- [llvm] cf80def - [AMDGPU][GFX11] Do not rewrite V_FMA/FMAC_* to V_FMAAK_F16_t16 on operand legalization. (#66202)
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- [compiler-rt] 0cf0bc7 - [compiler-rt] Don't redefine LLVM_COMMON_CMAKE_UTILS if it's defined (#66761)
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- [llvm] [SelectionDAG][WebAssembly] Tidy up around endianess and isConstantSplat (PR #68212)
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- [llvm] [SelectionDAG][WebAssembly] Tidy up around endianess and isConstantSplat (PR #68212)
via llvm-commits
- [llvm] AMDGPU: Fix temporal divergence introduced by machine-sink and performance regression introduced by D155343 (PR #67456)
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- [llvm] AMDGPU: Fix temporal divergence introduced by machine-sink and performance regression introduced by D155343 (PR #67456)
via llvm-commits
- [llvm] AMDGPU: Fix temporal divergence introduced by machine-sink and performance regression introduced by D155343 (PR #67456)
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- [llvm] [Vectorize] Vectorization for __builtin_prefetch (PR #66160)
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- [llvm] [Vectorize] Vectorization for __builtin_prefetch (PR #66160)
via llvm-commits
- [llvm] Changing TimeProfiler.cpp clock from microseconds to nanoseconds (PR #68096)
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- [lld] [lld] [MTE] Drop MTE globals for fully static executables, not ban (PR #68217)
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- [llvm] Changing TimeProfiler.cpp clock from microseconds to nanoseconds (PR #68096)
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- [lld] [lld] [MTE] Drop MTE globals for fully static executables, not ban (PR #68217)
via llvm-commits
- [llvm] a1e81d2 - [HIP] Support compressing device binary (#67162)
via llvm-commits
- [llvm] [BOLT} Fix typos (PR #68121)
via llvm-commits
- [llvm] [BOLT] Fix typos (PR #68121)
via llvm-commits
- [llvm] [MLIR][NVGPU] Introduce `nvgpu.wargroup.mma.store` Op for Hopper GPUs (PR #65441)
via llvm-commits
- [llvm] [MLIR][NVGPU] Introduce `nvgpu.wargroup.mma.store` Op for Hopper GPUs (PR #65441)
via llvm-commits
- [llvm] [MLIR][NVGPU] Introduce `nvgpu.wargroup.mma.store` Op for Hopper GPUs (PR #65441)
via llvm-commits
- [llvm] [MLIR][NVGPU] Introduce `nvgpu.wargroup.mma.store` Op for Hopper GPUs (PR #65441)
via llvm-commits
- [llvm] [MLIR][NVGPU] Introduce `nvgpu.wargroup.mma.store` Op for Hopper GPUs (PR #65441)
via llvm-commits
- [llvm] [MLIR][NVGPU] Introduce `nvgpu.wargroup.mma.store` Op for Hopper GPUs (PR #65441)
via llvm-commits
- [llvm] [MLIR][NVGPU] Introduce `nvgpu.wargroup.mma.store` Op for Hopper GPUs (PR #65441)
via llvm-commits
- [llvm] Reorganise tests for using SLEEF symbols in LV. (PR #68207)
via llvm-commits
- [llvm] 0dcc653 - [X86] Add combine tests for pointers of mixed sizes (NFC) (#68219)
via llvm-commits
- [llvm] [BOLT] Fix typos (PR #68121)
via llvm-commits
- [compiler-rt] Bugfix for chosing the correct deduction guide (PR #66487)
via llvm-commits
- [llvm] Bugfix for chosing the correct deduction guide (PR #66487)
via llvm-commits
- [compiler-rt] Bugfix for chosing the correct deduction guide (PR #66487)
via llvm-commits
- [llvm] d32cce5 - [AArch64][PAC] Specify Defs and Uses of PAUTH_(PROLOGUE|EPILOGUE)
via llvm-commits
- [lld] 8899b71 - [LLD][COFF] Mark operator== const to avoid ambiguity in C++20. (#68119)
via llvm-commits
- [llvm] [AMDGPU][MISCHED] GCNBalancedSchedStrategy. (PR #68229)
via llvm-commits
- [llvm] [AMDGPU][MISCHED] GCNBalancedSchedStrategy. (PR #68229)
via llvm-commits
- [lld] [AMDGPU][MachineScheduler] Alternative way to control excess RP. (PR #68004)
via llvm-commits
- [llvm] [AMDGPU][MachineScheduler] Alternative way to control excess RP. (PR #68004)
via llvm-commits
- [compiler-rt] [AMDGPU][MachineScheduler] Alternative way to control excess RP. (PR #68004)
via llvm-commits
- [llvm] [AMDGPU][MISCHED] GCNBalancedSchedStrategy. (PR #68229)
via llvm-commits
- [llvm] [AMDGPU][MISCHED] GCNBalancedSchedStrategy. (PR #68229)
via llvm-commits
- [llvm] [llvm-objcopy] Add --gap-fill and --pad-to options (PR #65815)
via llvm-commits
- [llvm] [llvm-objcopy] Add --gap-fill and --pad-to options (PR #65815)
via llvm-commits
- [llvm] [llvm-objcopy] Add --gap-fill and --pad-to options (PR #65815)
via llvm-commits
- [llvm] [llvm-objcopy] Add --gap-fill and --pad-to options (PR #65815)
via llvm-commits
- [llvm] [llvm-objcopy] Add --gap-fill and --pad-to options (PR #65815)
via llvm-commits
- [llvm] [llvm-objcopy] Add --gap-fill and --pad-to options (PR #65815)
via llvm-commits
- [llvm] [llvm-objcopy] Add --gap-fill and --pad-to options (PR #65815)
via llvm-commits
- [llvm] [llvm-objcopy] Add --gap-fill and --pad-to options (PR #65815)
via llvm-commits
- [llvm] [llvm-objcopy] Add --gap-fill and --pad-to options (PR #65815)
via llvm-commits
- [llvm] [llvm-objcopy] Add --gap-fill and --pad-to options (PR #65815)
via llvm-commits
- [lld] Bugfix for chosing the correct deduction guide (PR #66487)
via llvm-commits
- [llvm] Bugfix for chosing the correct deduction guide (PR #66487)
via llvm-commits
- [llvm] Bugfix for chosing the correct deduction guide (PR #66487)
via llvm-commits
- [lld] Bugfix for chosing the correct deduction guide (PR #66487)
via llvm-commits
- [llvm] [X86][GlobalISel] Reorganize shift scalar tests (NFC) (PR #68232)
via llvm-commits
- [lld] [clang] Choose non-templated ctor as deduction guide unambiguously (PR #66487)
via llvm-commits
- [llvm] [OpenMP][OpenMPIRBuilder][NFC] Move copyInput to a passed in lambda function (PR #68124)
via llvm-commits
- [llvm] Port Swift's merge function pass to llvm: merging functions that differ in constants (PR #68235)
via llvm-commits
- [llvm] [llvm-rc] add support for MENUEX (PR #67464)
via llvm-commits
- [llvm] Port Swift's merge function pass to llvm: merging functions that differ in constants (PR #68235)
via llvm-commits
- [llvm] [llvm-rc] add support for MENUEX (PR #67464)
via llvm-commits
- [lld] [LLD][COFF] Add support for `--time-trace` (PR #68236)
via llvm-commits
- [llvm] [Documentation] Fix some invalid references in sphinx documentation (PR #68239)
via llvm-commits
- [llvm] [Documentation] Fix some invalid references in sphinx documentation (PR #68239)
via llvm-commits
- [llvm] [Documentation] Fix some invalid references in sphinx documentation (PR #68239)
via llvm-commits
- [llvm] [NFC]Rename InstrProf::getFuncName{,orExternalSymbol} to getValueName{,orExternalSymbol} (PR #68240)
via llvm-commits
- [llvm] [DebugInfo] Separate error generation from reporting in DWARFHeaderUnit::extract (PR #68242)
via llvm-commits
- [llvm] [InstCombine] Fold zext(icmp (A, xxx)) == shr(A, BW - 1) => not(trunc(xor(zext(icmp), shl))) (PR #68244)
via llvm-commits
- [llvm] [InstCombine] Fold zext(icmp (A, xxx)) == shr(A, BW - 1) => not(trunc(xor(zext(icmp), shl))) (PR #68244)
via llvm-commits
- [llvm] 1c2634e - [NFC]Rename InstrProf::getFuncName{,orExternalSymbol} to getFuncOrValName{,IfDefined} (#68240)
via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
via llvm-commits
- [llvm] d688816 - [LangRef] Specify NaN behavior more precisely (#66579)
via llvm-commits
- [llvm] [RISCV][ISel] Fix comment to match direction of predicate in code. NFC. (PR #68248)
via llvm-commits
- [llvm] 92da28a - [RISCV][ISel] Fix comment to match direction of predicate in code. NFC. (#68248)
via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
via llvm-commits
- [llvm] [InstCombine] Fold zext(icmp (A, xxx)) == shr(A, BW - 1) => not(trunc(xor(zext(icmp), shl))) (PR #68244)
via llvm-commits
- [llvm] [InstCombine] Fold zext(icmp (A, xxx)) == shr(A, BW - 1) => not(trunc(xor(zext(icmp), shl))) (PR #68244)
via llvm-commits
- [llvm] [InstCombine] Fold zext(icmp (A, xxx)) == shr(A, BW - 1) => not(trunc(xor(zext(icmp), shl))) (PR #68244)
via llvm-commits
- [llvm] [InstCombine] Fold zext(icmp (A, xxx)) == shr(A, BW - 1) => not(trunc(xor(zext(icmp), shl))) (PR #68244)
via llvm-commits
- [llvm] [InstCombine] Fold zext(icmp (A, xxx)) == shr(A, BW - 1) => not(trunc(xor(zext(icmp), shl))) (PR #68244)
via llvm-commits
- [llvm] [InstCombine] Fold zext(icmp (A, xxx)) == shr(A, BW - 1) => not(trunc(xor(zext(icmp), shl))) (PR #68244)
via llvm-commits
- [llvm] [InstCombine] Fold zext(icmp (A, xxx)) == shr(A, BW - 1) => not(trunc(xor(zext(icmp), shl))) (PR #68244)
via llvm-commits
- [llvm] [InstCombine] Fold zext(icmp (A, xxx)) == shr(A, BW - 1) => not(trunc(xor(zext(icmp), shl))) (PR #68244)
via llvm-commits
- [llvm] [InstCombine] Fold zext(icmp (A, xxx)) == shr(A, BW - 1) => not(trunc(xor(zext(icmp), shl))) (PR #68244)
via llvm-commits
- [llvm] [InstCombine] Fold zext(icmp (A, xxx)) == shr(A, BW - 1) => not(trunc(xor(zext(icmp), shl))) (PR #68244)
via llvm-commits
- [llvm] [InstCombine] Fold zext(icmp (A, xxx)) == shr(A, BW - 1) => not(trunc(xor(zext(icmp), shl))) (PR #68244)
via llvm-commits
- [llvm] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)
via llvm-commits
- [llvm] [LoopUnroll] Clamp PartialThreshold for large LoopMicroOpBufferSize (PR #67657)
via llvm-commits
- [llvm] [InstCombine] Fold zext(icmp (A, xxx)) == shr(A, BW - 1) => not(trunc(xor(zext(icmp), shl))) (PR #68244)
via llvm-commits
- [llvm] [InstCombine] Fold zext(icmp (A, xxx)) == shr(A, BW - 1) => not(trunc(xor(zext(icmp), shl))) (PR #68244)
via llvm-commits
- [llvm] [InstCombine] Fold zext(icmp (A, xxx)) == shr(A, BW - 1) => not(trunc(xor(zext(icmp), shl))) (PR #68244)
via llvm-commits
- [llvm] [JITLink][RISCV] Implement eh_frame handling (PR #68253)
via llvm-commits
- [llvm] [InstCombine] Fold zext(icmp (A, xxx)) == shr(A, BW - 1) => not(trunc(xor(zext(icmp), shl))) (PR #68244)
via llvm-commits
- [llvm] [RISCV][GlobalISel] Select G_FRAME_INDEX (PR #68254)
via llvm-commits
- [llvm] 982639f - [RISCV] Relax vslide*_vl patterns to allow any mask. NFC (#68203)
via llvm-commits
- [llvm] da9f908 - [RISCV][GlobalISel] Legalize G_FRAME_INDEX (#67746)
via llvm-commits
- [llvm] 3b0b84f - [RISCV] Fix illegal build_vector when lowering double id buildvec on RV32 (#67017)
via llvm-commits
- [llvm] [AArch64][SME] Add remarks to flag lazy ZA saves, and SMSTART/SMSTOP transitions (PR #68255)
via llvm-commits
- [llvm] [InstCombine] Fold zext(icmp (A, xxx)) == shr(A, BW - 1) => not(trunc(xor(zext(icmp), shl))) (PR #68244)
via llvm-commits
- [llvm] [InstCombine] Fold zext(icmp (A, xxx)) == shr(A, BW - 1) => not(trunc(xor(zext(icmp), shl))) (PR #68244)
via llvm-commits
- [llvm] [OpenMPIRBuilder] Remove wrapper function in `createTask`, `createTeams` (PR #67723)
via llvm-commits
- [compiler-rt] [OpenMPIRBuilder] Remove wrapper function in `createTask`, `createTeams` (PR #67723)
via llvm-commits
- [llvm] [OpenMPIRBuilder] Remove wrapper function in `createTask`, `createTeams` (PR #67723)
via llvm-commits
- [llvm] [LLVM][DWARF] Create thread safe context for DWP DWARFContext (PR #68262)
via llvm-commits
- [llvm] [ValueTracking] Try to infer range of select from true and false values. (PR #68256)
via llvm-commits
- [llvm] [mlgo][coro] Fix Issue #62616 (PR #68263)
via llvm-commits
- [llvm] [ValueTracking] Try to infer range of select from true and false values. (PR #68256)
via llvm-commits
- [llvm] Use BlockFrequency type in more places (NFC) (PR #68266)
via llvm-commits
- [llvm] AMDGPU/GlobalISel: Handle mubuf load/store for more types (PR #68268)
via llvm-commits
- [llvm] Use BlockFrequency type in more places (NFC) (PR #68266)
via llvm-commits
- [llvm] [RISCV][GlobalISel] Lower calls to variadic functions (PR #68271)
via llvm-commits
- [llvm] MachineBlockPlacement: Avoid overflow problems in scaleThreshold() (PR #68272)
via llvm-commits
- [compiler-rt] [scudo] Fix the use of ASSERT_CAPABILITY in TSD (PR #68273)
via llvm-commits
- [compiler-rt] [scudo] Fix the use of ASSERT_CAPABILITY in TSD (PR #68273)
via llvm-commits
- [compiler-rt] [scudo] Add missing thread-safety analysis annotations. (PR #68072)
via llvm-commits
- [compiler-rt] [scudo] Fix the use of ASSERT_CAPABILITY in TSD (PR #68273)
via llvm-commits
- [compiler-rt] [scudo] Fix the use of ASSERT_CAPABILITY in TSD (PR #68273)
via llvm-commits
- [compiler-rt] [scudo] Fix the use of ASSERT_CAPABILITY in TSD (PR #68273)
via llvm-commits
- [llvm] [CodeLayout] Faster basic block reordering, ext-tsp (PR #68275)
via llvm-commits
- [llvm] [CodeLayout] Faster basic block reordering, ext-tsp (PR #68275)
via llvm-commits
- [llvm] [CodeLayout] Faster basic block reordering, ext-tsp (PR #68275)
via llvm-commits
- [llvm] [CodeLayout] Faster basic block reordering, ext-tsp (PR #68275)
via llvm-commits
- [llvm] [ValueTracking] Try to infer range of select from true and false values. (PR #68256)
via llvm-commits
- [llvm] [ValueTracking] Try to infer range of select from true and false values. (PR #68256)
via llvm-commits
- [llvm] [clang] Replace uses of CreatePointerBitCastOrAddrSpaceCast (NFC) (PR #68277)
via llvm-commits
- [llvm] [clang] Replace uses of CreatePointerBitCastOrAddrSpaceCast (NFC) (PR #68277)
via llvm-commits
- [llvm] [ValueTracking] Try to infer range of select from true and false values. (PR #68256)
via llvm-commits
- [llvm] [OpenMP][OpenMPIRBuilder][NFC] Move copyInput to a passed in lambda function (PR #68124)
via llvm-commits
- [llvm] [OpenMP][OpenMPIRBuilder] Move copyInput to a passed in lambda function and re-order kernel argument load/stores (PR #68124)
via llvm-commits
- [llvm] [OpenMP][OpenMPIRBuilder] Move copyInput to a passed in lambda function and re-order kernel argument load/stores (PR #68124)
via llvm-commits
- [llvm] f37028c - [Support] Rename HashBuilderImpl to HashBuilder (NFC) (#68173)
via llvm-commits
- [llvm] bbdbcd8 - [Support] Rename llvm::support::endianness to llvm::endianness (#68174)
via llvm-commits
- [llvm] [Support] Deprecate system_endianness (PR #68279)
via llvm-commits
- [llvm] [Support, ADT] Move llvm::endianness to bit.h (PR #68280)
via llvm-commits
- [llvm] 1b3fc40 - [mlgo][coro] Assign coro split-ed functions a `FunctionLevel` (#68263)
via llvm-commits
- [llvm] [JITLink] Some cleanups to EHFrameSupport (PR #66707)
via llvm-commits
- [llvm] [JITLink] Allow multiple relocations at same offset in EHFrameEdgeFixer (PR #68252)
via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
via llvm-commits
- [llvm] 5c4d35d - [SystemZ][z/OS] Update lowerCall (#68259)
via llvm-commits
- [llvm] [HIP] Support compressing device binary (PR #67162)
via llvm-commits
- [llvm] [Documentation] Fix some invalid references in sphinx documentation (PR #68239)
via llvm-commits
- [llvm] [Aarch64] Materialize immediates with 64-bit ORR + EOR if shorter (PR #68287)
via llvm-commits
- [llvm] [RISCV] Be more aggressive about shrinking constant build_vector etype (PR #67175)
via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
via llvm-commits
- [llvm] [ValueTracking] Use SimplifyQuery in some public APIs (NFC) (PR #68290)
via llvm-commits
- [compiler-rt] 7c5e4e5 - Reapply [compiler-rt] Check for and use -lunwind when linking with -nodefaultlibs (#66584)
via llvm-commits
- [llvm] [RISCV] Avoid using x7/t2 for indirect branches which need landing pad. (PR #68292)
via llvm-commits
- [llvm] Inline operator== and operator!= (PR #67958)
via llvm-commits
- [llvm] d3e4702 - [AArch64] [LoopVectorize] Use either fixed-width or scalable VF when tail-folding (#67543)
via llvm-commits
- [llvm] [AArch64][LoopVectorize] Use either fixed-width or scalable VF when tail-folding (PR #67543)
via llvm-commits
- [llvm] [AMDGPU] Detect renamable kills when trying to form V_CMPX instructions. (PR #68293)
via llvm-commits
- [llvm] c64a098 - [GVN] Fix after https://github.com/llvm/llvm-project/commit/46aac949bcfef83d03bffd849955c84c6a8e7c31
via llvm-commits
- [llvm] [LowerSwitch] Implement verifyAnalysis (PR #68294)
via llvm-commits
- [llvm] Inline operator== and operator!= (PR #67958)
via llvm-commits
- [llvm] [RISCV] Support Xsfvqmaccdod and Xsfvqmaccqoq extensions (PR #68295)
via llvm-commits
- [llvm] [RISCV] Support Xsfvfwmaccqqq extensions (PR #68296)
via llvm-commits
- [llvm] [RISCV] Support Xsfvfnrclipxfqf extensions (PR #68297)
via llvm-commits
- [llvm] [RISCV] Support Xsfvqmaccdod and Xsfvqmaccqoq extensions (PR #68295)
via llvm-commits
- [llvm] [RISCV] Support Xsfvfwmaccqqq extensions (PR #68296)
via llvm-commits
- [llvm] [RISCV] Support Xsfvfnrclipxfqf extensions (PR #68297)
via llvm-commits
- [llvm] [AArch64][LoopVectorize] Use upper bound trip count instead of the constant TC when choosing max VF (PR #67697)
via llvm-commits
- [llvm] [MLIR][Presburger] Fix reduce bug in Fraction class and add tests (PR #68298)
via llvm-commits
- [llvm] f04aa1f - [AMDGPU][CodeGen] Fold immediates in src1 operands of V_MAD/MAC/FMA/FMAC. (#68002)
via llvm-commits
- [llvm] [AMDGPU] Use correct operand order for shifts (PR #68299)
via llvm-commits
- [llvm] [AMDGPU] Use correct operand order for shifts (PR #68299)
via llvm-commits
- [llvm] [AMDGPU] Detect kills in register sets when trying to form V_CMPX instructions. (PR #68293)
via llvm-commits
- [llvm] [AMDGPU][CodeGen] Update support (soffset + offset) s_buffer_load's (PR #68302)
via llvm-commits
- [llvm] 2fab15d - Inline operator== and operator!= (#67958)
via llvm-commits
- [llvm] 2ca30eb - AMDGPU/GlobalISel: Handle mubuf load/store for more types (#68268)
via llvm-commits
- [llvm] 6989c48 - [Documentation] Fix some invalid references in sphinx documentation (#68239)
via llvm-commits
- [llvm] [Documentation] Fix some invalid references in sphinx documentation (PR #68239)
via llvm-commits
- [llvm] [InstCombine] Extend Phi-Icmp use to include or (PR #67682)
via llvm-commits
- [llvm] [InstCombine] Extend Phi-Icmp use to include or (PR #67682)
via llvm-commits
- [llvm] [llvm-rc] add support for MENUEX (PR #67464)
via llvm-commits
- [llvm] [llvm-rc] add support for MENUEX (PR #67464)
via llvm-commits
- [llvm] [llvm-rc] add support for MENUEX (PR #67464)
via llvm-commits
- [llvm] [llvm-rc] add support for MENUEX (PR #67464)
via llvm-commits
- [llvm] [SimplifyCFG] Find the minimal table considering overflow in `switchToLookupTable` (PR #67885)
via llvm-commits
- [llvm] [SimplifyCFG] Find the minimal table considering overflow in `switchToLookupTable` (PR #67885)
via llvm-commits
- [llvm] [SimplifyCFG] Find the minimal table considering overflow in `switchToLookupTable` (PR #67885)
via llvm-commits
- [llvm] [SimplifyCFG] Find the minimal table considering overflow in `switchToLookupTable` (PR #67885)
via llvm-commits
- [llvm] [MLIR][Presburger] Fix reduce bug in Fraction class and add tests (PR #68298)
via llvm-commits
- [llvm] [ConstantRange] Handle `Intrinsic::ctpop` (PR #68310)
via llvm-commits
- [llvm] 81ee059 - [llvm] Replace uses of Type::getPointerTo (NFC)
via llvm-commits
- [llvm] fc865c2 - [RISCV][CostModel] VPIntrinsics have same cost as their non-vp counterparts (#67178)
via llvm-commits
- [llvm] [MachineInstr] add insert method for variadic instructions (PR #67699)
via llvm-commits
- [llvm] [AMDGPU][CodeGen] Update support (soffset + offset) s_buffer_load's (PR #68302)
via llvm-commits
- [llvm] [SCEV] Make invalidation in SCEVCallbackVH more thorough (PR #68316)
via llvm-commits
- [llvm] [AMDGPU][CodeGen] Update support (soffset + offset) s_buffer_load's (PR #68302)
via llvm-commits
- [llvm] [GVN] Drop Clobber dependency if store may overwrite only the same value (PR #68322)
via llvm-commits
- [llvm] 9f87522 - [DX] Add support for program signatures (#67346)
via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
via llvm-commits
- [llvm] [GISel] Add LookThroughInstrs for getIConstantVRegVal and getIConstan… (PR #68327)
via llvm-commits
- [llvm] [GISel] Add LookThroughInstrs for getIConstantVRegVal and getIConstan… (PR #68327)
via llvm-commits
- [llvm] d36d8d6 - [TableGen][GISel] Fix incorrect binding of predicate operands upon `PredicateUsesOperands = 1` (#68125)
via llvm-commits
- [llvm] [GISel] Add LookThroughInstrs for getIConstantVRegVal and getIConstan… (PR #68327)
via llvm-commits
- [llvm] f71781c - Tli nfc fix mechanism propagating mangled names for tli function mappings ac3 (#67308)
via llvm-commits
- [llvm] [llvm-lib] [Object] Use ECSYMBOLS section for ARM64EC importlib symbols. (PR #68328)
via llvm-commits
- [llvm] Tli nfc fix mechanism propagating mangled names for tli function mappings ac3 (PR #67308)
via llvm-commits
- [llvm] [GISel] Add LookThroughInstrs for getIConstantVRegVal and getIConstan… (PR #68327)
via llvm-commits
- [llvm] [GISel] Add LookThroughInstrs for getIConstantVRegVal and getIConstan… (PR #68327)
via llvm-commits
- [llvm] b9383a8 - [JITLink] Some cleanups to EHFrameSupport (#66707)
via llvm-commits
- [llvm] AMDGPU: Fix temporal divergence introduced by machine-sink and performance regression introduced by D155343 (PR #67456)
via llvm-commits
- [llvm] 6b31b02 - [Support] Deprecate system_endianness (#68279)
via llvm-commits
- [llvm] bd7ca98 - Ensure NoTrapAfterNoreturn is false for the wasm backend (#65876)
via llvm-commits
- [llvm] AMDGPU: Fix temporal divergence introduced by machine-sink and performance regression introduced by D155343 (PR #67456)
via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
via llvm-commits
- [llvm] goldsteinn/cmp excludes zero vecs (PR #68331)
via llvm-commits
- [llvm] [ValueTracking] Add support for non-splat vecs in cmpExcludesZero (PR #68331)
via llvm-commits
- [llvm] [ValueTracking] Add support for non-splat vecs in cmpExcludesZero (PR #68331)
via llvm-commits
- [llvm] [mlir][python] generate value builders (PR #68308)
via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
via llvm-commits
- [llvm] Fix non-determinism in debuginfo (PR #68332)
via llvm-commits
- [llvm] [ValueTracking] Add support for non-splat vecs in cmpExcludesZero (PR #68331)
via llvm-commits
- [llvm] [SLP]Improve isGatherShuffledEntry by trying per-register shuffle. (PR #66542)
via llvm-commits
- [llvm] [InstCombine] Canonicalize `(X +/- Y) & Y` into `~X & Y` when Y is a power of 2 (PR #67915)
via llvm-commits
- [llvm] [InstCombine] Simplify the pattern `a ne/eq (zext/sext (a ne/eq c))` (PR #65852)
via llvm-commits
- [llvm] 23e7da8 - [PowerPC] Add the SCV instruction. (#68063)
via llvm-commits
- [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)
via llvm-commits
- [llvm] 4a2a6a4 - [ValueTracking] Try to infer range of select from true and false values. (#68256)
via llvm-commits
- [llvm] [SPIR-V] Remove calls to deprecated PointerType methods (1/2) (PR #68336)
via llvm-commits
- [llvm] Refactor try demangle for vfabi to use only the vector abi mangled names (PR #67430)
via llvm-commits
- [llvm] [JITLink] Some cleanups to EHFrameSupport (PR #66707)
via llvm-commits
- [llvm] [JITLink] Some cleanups to EHFrameSupport (PR #66707)
via llvm-commits
- [llvm] Refactor try demangle for vfabi to use only the vector abi mangled names (PR #67430)
via llvm-commits
- [llvm] [LLVM][DWARF] Add support for monolithic types in .debug_names (PR #68131)
via llvm-commits
- [llvm] 9bbd2bf - [LLVM][DWARF] Add support for monolithic types in .debug_names (#68131)
via llvm-commits
- [compiler-rt] [OpenMPIRBuilder] Remove wrapper function in `createTask`, `createTeams` (PR #67723)
via llvm-commits
- [lld] [OpenMPIRBuilder] Remove wrapper function in `createTask`, `createTeams` (PR #67723)
via llvm-commits
- [llvm] [mlir][python] generate value builders (PR #68308)
via llvm-commits
- [compiler-rt] [scudo] Fix the use of ASSERT_CAPABILITY in TSD (PR #68273)
via llvm-commits
- [compiler-rt] [scudo] Fix the use of ASSERT_CAPABILITY in TSD (PR #68273)
via llvm-commits
- [compiler-rt] [scudo] Fix the use of ASSERT_CAPABILITY in TSD (PR #68273)
via llvm-commits
- [compiler-rt] ea2036e - [scudo] Fix the use of ASSERT_CAPABILITY in TSD (#68273)
via llvm-commits
- [compiler-rt] [scudo] Fix the use of ASSERT_CAPABILITY in TSD (PR #68273)
via llvm-commits
- [llvm] 5181156 - Use BlockFrequency type in more places (NFC) (#68266)
via llvm-commits
- [compiler-rt] [OpenMPIRBuilder] Remove wrapper function in `createTask`, `createTeams` (PR #67723)
via llvm-commits
- [lld] [OpenMPIRBuilder] Remove wrapper function in `createTask`, `createTeams` (PR #67723)
via llvm-commits
- [llvm] [OpenMPIRBuilder] Remove wrapper function in `createTask`, `createTeams` (PR #67723)
via llvm-commits
- [compiler-rt] [compiler-rt] Allow Fuchsia to use 64-bit allocator for RISCV (PR #68343)
via llvm-commits
- [compiler-rt] [compiler-rt] Allow Fuchsia to use 64-bit allocator for RISCV (PR #68343)
via llvm-commits
- [llvm] [llvm-gsymutil] Print a DWO file missing warning under --quiet flag (PR #68062)
via llvm-commits
- [llvm] [libcxx] Allow string to use SSO in constant evaluation. (PR #66576)
via llvm-commits
- [llvm] 7a46baa - ValueTracking: Use fcAllFlags for unknown value (#66393)
via llvm-commits
- [llvm] [NVPTX] Improve lowering of v4i8 (PR #67866)
via llvm-commits
- [llvm] [LLVM][DWARF] Change to consistently print out abbrev code. (PR #68353)
via llvm-commits
- [llvm] [llvm-rc] add support for MENUEX (PR #67464)
via llvm-commits
- [llvm] Add cmake c,cxx,asm,linker flags (PR #68358)
via llvm-commits
- [llvm] 5e15997 - MachineFunctionPass: Clear properties before running function (#67962)
via llvm-commits
- [llvm] [bolt] Add cmake c,cxx,asm,linker flags (PR #68358)
via llvm-commits
- [llvm] [bolt] Add cmake c,cxx,asm,linker flags (PR #68358)
via llvm-commits
- [llvm] [AMDGPU] Save/Restore SCC bit across waterfall loop. (PR #68363)
via llvm-commits
- [compiler-rt] [OpenMPIRBuilder] Add ThreadLimit and NumTeamsUpper clauses to teams clause (PR #68364)
via llvm-commits
- [lld] [OpenMPIRBuilder] Add ThreadLimit and NumTeamsUpper clauses to teams clause (PR #68364)
via llvm-commits
- [llvm] [OpenMPIRBuilder] Add ThreadLimit and NumTeamsUpper clauses to teams clause (PR #68364)
via llvm-commits
- [compiler-rt] [OpenMPIRBuilder] Add ThreadLimit and NumTeamsUpper clauses to teams clause (PR #68364)
via llvm-commits
- [lld] [OpenMPIRBuilder] Add ThreadLimit and NumTeamsUpper clauses to teams clause (PR #68364)
via llvm-commits
- [llvm] [OpenMPIRBuilder] Add ThreadLimit and NumTeamsUpper clauses to teams clause (PR #68364)
via llvm-commits
- [compiler-rt] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
via llvm-commits
- [compiler-rt] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
via llvm-commits
- [llvm] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
via llvm-commits
- [llvm] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)
via llvm-commits
- [llvm] [AMDGPU] Save and restore SCC using only 32-bit SGPR. (PR #68367)
via llvm-commits
- [llvm] 86d1f4c - [Support, ADT] Move llvm::endianness to bit.h (#68280)
via llvm-commits
- [llvm] goldsteinn/bugfix pr67287 (PR #68369)
via llvm-commits
- [llvm] goldsteinn/bugfix pr67287 (PR #68369)
via llvm-commits
- [llvm] [InstCombine] Retain exact instruction name for some cases in SimplifyDemandedUseBits. (PR #68371)
via llvm-commits
- [llvm] 2e26d09 - BlockFrequencyInfo: Add PrintBlockFreq helper (#67512)
via llvm-commits
- [llvm] [llvm][Support] fix convertToSnakeFromCamelCase (PR #68375)
via llvm-commits
- [llvm] [ValueTracking] Add support for non-splat vecs in cmpExcludesZero (PR #68331)
via llvm-commits
- [llvm] [ValueTracking] Add support for non-splat vecs in cmpExcludesZero (PR #68331)
via llvm-commits
- [llvm] 356139b - [LLD][COFF] Add support for `--time-trace` (#68236)
via llvm-commits
- [llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #68380)
via llvm-commits
- [llvm] [LVI][CVP] `getRangeFor` propagates `MayIncludeUndef` (PR #68190)
via llvm-commits
- [llvm] [Documentation] Fix some invalid references in sphinx documentation (PR #68239)
via llvm-commits
- [llvm] [AMDGPU] Use correct operand order for shifts (PR #68299)
via llvm-commits
- [llvm] [LVI][CVP] `getRangeFor` propagates `MayIncludeUndef` (PR #68190)
via llvm-commits
- [llvm] [LVI][CVP] propagates `undef` to range and `abs` (PR #68190)
via llvm-commits
- [llvm] be382de - [AMDGPU] Use correct operand order for shifts (#68299)
via llvm-commits
- [llvm] [AMDGPU] Use correct operand order for shifts (PR #68299)
via llvm-commits
- [llvm] 8b356f4 - [llvm-rc] add support for MENUEX (#67464)
via llvm-commits
- [llvm] [SimplifyCFG] Find the minimal table considering overflow in `switchToLookupTable` (PR #67885)
via llvm-commits
- [compiler-rt] fad0919 - [NFC][compiler-rt] Fix typo in FuzzedDataProvider.h doc
via llvm-commits
- [compiler-rt] [compiler-rt] Fix typo in FuzzedDataProvider.h (PR #68083)
via llvm-commits
- [llvm] [LVI][CVP] propagates `undef` to range and `abs` (PR #68190)
via llvm-commits
- [llvm] [LVI][CVP] propagates `undef` to range and `abs` (PR #68190)
via llvm-commits
- [llvm] 5d8fb47 - [InstCombine] Fold comparison of adding two z/sext booleans (#67895)
via llvm-commits
- [llvm] [AArch64][GlobalISel] Add legalization for G_VECREDUCE_MUL (PR #68398)
via llvm-commits
- [llvm] [AArch64][LoopVectorize] Use upper bound trip count instead of the constant TC when choosing max VF (PR #67697)
via llvm-commits
- [llvm] [AArch64][LoopVectorize] Use upper bound trip count instead of the constant TC when choosing max VF (PR #67697)
via llvm-commits
- [llvm] [AArch64][GlobalISel] Add legalization for G_VECREDUCE_MUL (PR #68398)
via llvm-commits
- [llvm] [AArch64][GlobalISel] Add legalization for G_VECREDUCE_MUL (PR #68398)
via llvm-commits
- [llvm] AMDGPU: Fix temporal divergence introduced by machine-sink and performance regression introduced by D155343 (PR #67456)
via llvm-commits
- [llvm] [AMDGPU][GlobalIsel] Introduce isRegType to check for legal types, instead of checking bit width. (PR #68189)
via llvm-commits
- [llvm] [AMDGPU][GlobalIsel] Introduce isRegType to check for legal types, instead of checking bit width. (PR #68189)
via llvm-commits
- [llvm] [AMDGPU][GlobalIsel] Introduce isRegType to check for legal types, instead of checking bit width. (PR #68189)
via llvm-commits
- [llvm] [X86] Add missed type extension and truncation during combine (PR #67168)
via llvm-commits
- [llvm] [AMDGPU][GlobalIsel] Introduce isRegType to check for legal types, instead of checking bit width. (PR #68189)
via llvm-commits
- [lld] 488a62f - [lld][ELF][AVR] Add range check for R_AVR_13_PCREL (#67636)
via llvm-commits
- [llvm] [MLIR][Presburger] Fix reduce bug in Fraction class and add tests (PR #68298)
via llvm-commits
- [llvm] [MLIR][Presburger] Fix reduce bug in Fraction class and add tests (PR #68298)
via llvm-commits
- [llvm] [AArch64][SME] Tile slices to lazy-save/restore should be RDSVL. (PR #68403)
via llvm-commits
- [llvm] [AMDGPU][GlobalIsel] Introduce isRegType to check for legal types, instead of checking bit width. (PR #68189)
via llvm-commits
- [llvm] [AMDGPU][GlobalIsel] Introduce isRegType to check for legal types, instead of checking bit width. (PR #68189)
via llvm-commits
- [llvm] [DWARFLinker] Release input DWARF after object has been linked (PR #68376)
via llvm-commits
- [llvm] [AMDGPU][CodeGen] Update support (soffset + offset) s_buffer_load's (PR #68302)
via llvm-commits
- [llvm] ff48816 - [AArch64][SME] Tile slices to lazy-save/restore should be RDSVL. (#68403)
via llvm-commits
- [llvm] Refactor try demangle for vfabi to use only the vector abi mangled names (PR #67430)
via llvm-commits
- [llvm] Refactor try demangle for vfabi to use only the vector abi mangled names (PR #67430)
via llvm-commits
- [llvm] [AArch64][SME] Zero reserved bytes when allocating a new TPIDR2 object (PR #68411)
via llvm-commits
- [llvm] [AArch64][SME] Zero reserved bytes when allocating a new TPIDR2 object (PR #68411)
via llvm-commits
- [llvm] [InstCombine] Fold zext(icmp (A, xxx)) == shr(A, BW - 1) => not(trunc(xor(zext(icmp), shl))) (PR #68244)
via llvm-commits
- [llvm] [InstCombine] Fold zext(icmp (A, xxx)) == shr(A, BW - 1) => not(trunc(xor(zext(icmp), shl))) (PR #68244)
via llvm-commits
- [llvm] [AArch64][LoopVectorize] Use upper bound trip count instead of the constant TC when choosing max VF (PR #67697)
via llvm-commits
- [llvm] b3b3336 - [InstCombine] Simplify the pattern `a ne/eq (zext/sext (a ne/eq c))` (#65852)
via llvm-commits
- [llvm] [AArch64][SME] Allow inlining when streaming-mode attributes dont match up. (PR #68415)
via llvm-commits
- [llvm] [AMDGPU][CodeGen] Update support (soffset + offset) s_buffer_load's (PR #68302)
via llvm-commits
- [llvm] [AArch64][SME] Extend Inliner cost-model with custom penalty for calls. (PR #68416)
via llvm-commits
- [llvm] [AArch64][SME] Allow inlining when streaming-mode attributes dont match up. (PR #68415)
via llvm-commits
- [llvm] AMDGPU: Fix temporal divergence introduced by machine-sink and performance regression introduced by D155343 (PR #67456)
via llvm-commits
- [llvm] AMDGPU: Fix temporal divergence introduced by machine-sink and performance regression introduced by D155343 (PR #67456)
via llvm-commits
- [llvm] [AArch64][SME] Extend Inliner cost-model with custom penalty for calls. (PR #68416)
via llvm-commits
- [llvm] 0a2aaab - [SPIRV] Implement log10 for logical SPIR-V (#66921)
via llvm-commits
- [llvm] [AMDGPU][GlobalIsel] Introduce isRegType to check for legal types, instead of checking bit width. (PR #68189)
via llvm-commits
- [llvm] [OpenMP][OpenMPIRBuilder] Move copyInput to a passed in lambda function and re-order kernel argument load/stores (PR #68124)
via llvm-commits
- [llvm] Fix typo "x84_64" (PR #68419)
via llvm-commits
- [llvm] 529ad40 - [PowerPC] Fix missing kill flag update for XVCVDPSP transformations (#67997)
via llvm-commits
- [llvm] [PowerPC] Fix missing kill flag update for XVCVDPSP transformations (PR #67997)
via llvm-commits
- [llvm] 2a1f1b5 - [OpenMP][OpenMPIRBuilder] Move copyInput to a passed in lambda function and re-order kernel argument load/stores (#68124)
via llvm-commits
- [llvm] [OpenMP][OpenMPIRBuilder] Move copyInput to a passed in lambda function and re-order kernel argument load/stores (PR #68124)
via llvm-commits
- [lld] Changing TimeProfiler.cpp clock from microseconds to nanoseconds (PR #68096)
via llvm-commits
- [llvm] 29a1567 - [DWARFLinker] Release input DWARF after object has been linked (#68376)
via llvm-commits
- [llvm] [AArch64][LoopVectorize] Use upper bound trip count instead of the constant TC when choosing max VF (PR #67697)
via llvm-commits
- [llvm] 07f7f1c - Fix typo "x84_64" (#68419)
via llvm-commits
- [llvm] f1b2dd2 - [AArch64][BTI] Prevent Machine Scheduler from moving branch targets (#68313)
via llvm-commits
- [llvm] [AArch64][GlobalISel] Add legalization for G_VECREDUCE_MUL (PR #68398)
via llvm-commits
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via llvm-commits
- [llvm] [AArch64] Fix for misched-branch-targets.mir test (PR #68424)
via llvm-commits
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via llvm-commits
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- [llvm] 2c0b6f2 - [AArch64][SME] Add remarks to flag lazy ZA saves, and SMSTART/SMSTOP transitions (#68255)
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- [llvm] 092ef55 - [AArch64] Fix for misched-branch-targets.mir test
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- [llvm] 98b114d - [InstCombine] Retain exact instruction name for some cases in SimplifyDemandedUseBits. (#68371)
via llvm-commits
- [llvm] [X86][ISel] Improve logic for optimizing `movmsk(bitcast(shuffle(x)))` (PR #68369)
via llvm-commits
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via llvm-commits
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- [llvm] [llvm][Support] fix convertToSnakeFromCamelCase (PR #68375)
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- [llvm] [X86][ISel] Improve logic for optimizing `movmsk(bitcast(shuffle(x)))` (PR #68369)
via llvm-commits
- [llvm] [X86][ISel] Improve logic for optimizing `movmsk(bitcast(shuffle(x)))` (PR #68369)
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- [llvm] [ValueTracking] Add support for non-splat vecs in cmpExcludesZero (PR #68331)
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- [llvm] [AArch64][SME] Fix generating incorrect TBZ when lowering lazy save. (PR #68429)
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- [llvm] [ValueTracking] Add support for non-splat vecs in cmpExcludesZero (PR #68331)
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- [llvm] [ValueTracking] Add support for non-splat vecs in cmpExcludesZero (PR #68331)
via llvm-commits
- [llvm] 8624075 - [RISCV] Strip W suffix from ADDIW (#68425)
via llvm-commits
- [llvm] [ValueTracking] Analyze `Select` in `isKnownNonEqual`. (PR #68427)
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- [llvm] 70368ea - [RISCV] Support VLS for VCIX (#67289)
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- [llvm] 7f9a50f - [RISCV][GISel] Select G_SELECT (#67614)
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- [llvm] [RISCV] Be more aggressive about forming floating point constants (PR #68433)
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- [llvm] [RISCV] Be more aggressive about forming floating point constants (PR #68433)
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- [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)
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- [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)
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- [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)
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- [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)
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- [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)
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- [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)
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- [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)
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- [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)
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- [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)
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- [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)
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- [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)
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- [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)
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- [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)
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- [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)
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- [llvm] [X86][ISel] Improve logic for optimizing `movmsk(bitcast(shuffle(x)))` (PR #68369)
via llvm-commits
- [llvm] [llvm][metadata][NFC] Minimize local variable scopes (PR #68438)
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- [compiler-rt] a4d51e5 - [compiler-rt] Allow Fuchsia to use 64-bit allocator for RISCV (#68343)
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- [compiler-rt] [compiler-rt] Allow Fuchsia to use 64-bit allocator for RISCV (PR #68343)
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- [llvm] 0a7bf3a - [CodeLayout] Faster basic block reordering, ext-tsp (#68275)
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- [llvm] [CodeLayout] Faster basic block reordering, ext-tsp (PR #68275)
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- [llvm] [StatepointLowering] Take return attributes of `gc.result` into account (PR #68439)
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- [llvm] [JITLink] Allow multiple relocations at same offset in EHFrameEdgeFixer (PR #68252)
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- [llvm] 5b39d8d - Revert "[CodeLayout] Faster basic block reordering, ext-tsp (#68275)"
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- [llvm] [bolt] Add cmake c,cxx,asm,linker flags (PR #68358)
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- [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)
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- [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)
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- [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)
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- [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)
via llvm-commits
- [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)
via llvm-commits
- [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)
via llvm-commits
- [llvm] [CodeLayout] Faster basic block reordering, ext-tsp (PR #68275)
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- [llvm] [bolt] Add cmake c,cxx,asm,linker flags (PR #68358)
via llvm-commits
- [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)
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- [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)
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- [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)
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- [compiler-rt] [scudo] Improve the message of region exhausted (PR #68444)
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- [llvm] goldsteinn/constant range and shl (PR #68446)
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- [llvm] [ValueTracking] Improve constant range computation for `shl` and `and`. (PR #68446)
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- [llvm] [llvm][Support] fix convertToSnakeFromCamelCase (PR #68375)
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- [llvm] [llvm][Support] fix convertToSnakeFromCamelCase (PR #68375)
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- [llvm] [llvm][Support] fix convertToSnakeFromCamelCase (PR #68375)
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- [llvm] [llvm][Support] fix convertToSnakeFromCamelCase (PR #68375)
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- [llvm] [llvm][Support] fix convertToSnakeFromCamelCase (PR #68375)
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- [compiler-rt] [scudo] Improve the message of region exhausted (PR #68444)
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- [llvm] f045f2c - [AArch64][SME] Fix generating incorrect TBZ when lowering lazy save. (#68429)
via llvm-commits
- [llvm] [ValueTracking] Improve constant range computation for `shl` and `and`. (PR #68446)
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- [compiler-rt] [scudo] Improve the message of region exhausted (PR #68444)
via llvm-commits
- [compiler-rt] [scudo] Improve the message of region exhaustion (PR #68444)
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- [llvm] [ValueTracking] Improve constant range computation for `shl` and `and`. (PR #68446)
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- [compiler-rt] cd0a824 - add support for riscv64
via llvm-commits
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- [llvm] [Support] Add VirtualOutputBackends to virtualize the output from tools (PR #68447)
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- [llvm] [InstCombine] Fold zext(icmp (A, xxx)) == shr(A, BW - 1) => not(trunc(xor(zext(icmp), shl))) (PR #68244)
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- [llvm] [CAS] LLVMCAS implementation (PR #68448)
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- [llvm] [CAS] LLVMCAS implementation (PR #68448)
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- [llvm] [Support] Add VirtualOutputBackends to virtualize the output from tools (PR #68447)
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- [compiler-rt] Remove LLDB introspection entrypoints from the shim (PR #68450)
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- [llvm] [FunctionAttrs] Handle alias-preserving intrinsic calls correctly (PR #68453)
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- [compiler-rt] b53ff43 - [scudo] Improve the message of region exhaustion (#68444)
via llvm-commits
- [compiler-rt] [scudo] Improve the message of region exhaustion (PR #68444)
via llvm-commits
- [llvm] 767dcc5 - [llvm][Support] fix convertToSnakeFromCamelCase (#68375)
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- [llvm] 537344f - [clang][modules] Move `SLocEntry` search into `ASTReader` (#66966)
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- [llvm] [NFC][Coverage] Do not use recursion for GCOV propagateCounts. (PR #68455)
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- [llvm] 5619e1b - Fix non-determinism in debuginfo (#68332)
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- [llvm] [Interpreter] Add initialization of array members (PR #66172)
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- [llvm] [NFC][Coverage] Do not use recursion for GCOV propagateCounts. (PR #68455)
via llvm-commits
- [llvm] [InstCombine] Add combines/simplifications for `llvm.ptrmask` (PR #67166)
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- [llvm] [llvm][objdump] Remove support for printing the embedded Bitcode section in MachO files. (PR #68457)
via llvm-commits
- [llvm] 7850225 - [DWARF] Change to consistently print out abbrev code in .debug_names (#68353)
via llvm-commits
- [llvm] [AArch64][SME] Add missing SMStartStop regmasks (PR #68458)
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- [llvm] 6afceba - [AMDGPU][IGLP] SingleWaveOpt: Cache DSW Counters from PreRA (#67759)
via llvm-commits
- [llvm] [InlineCost] Enable the cost benefit analysis for Sample PGO (PR #66457)
via llvm-commits
- [llvm] [CMake]Fully delete the deprecated LLVM_USE_CRT* (PR #66850)
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- [llvm] [InstCombine] Fold zext(i1) == lshr(A, BW - 1) => i1 == A s< 0 (PR #68244)
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- [llvm] [InstCombine] Fold zext(i1) == lshr(A, BW - 1) => i1 == A s< 0 (PR #68244)
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- [llvm] [SVE][InstCombine] Delete redundante sel instructions with ptrue (PR #68463)
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- [llvm] [SVE][InstCombine] Delete redundante sel instructions with ptrue (PR #68463)
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- [llvm] [Bazel][Clang Tidy] Include builtin headers with clang-tidy (PR #67626)
via llvm-commits
- [llvm] [X86] Enable bfloat type support in inline assembly constraints (PR #68469)
via llvm-commits
- [llvm] [RISCV][GISel] Add isel patterns for ADDIW/SRLIW/SRAIW/SLLIW and remove custom selection. (PR #68470)
via llvm-commits
- [llvm] [ValueTracking] Improve constant range computation for `shl` and `and`. (PR #68446)
via llvm-commits
- [llvm] [RISCV][NFC] Add base classes of Operand and uimm/simm (PR #68472)
via llvm-commits
- [llvm] 807e745 - LangRef: add missing punctuation (#68471)
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- [llvm] [SimplifyCFG] Reland transform for redirecting phis between unmergeable BB and SuccBB (PR #68473)
via llvm-commits
- [llvm] [InstCombine] Refactor matchFunnelShift to allow more pattern (NFC) (PR #68474)
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- [llvm] [InstCombine] Refactor matchFunnelShift to allow more pattern (NFC) (PR #68474)
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- [llvm] [InstCombine] Refactor matchFunnelShift to allow more pattern (NFC) (PR #68474)
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- [llvm] [RS4GC] Copy argument attributes from call to statepoint (PR #68475)
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- [llvm] [SimplifyCFG] Reland transform for redirecting phis between unmergeable BB and SuccBB (PR #68473)
via llvm-commits
- [llvm] [CodeGenPrepare] Transform ldexp into target supported intrinsics (PR #67552)
via llvm-commits
- [llvm] [TargetLowering] Lower ldexp into target supported instructions (PR #67552)
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- [llvm] [TargetLowering] Lower ldexp into target supported instructions (PR #67552)
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- [llvm] [TargetLowering] Lower ldexp into target supported instructions (PR #67552)
via llvm-commits
- [llvm] [Interpreter] Add initialization of array members (PR #66172)
via llvm-commits
- [llvm] [AMDGPU] Add dynamic LDS size implicit kernel argument to CO-v5 (PR #65273)
via llvm-commits
- [llvm] 45636ec - [RISCV] Add sink-and-fold support for RISC-V. (#67602)
via llvm-commits
- [llvm] [lit] Clean up internal shell parse errors with ScriptFatal (PR #68496)
via llvm-commits
- [compiler-rt] [libc++] Implement ranges::iota (PR #68494)
via llvm-commits
- [llvm] [libc++] Implement ranges::iota (PR #68494)
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- [llvm] [libc++] Implement ranges::iota (PR #68494)
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- [compiler-rt] [libc++] Implement ranges::iota (PR #68494)
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- [llvm] [libc++] Implement ranges::iota (PR #68494)
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- [compiler-rt] [libc++] Implement ranges::iota (PR #68494)
via llvm-commits
- [llvm] [libc++] Implement ranges::iota (PR #68494)
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- [compiler-rt] [libc++] Implement ranges::iota (PR #68494)
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- [compiler-rt] [libc++] Implement ranges::iota (PR #68494)
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- [compiler-rt] [libc++] Implement ranges::iota (PR #68494)
via llvm-commits
- [compiler-rt] [libc++] Implement ranges::iota (PR #68494)
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- [llvm] [libc++] Implement ranges::iota (PR #68494)
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- [llvm] [TargetLowering] Lower ldexp into target supported instructions (PR #67552)
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- [llvm] [TargetLowering] Lower ldexp into target supported instructions (PR #67552)
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- [llvm] [TargetLowering] Lower ldexp into target supported instructions (PR #67552)
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- [llvm] [TargetLowering] Lower ldexp into target supported instructions (PR #67552)
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- [llvm] [TargetLowering] Lower ldexp into target supported instructions (PR #67552)
via llvm-commits
- [llvm] 76fc871 - [RISCV] Support fptoi like ops for fp16 vectors input when only have Zvfhmin (#67532)
via llvm-commits
- [llvm] [InstCombine] Convert or concat to fshl if opposite or concat exists (PR #68502)
via llvm-commits
- [llvm] [InstCombine] Convert or concat to fshl if opposite or concat exists (PR #68502)
via llvm-commits
- [llvm] [InstCombine] Refactor matchFunnelShift to allow more pattern (NFC) (PR #68474)
via llvm-commits
- [llvm] [InstCombine] Refactor matchFunnelShift to allow more pattern (NFC) (PR #68474)
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- [llvm] [InstCombine] Fold zext-of-icmp with no shift (PR #68503)
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- [llvm] [InstCombine] Fold zext-of-icmp with no shift (PR #68503)
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- [llvm] [VP] IR expansion for bitreverse/bswap (PR #68504)
via llvm-commits
- [llvm] 18622fc - [RISCV][NFC] Add base classes of Operand and uimm/simm (#68472)
via llvm-commits
- [llvm] [Interpreter] Add initialization of array members (PR #66172)
via llvm-commits
- [llvm] [VP] Use the interface of 'getFunctionalIntrinsicID' to get the non-p… (PR #68508)
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- [llvm] [InstCombine] optimize powi(X,Y)/X with Ofast (PR #67236)
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- [llvm] [InstCombine] optimize powi(X,Y)/X with Ofast (PR #67236)
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- [llvm] [VP] IR expansion for bitreverse/bswap (PR #68504)
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- [llvm] 32f7197 - [VP] Use the interface of 'getFunctionalIntrinsicID' to get the non-p… (#68508)
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- [llvm] [VP] Use the interface of 'getFunctionalIntrinsicID' to get the non-p… (PR #68508)
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- [llvm] [VP] Use the interface of 'getFunctionalIntrinsicID' to get the non-p… (PR #68508)
via llvm-commits
- [llvm] [AArch64] Fix postinc operands for Cortex-A510 scheduling (PR #68518)
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- [llvm] [VP] IR expansion for bitreverse/bswap (PR #68504)
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- [llvm] [VP] IR expansion for bitreverse/bswap (PR #68504)
via llvm-commits
- [llvm] [BOLT][NFC] Extract a function for dump MCInst (PR #67225)
via llvm-commits
- [llvm] [TargetLowering] Lower ldexp into target supported instructions (PR #67552)
via llvm-commits
- [llvm] [TargetLowering] Lower ldexp into target supported instructions (PR #67552)
via llvm-commits
- [llvm] Port CodeGenPrepare to new pass manager (PR #68530)
via llvm-commits
- [llvm] [X86][ISel] Improve logic for optimizing `movmsk(bitcast(shuffle(x)))` (PR #68369)
via llvm-commits
- [llvm] [X86][ISel] Fix logic for optimizing `movmsk(bitcast(shuffle(x)))` (PR #68369)
via llvm-commits
- [llvm] [X86][ISel] Fix logic for optimizing `movmsk(bitcast(shuffle(x)))` (PR #68369)
via llvm-commits
- [llvm] [ValueTracking] Analyze `Select` in `isKnownNonEqual`. (PR #68427)
via llvm-commits
- [llvm] [ValueTracking] Analyze `Select` in `isKnownNonEqual`. (PR #68427)
via llvm-commits
- [llvm] [SimplifyCFG][Migrated] Transform for redirecting phis between unmergeable BB and SuccBB (PR #67275)
via llvm-commits
- [llvm] [ValueTracking] Analyze `Select` in `isKnownNonEqual`. (PR #68427)
via llvm-commits
- [llvm] VectorWiden pass to widen aleady vectorized instrctions (PR #67029)
via llvm-commits
- [llvm] [ValueTracking] Analyze `Select` in `isKnownNonEqual`. (PR #68427)
via llvm-commits
- [llvm] [libcxx] Allow string to use SSO in constant evaluation. (PR #66576)
via llvm-commits
- [llvm] [Sparc] Replace CMP instructions with InstAlias (NFCI) (PR #66859)
via llvm-commits
- [llvm] [RISCV][LLD] Add RISCV zcmt optimise in linker relaxation (PR #68551)
via llvm-commits
- [lld] [RISCV][LLD] Add RISCV zcmt optimise in linker relaxation (PR #68551)
via llvm-commits
- [llvm] [RISCV][LLD] Add RISCV zcmt optimise in linker relaxation (PR #68551)
via llvm-commits
- [llvm] [RISCV][LLD] Add RISCV zcmt optimise in linker relaxation (PR #68551)
via llvm-commits
- [lld] [RISCV][LLD] Add RISCV zcmt optimise in linker relaxation (PR #68551)
via llvm-commits
- [llvm] 7cfe32d - [Driver] Hook up Haiku ARM support (#67222)
via llvm-commits
- [llvm] clarify NaN propagation in fptrunc (PR #68554)
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- [llvm] [MemCpyOpt] Fix the invalid code modification for GEP (PR #68479)
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- [llvm] [test] Align behavior of interrupts.test on different platforms (PR #68556)
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- [llvm] [LoongArch] Improve codegen for atomic ops (PR #67391)
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- [llvm] c98bf1e - [Sparc] Replace CMP instructions with InstAlias (NFCI) (#66859)
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Last message date:
Sun Oct 8 23:56:40 PDT 2023
Archived on: Sun Oct 8 23:56:43 PDT 2023
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