[PATCH] D152205: [Aarch64][SVE]SVE2] Enable tbl, tbl2 for shuffle lowering for fixed vector types.

[Dinar Temirbulatov via Phabricator via llvm-commits]

dtemirbulatov added inline comments.


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Comment at: llvm/test/CodeGen/AArch64/sve-fixed-length-vector-shuffle-tbl.ll:118
+
+define <8 x i8> @shuffle_index_poison_value(ptr %a, ptr %b) {
+; SVE2_128-LABEL: shuffle_index_poison_value:
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sdesmalen wrote:
> This test is missing check lines for the shuffle mask, could you please add it?
No, for the poison value it generates different value for different conditions (hardware vector size, etc), but for this test always in range of offset for operand 1, I am not sure it is consistant.


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Comment at: llvm/test/CodeGen/AArch64/sve-fixed-length-vector-shuffle-tbl.ll:2
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mattr=+sve -force-streaming-compatible-sve < %s | FileCheck %s -check-prefixes=CHECK,CHECK_SVE
+; RUN: llc -mattr=+sve2 -force-streaming-compatible-sve -aarch64-sve-vector-bits-min=128 -aarch64-sve-vector-bits-max=128  < %s | FileCheck %s -check-prefixes=CHECK,SVE2_128
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sdesmalen wrote:
> Can you remove this RUN line? This RUN line is identical to the last RUN line.
No, it is not here we targeting sve, not sve2.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D152205/new/

https://reviews.llvm.org/D152205