[llvm] [RISCV] Be more aggressive about forming floating point constants (PR #68433)

[Alex Bradbury via llvm-commits]

asb wrote:

A load directly to FPR (especially if you can assume it's likely cached) vs a GPR to FPR move isn't trivial to reason about and of course is very microarch dependent, but this is probably a sensible default. @topperc - any insight on how this would impact the SiFive microarchitectures?

https://github.com/llvm/llvm-project/pull/68433