[llvm] [RISCV] Extract subregister if VLEN is known when lowering extract_subvector (PR #65392)

[Luke Lau via llvm-commits]

lukel97 wrote:

Marking this as a draft as it may need reworked after #65598, #66087, and related PRs to reduce LMUL across vslidedowns and vslideups have landed. 

https://github.com/llvm/llvm-project/pull/65392