[llvm] [AArch64][GlobalISel] Add legalization for G_VECREDUCE_MUL (PR #68398)

[David Green via llvm-commits]

================
@@ -885,6 +885,14 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
       .clampMaxNumElements(1, s16, 8)
       .lower();
 
+  getActionDefinitionsBuilder(G_VECREDUCE_MUL)
+      .clampMaxNumElements(1, s64, 2)
+      .clampMaxNumElements(1, s32, 4)
+      .clampMaxNumElements(1, s16, 8)
+      .clampMaxNumElements(1, s8, 16)
----------------
davemgreen wrote:

Did you try specifying smaller values for the initial clamps, so that it takes more vector steps before it scalarizes? I think it might help to take the extra step using vector register, as there is a d-vector mul instruction available.
```
      .clampMaxNumElements(1, s32, 2)
      .clampMaxNumElements(1, s16, 4)
      .clampMaxNumElements(1, s8, 8)
```

https://github.com/llvm/llvm-project/pull/68398