[PATCH] D152205: [Aarch64][SVE]SVE2] Enable tbl, tbl2 for shuffle lowering for fixed vector types.

Sander de Smalen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 2 13:31:20 PDT 2023


sdesmalen added inline comments.


================
Comment at: llvm/test/CodeGen/AArch64/sve-fixed-length-vector-shuffle-tbl.ll:118
+
+define <8 x i8> @shuffle_index_poison_value(ptr %a, ptr %b) {
+; SVE2_128-LABEL: shuffle_index_poison_value:
----------------
dtemirbulatov wrote:
> sdesmalen wrote:
> > This test is missing check lines for the shuffle mask, could you please add it?
> No, for the poison value it generates different value for different conditions (hardware vector size, etc), but for this test always in range of offset for operand 1, I am not sure it is consistant.
I don't think there's a benefit to choosing one index over another, so what if you change the code to always choose lane `0` if the index < 0? That way, you can add the CHECK lines.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D152205/new/

https://reviews.llvm.org/D152205



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