[llvm] [AMDGPU] Add another SIFoldOperands instance after shrink (PR #67878)

[Stanislav Mekhanoshin via llvm-commits]

================
@@ -312,13 +312,13 @@ define <2 x i32> @v_srem_v2i32_pow2k_denom(<2 x i32> %num) {
 ; GISEL-NEXT:    v_sub_i32_e32 v0, vcc, v0, v4
 ; GISEL-NEXT:    v_sub_i32_e32 v1, vcc, v1, v3
 ; GISEL-NEXT:    v_subrev_i32_e32 v3, vcc, s4, v0
-; GISEL-NEXT:    v_subrev_i32_e32 v4, vcc, s4, v1
+; GISEL-NEXT:    v_subrev_i32_e32 v4, vcc, 0x1000, v1
----------------
rampitec wrote:

OK, shrink pass has commuted it, but cannot shrink because of the sdst. It has marked the sdst with the allocation hint to be vcc and bailed until RA. Although it is possible to shink it because sdst is dead. Like this:
```
diff --git a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
index 4159dc694c1e..b20bcc987a7c 100644
--- a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
+++ b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
@@ -960,7 +960,7 @@ bool SIShrinkInstructions::runOnMachineFunction(MachineFunction &MF) {
       const MachineOperand *SDst = TII->getNamedOperand(MI,
                                                         AMDGPU::OpName::sdst);

-      if (SDst) {
+      if (SDst && !SDst->isDead()) {
         bool Next = false;

         if (SDst->getReg() != VCCReg) {
```
That patch has folded all 4 occurrences.

https://github.com/llvm/llvm-project/pull/67878