[llvm] [AMDGPU] Use absolute relocations when compiling for AMDPAL and Mesa3D (PR #67791)

[Thomas Symalla via llvm-commits]

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@@ -2762,7 +2766,46 @@ bool AMDGPULegalizerInfo::buildPCRelGlobalAddress(Register DstReg, LLT PtrTy,
   if (PtrTy.getSizeInBits() == 32)
     B.buildExtract(DstReg, PCReg, 0);
   return true;
- }
+}
+
+// Emit a ABS32_LO / ABS32_HI relocation stub.
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tsymalla wrote:

You mean, as part of the IRTranslator which builds the G_GLOBAL_VALUE? Sure, that would work somehow, but why would we have relocation logic at two different places? I intended to have the GISel implementation next to the pc-rel relocation support, that's why I implemented it here.

https://github.com/llvm/llvm-project/pull/67791