[llvm] [AMDGPU][CodeGen] Fold immediates in src1 operands of V_MAD/MAC/FMA/FMAC. (PR #68002)

[Jay Foad via llvm-commits]

================
@@ -3250,9 +3250,12 @@ bool SIInstrInfo::FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI,
     MachineOperand *Src2 = getNamedOperand(UseMI, AMDGPU::OpName::src2);
 
     // Multiplied part is the constant: Use v_madmk_{f16, f32}.
-    // We should only expect these to be on src0 due to canonicalization.
-    if (Src0->isReg() && Src0->getReg() == Reg) {
-      if (!Src1->isReg() || RI.isSGPRClass(MRI->getRegClass(Src1->getReg())))
+    if ((Src0->isReg() && Src0->getReg() == Reg) ||
+        (Src1->isReg() && Src1->getReg() == Reg)) {
+      MachineOperand *RegSrc =
+          Src1->isReg() && Src1->getReg() == Reg ? Src0 : Src1;
+      if (!RegSrc->isReg() ||
+          RI.isSGPRClass(MRI->getRegClass(RegSrc->getReg())))
----------------
jayfoad wrote:

I don't thinking checking whether RegSrc isSGPRClass makes any sense here. Even if it was an sgpr, we should still be able to do this fold. If anything, we ought to be checking whether the _other_ one of src0/src1 is an sgpr - if it is, we might not be able to encode it, or we might risk exceeding the constant bus limit. (Actually I am not sure if either of those concerns apply to madmk. But those are the reasons why we check isSGPR in the madak case.)

https://github.com/llvm/llvm-project/pull/68002