[llvm] ff48e83 - [SLP][NFC]Add a test for reused extracts corner case, NFC.
Alexey Bataev via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 4 06:29:01 PDT 2023
Author: Alexey Bataev
Date: 2023-10-04T06:28:49-07:00
New Revision: ff48e83f18eea446cebc3e14c67ab53a9174616b
URL: https://github.com/llvm/llvm-project/commit/ff48e83f18eea446cebc3e14c67ab53a9174616b
DIFF: https://github.com/llvm/llvm-project/commit/ff48e83f18eea446cebc3e14c67ab53a9174616b.diff
LOG: [SLP][NFC]Add a test for reused extracts corner case, NFC.
Added:
llvm/test/Transforms/SLPVectorizer/X86/reused-extracts.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/Transforms/SLPVectorizer/X86/reused-extracts.ll b/llvm/test/Transforms/SLPVectorizer/X86/reused-extracts.ll
new file mode 100644
index 000000000000000..1820407daf0785c
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/X86/reused-extracts.ll
@@ -0,0 +1,37 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3
+; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-pc-windows-msvc19.34.0 < %s | FileCheck %s
+
+define void @test() {
+; CHECK-LABEL: define void @test() {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i1> poison, i1 false, i32 0
+; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr getelementptr inbounds ([17 x i64], ptr null, i64 0, i64 9), align 8
+; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i1> [[TMP0]], i1 false, i32 1
+; CHECK-NEXT: [[TMP3:%.*]] = zext <2 x i1> [[TMP2]] to <2 x i64>
+; CHECK-NEXT: [[TMP4:%.*]] = or <2 x i64> [[TMP1]], [[TMP3]]
+; CHECK-NEXT: store <2 x i64> [[TMP4]], ptr getelementptr inbounds ([17 x i64], ptr null, i64 0, i64 9), align 8
+; CHECK-NEXT: ret void
+;
+entry:
+ %cmp.i.i = fcmp olt float 0.000000e+00, 0.000000e+00
+ %0 = zext i1 %cmp.i.i to i64
+ %pgocount88 = load i64, ptr getelementptr inbounds ([17 x i64], ptr null, i64 0, i64 9), align 8
+ %1 = or i64 %pgocount88, %0
+ store i64 %1, ptr getelementptr inbounds ([17 x i64], ptr null, i64 0, i64 9), align 8
+ %cond.i.i = select i1 %cmp.i.i, float 0.000000e+00, float 0.000000e+00
+ %cmp1.i.i = fcmp ogt float %cond.i.i, 0.000000e+00
+ %2 = zext i1 %cmp1.i.i to i64
+ %pgocount89 = load i64, ptr getelementptr inbounds ([17 x i64], ptr null, i64 0, i64 10), align 8
+ %3 = or i64 %pgocount89, %2
+ store i64 %3, ptr getelementptr inbounds ([17 x i64], ptr null, i64 0, i64 10), align 8
+ %cmp.i9.i = fcmp olt float 0.000000e+00, 0.000000e+00
+ %cond.i10.i = select i1 %cmp.i9.i, float 0.000000e+00, float 0.000000e+00
+ %cmp1.i11.i = fcmp ogt float %cond.i10.i, 0.000000e+00
+ %cmp.i14.i = fcmp olt float 0.000000e+00, 0.000000e+00
+ %cond.i15.i = select i1 %cmp.i14.i, float 0.000000e+00, float 0.000000e+00
+ %cmp1.i16.i = fcmp ogt float %cond.i15.i, 0.000000e+00
+ %cmp.i19.i = fcmp olt float 0.000000e+00, 0.000000e+00
+ %cond.i20.i = select i1 %cmp.i19.i, float 0.000000e+00, float 0.000000e+00
+ %cmp1.i21.i = fcmp ogt float %cond.i20.i, 0.000000e+00
+ ret void
+}
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