[llvm] [RISCV] Strip W suffix from ADDIW, SRLIW, and SRAIW (PR #68425)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 6 09:09:49 PDT 2023
================
@@ -12,11 +12,12 @@
// extended bits aren't consumed or because the input was already sign extended
// by an earlier instruction.
//
-// Then it removes the -w suffix from addw, slliw and mulw instructions
-// whenever all users are dependent only on the lower word of the result of the
-// instruction. We do this only for addw, slliw, and mulw because the -w forms
-// are less compressible: c.add and c.slli have a larger register encoding than
-// their w counterparts, and there's no compressible version of mulw.
----------------
topperc wrote:
This comment was incorrect. c.mul was added with Zcb.
https://github.com/llvm/llvm-project/pull/68425
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