[llvm] [RISCV] Avoid using x7/t2 for indirect branches which need landing pad. (PR #68292)

[Jessica Clarke via llvm-commits]

jrtc27 wrote:

I have concerns about this aspect of the spec, as it has implications for the mapping of pseudo instructions to real instructions, and requires changing which register `tail` clobbers, something which is, today, very clearly specified in the RISC-V Assembly Programmer's Manual. See https://github.com/riscv/riscv-cfi/issues/125#issuecomment-1681520704.

https://github.com/llvm/llvm-project/pull/68292