[PATCH] D155472: [DAG] Attempt shl narrowing in SimplifyDemandedBits

[Nikita Popov via Phabricator via llvm-commits]

nikic added inline comments.


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Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:1799
+          // which is equivalent to the narrow shift being NUW.
+          KnownBits Known0 = TLO.DAG.computeKnownBits(Op0, Depth + 1);
+          bool IsNUW = Known0.countMinLeadingZeros() >= (ShAmt + HalfWidth);
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You shouldn't be directly calling computeKnownBits in SimplifyDemandedBits. Your new code needs to be moved after the SimplifyDemandedBits call below and use the Known it already computes for Op0.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D155472/new/

https://reviews.llvm.org/D155472