[llvm] [X86] Support EGPR (R16-R31) for APX (PR #67702)

[Shengchen Kan via llvm-commits]

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@@ -158,6 +158,10 @@ X86RegisterInfo::getLargestLegalSuperClass(const TargetRegisterClass *RC,
     case X86::GR16RegClassID:
     case X86::GR32RegClassID:
     case X86::GR64RegClassID:
+    case X86::GR8_NOREX2RegClassID:
+    case X86::GR16_NOREX2RegClassID:
+    case X86::GR32_NOREX2RegClassID:
+    case X86::GR64_NOREX2RegClassID:
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KanRobert wrote:

We have comments in X86BaseInfo.h about when we need to distinguish them. `PREFETCH` instructions are in map TB and they can use r16-r31, so `X86::GRxxRegClassID` does not need to be updated.

Yes, some of `createVirtualRegister(&X86::GRxxRegClass)` needs to be updated if the instruction can not encode r16-r31. 



https://github.com/llvm/llvm-project/pull/67702