[llvm] 481df27 - [RISCV][SelectionDAG] Sign extend splats of i32 in getConstant on RV64 (#67027)

[via llvm-commits]

Author: Luke Lau
Date: 2023-10-03T12:57:39+01:00
New Revision: 481df274d37b24edbd06e08052f1220e5a42fcc6

URL: https://github.com/llvm/llvm-project/commit/481df274d37b24edbd06e08052f1220e5a42fcc6
DIFF: https://github.com/llvm/llvm-project/commit/481df274d37b24edbd06e08052f1220e5a42fcc6.diff

LOG: [RISCV][SelectionDAG] Sign extend splats of i32 in getConstant on RV64 (#67027)

We get better constant materialization if we sign extend the value to be
splatted for i32 on RV64 instead of zero extending it.

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 0a61920b7c079ba..764a873768101c2 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -1620,7 +1620,11 @@ SDValue SelectionDAG::getConstant(const ConstantInt &Val, const SDLoc &DL,
   if (VT.isVector() && TLI->getTypeAction(*getContext(), EltVT) ==
                            TargetLowering::TypePromoteInteger) {
     EltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
-    APInt NewVal = Elt->getValue().zextOrTrunc(EltVT.getSizeInBits());
+    APInt NewVal;
+    if (TLI->isSExtCheaperThanZExt(VT.getScalarType(), EltVT))
+      NewVal = Elt->getValue().sextOrTrunc(EltVT.getSizeInBits());
+    else
+      NewVal = Elt->getValue().zextOrTrunc(EltVT.getSizeInBits());
     Elt = ConstantInt::get(*getContext(), NewVal);
   }
   // In other cases the element type is illegal and needs to be expanded, for