[llvm] 32a23ae - RegisterCoalescer: Forcibly leave SSA to avoid MIR test errors

[Matt Arsenault via llvm-commits]

Author: Matt Arsenault
Date: 2023-10-02T12:10:06+03:00
New Revision: 32a23aecf8002e181eb1022b8733ef8666b3241f

URL: https://github.com/llvm/llvm-project/commit/32a23aecf8002e181eb1022b8733ef8666b3241f
DIFF: https://github.com/llvm/llvm-project/commit/32a23aecf8002e181eb1022b8733ef8666b3241f.diff

LOG: RegisterCoalescer: Forcibly leave SSA to avoid MIR test errors

Not sure how to produce a test that demonstrates the problem
today. The coalescer would have to introduce a verifier caught SSA
violation, like multiple defs of a virtual register. I'm not sure what
would do that now, but an upcoming patch will.

https://reviews.llvm.org/D156271

Added: 
    

Modified: 
    llvm/lib/CodeGen/RegisterCoalescer.cpp

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/RegisterCoalescer.cpp b/llvm/lib/CodeGen/RegisterCoalescer.cpp
index 238462113bfe78c..516095a699ea1e8 100644
--- a/llvm/lib/CodeGen/RegisterCoalescer.cpp
+++ b/llvm/lib/CodeGen/RegisterCoalescer.cpp
@@ -4131,6 +4131,14 @@ bool RegisterCoalescer::runOnMachineFunction(MachineFunction &fn) {
   else
     JoinGlobalCopies = (EnableGlobalCopies == cl::BOU_TRUE);
 
+  // FIXME: MachineFunctionProperties cannot express the required pre-property
+  // no-SSA. When running a MIR testcase without any virtual register defs, the
+  // MIR parser assumes SSA. MachineFunctionPass::getClearedProperties is called
+  // after the pass is run, so the properties at this point say it's an SSA
+  // function.  Forcibly clear it here so -verify-coalescing doesn't complain
+  // after multiple virtual register defs are introduced.
+  MRI->leaveSSA();
+
   // If there are PHIs tracked by debug-info, they will need updating during
   // coalescing. Build an index of those PHIs to ease updating.
   SlotIndexes *Slots = LIS->getSlotIndexes();