[llvm] [AMDGPU][GFX11] Do not rewrite V_FMA/FMAC_* to V_FMAAK_F16_t16 on operand legalization. (PR #66202)

Joe Nash via llvm-commits llvm-commits at lists.llvm.org
Tue Oct 3 09:11:53 PDT 2023


================
@@ -3318,6 +3318,12 @@ bool SIInstrInfo::FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI,
       if (pseudoToMCOpcode(NewOpc) == -1)
         return false;
 
+      // V_FMAAK_F16_t16 takes VGPR_32_Lo128 operands, so the rewrite
+      // would also require restricting their register classes. For now
----------------
Sisyph wrote:

I don't think the reasoning for real True16 is right, but the conclusion we don't want to shrink is right. VGPR_16_Lo128 (or something derived from it ) would still be used downstream. 
`dag InOperandList = (ins VSrcT_f16_Lo128_Deferred:$src0, VGPRSrc_16_Lo128:$src1, KImmFP16:$imm);`

We don't want to shrink pre-RA because it would restrict the register allocation to only use the bottom 128 vgprs

https://github.com/llvm/llvm-project/pull/66202


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