[llvm] [AMDGPU] Allow shinking instruction with dead sdst (PR #68028)
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Mon Oct 2 13:28:31 PDT 2023
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<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
:warning: C/C++ code formatter, clang-format found issues in your code. :warning:
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You can test this locally with the following command:
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``````````bash
git-clang-format --diff 3dda1040d3fe56dbd8afd2eb823e891954de13f3 38d1bbe9ddc656356ab57ce7de1c788ab793e6f8 -- llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
index bba533a4ca05..c39c8d1beb95 100644
--- a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
+++ b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
@@ -963,8 +963,8 @@ bool SIShrinkInstructions::runOnMachineFunction(MachineFunction &MF) {
if (SDst) {
// All of the instructions with carry outs also have an SGPR input in
// src2.
- const MachineOperand *Src2 = TII->getNamedOperand(MI,
- AMDGPU::OpName::src2);
+ const MachineOperand *Src2 =
+ TII->getNamedOperand(MI, AMDGPU::OpName::src2);
// We can shrink the instruction right now if sdst is dead anyway and
// carry-in is not a register. If it is a register then VOP2 form shall
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https://github.com/llvm/llvm-project/pull/68028
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