[llvm] 63bbc25 - [RISCV] Remove a stray semi-colon [nfc]

[Vitaly Buka via llvm-commits]

On Tue, 3 Oct 2023 at 09:11, Philip Reames via llvm-commits <
llvm-commits at lists.llvm.org> wrote:

>
> Author: Philip Reames
> Date: 2023-10-03T09:10:40-07:00
> New Revision: 63bbc250440141b1c51593904fba9bdaa6724280
>
> URL:
> https://github.com/llvm/llvm-project/commit/63bbc250440141b1c51593904fba9bdaa6724280
> DIFF:
> https://github.com/llvm/llvm-project/commit/63bbc250440141b1c51593904fba9bdaa6724280.diff
>
> LOG: [RISCV] Remove a stray semi-colon [nfc]
>
> Noticed by a smallish subset of the build bots.  Interestingly, most
> compilers appear to accept a stray semi-colon between function bodies.
>

Not all bots runs -Werror.


>
> Added:
>
>
> Modified:
>     llvm/lib/Target/RISCV/RISCVISelLowering.cpp
>
> Removed:
>
>
>
>
> ################################################################################
> diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
> b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
> index 00ae8924369a890..d5b4a98147192b1 100644
> --- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
> +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
> @@ -11129,7 +11129,7 @@ static unsigned getVecReduceOpcode(unsigned Opc) {
>    case ISD::XOR:
>      return ISD::VECREDUCE_XOR;
>    }
> -};
> +}
>
>  /// Perform two related transforms whose purpose is to incrementally
> recognize
>  /// an explode_vector followed by scalar reduction as a vector reduction
> node.
>
>
>
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