[llvm] [AMDGPU] Save/Restore SCC bit across waterfall loop. (PR #68363)

[Sirish Pande via llvm-commits]

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@@ -6014,6 +6047,16 @@ loadMBUFScalarOperandsFromVGPR(const SIInstrInfo &TII, MachineInstr &MI,
   unsigned MovExecOpc = ST.isWave32() ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64;
   const auto *BoolXExecRC = TRI->getRegClass(AMDGPU::SReg_1_XEXECRegClassID);
 
+  // Save SCC. Waterfall Loop may overwrite SCC.
+  Register SaveSCCReg;
+  bool SCCDefined = false;
+  if ((SCCDefined = TII.isSCCDefinedAndUsed(MBB, Begin, End))) {
+    SaveSCCReg = MRI.createVirtualRegister(
+        TRI->getRegClass(AMDGPU::SReg_1_XEXECRegClassID));
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srpande wrote:

Yes, I have that which looks like this:
  if ((SCCDefined = TII.isSCCDefinedAndUsed(MBB, Begin, End))) {
    SaveSCCReg = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);
    BuildMI(MBB, Begin, DL, TII.get(AMDGPU::COPY), SaveSCCReg)
        .addReg(AMDGPU::SCC);
  }
I am putting that in another patch, which requires change in fixSCCCopies in SIFixSGPRCopies.cpp

https://github.com/llvm/llvm-project/pull/68363