[PATCH] D158449: [IR]Add NumSrcElts param to is..Mask static function in ShuffleVectorInst.

Tue Oct 3 13:03:12 PDT 2023

ABataev added a comment.

In D158449#4652813 <https://reviews.llvm.org/D158449#4652813>, @aeubanks wrote:

> hitting an `opt -p slp-vectorizer` assert  on the following IR:
>
>   target datalayout = "e-m:w-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
>   target triple = "x86_64-pc-windows-msvc19.34.0"
>   
>   define ptr @f() {
>   entry:
>     %cmp.i.i = fcmp olt float 0.000000e+00, 0.000000e+00
>     %0 = zext i1 %cmp.i.i to i64
>     %pgocount88 = load i64, ptr getelementptr inbounds ([17 x i64], ptr null, i64 0, i64 9), align 8
>     %1 = or i64 %pgocount88, %0
>     store i64 %1, ptr getelementptr inbounds ([17 x i64], ptr null, i64 0, i64 9), align 8
>     %cond.i.i = select i1 %cmp.i.i, float 0.000000e+00, float 0.000000e+00
>     %cmp1.i.i = fcmp ogt float %cond.i.i, 0.000000e+00
>     %2 = zext i1 %cmp1.i.i to i64
>     %pgocount89 = load i64, ptr getelementptr inbounds ([17 x i64], ptr null, i64 0, i64 10), align 8
>     %3 = or i64 %pgocount89, %2
>     store i64 %3, ptr getelementptr inbounds ([17 x i64], ptr null, i64 0, i64 10), align 8
>     %cmp.i9.i = fcmp olt float 0.000000e+00, 0.000000e+00
>     %cond.i10.i = select i1 %cmp.i9.i, float 0.000000e+00, float 0.000000e+00
>     %cmp1.i11.i = fcmp ogt float %cond.i10.i, 0.000000e+00
>     %cmp.i14.i = fcmp olt float 0.000000e+00, 0.000000e+00
>     %cond.i15.i = select i1 %cmp.i14.i, float 0.000000e+00, float 0.000000e+00
>     %cmp1.i16.i = fcmp ogt float %cond.i15.i, 0.000000e+00
>     %cmp.i19.i = fcmp olt float 0.000000e+00, 0.000000e+00
>     %cond.i20.i = select i1 %cmp.i19.i, float 0.000000e+00, float 0.000000e+00
>     %cmp1.i21.i = fcmp ogt float %cond.i20.i, 0.000000e+00
>     ret ptr null
>   }

Thanks, reverted the patch, will investigate it and fix.

Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D158449/new/

https://reviews.llvm.org/D158449