[llvm] [X86] Add missed type extension and truncation during combine (PR #67168)
Evgenii Kudriashov via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 4 06:53:49 PDT 2023
================
@@ -256,3 +256,44 @@ entry:
store i32 %i, ptr addrspace(272) %s, align 8
ret void
}
+
+define i64 @test_load_sptr32_zext_i64(ptr addrspace(270) %i) {
+; CHECK-LABEL: test_load_sptr32_zext_i64:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: movslq %ecx, %rax
+; CHECK-NEXT: movl (%rax), %eax
+; CHECK-NEXT: retq
+;
+; CHECK-O0-LABEL: test_load_sptr32_zext_i64:
+; CHECK-O0: # %bb.0: # %entry
+; CHECK-O0-NEXT: movslq %ecx, %rax
+; CHECK-O0-NEXT: movl (%rax), %eax
+; CHECK-O0-NEXT: movl %eax, %eax
----------------
e-kud wrote:
Yes, why not? It is `O0`. I used to think that `eax` is taken for intermediate result of load and then we need to move this results to the return register. It happens sometimes.
https://github.com/llvm/llvm-project/pull/67168
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