[llvm] [InstCombine] Fold zext(icmp (A, xxx)) == shr(A, BW - 1) => not(trunc(xor(zext(icmp), shl))) (PR #68244)

via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 6 05:41:07 PDT 2023


https://github.com/XChy updated https://github.com/llvm/llvm-project/pull/68244

>From 7d5d9f51ac67054bb8a820657c7229c8f4a03bf8 Mon Sep 17 00:00:00 2001
From: XChy <xxs_chy at outlook.com>
Date: Wed, 4 Oct 2023 14:03:06 +0800
Subject: [PATCH 1/2] [InstCombine] Tests for the fold A < 0 == icmp(A)

---
 .../InstCombine/icmp-xor-signbit.ll           | 90 +++++++++++++++++++
 1 file changed, 90 insertions(+)

diff --git a/llvm/test/Transforms/InstCombine/icmp-xor-signbit.ll b/llvm/test/Transforms/InstCombine/icmp-xor-signbit.ll
index 29a18ebbdd94e16..fa820b3981b699e 100644
--- a/llvm/test/Transforms/InstCombine/icmp-xor-signbit.ll
+++ b/llvm/test/Transforms/InstCombine/icmp-xor-signbit.ll
@@ -217,3 +217,93 @@ define <2 x i1> @negative_simplify_splat(<4 x i8> %x) {
   ret <2 x i1> %c
 }
 
+
+define i1 @slt_zero_eq_ne_0(i32 %a) {
+; CHECK-LABEL: @slt_zero_eq_ne_0(
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i32 [[A:%.*]], 0
+; CHECK-NEXT:    [[CONV:%.*]] = zext i1 [[CMP]] to i32
+; CHECK-NEXT:    [[CMP1:%.*]] = lshr i32 [[A]], 31
+; CHECK-NEXT:    [[CMP2:%.*]] = icmp eq i32 [[CMP1]], [[CONV]]
+; CHECK-NEXT:    ret i1 [[CMP2]]
+;
+  %cmp = icmp ne i32 %a, 0
+  %conv = zext i1 %cmp to i32
+  %cmp1 = lshr i32 %a, 31
+  %cmp2 = icmp eq i32 %conv, %cmp1
+  ret i1 %cmp2
+}
+
+define i1 @slt_zero_ne_ne_0(i32 %a) {
+; CHECK-LABEL: @slt_zero_ne_ne_0(
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i32 [[A:%.*]], 0
+; CHECK-NEXT:    [[CONV:%.*]] = zext i1 [[CMP]] to i32
+; CHECK-NEXT:    [[CMP1:%.*]] = lshr i32 [[A]], 31
+; CHECK-NEXT:    [[CMP2:%.*]] = icmp ne i32 [[CMP1]], [[CONV]]
+; CHECK-NEXT:    ret i1 [[CMP2]]
+;
+  %cmp = icmp ne i32 %a, 0
+  %conv = zext i1 %cmp to i32
+  %cmp1 = lshr i32 %a, 31
+  %cmp2 = icmp ne i32 %conv, %cmp1
+  ret i1 %cmp2
+}
+
+define <4 x i1> @slt_zero_eq_ne_0_vec(<4 x i32> %a) {
+; CHECK-LABEL: @slt_zero_eq_ne_0_vec(
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne <4 x i32> [[A:%.*]], zeroinitializer
+; CHECK-NEXT:    [[CONV:%.*]] = zext <4 x i1> [[CMP]] to <4 x i32>
+; CHECK-NEXT:    [[CMP1:%.*]] = lshr <4 x i32> [[A]], <i32 31, i32 31, i32 31, i32 31>
+; CHECK-NEXT:    [[CMP2:%.*]] = icmp eq <4 x i32> [[CMP1]], [[CONV]]
+; CHECK-NEXT:    ret <4 x i1> [[CMP2]]
+;
+  %cmp = icmp ne <4 x i32> %a, zeroinitializer
+  %conv = zext <4 x i1> %cmp to <4 x i32>
+  %cmp1 = lshr <4 x i32> %a, <i32 31, i32 31, i32 31, i32 31>
+  %cmp2 = icmp eq <4 x i32> %conv, %cmp1
+  ret <4 x i1> %cmp2
+}
+
+define i1 @slt_zero_ne_ne_b(i32 %a, i32 %b) {
+; CHECK-LABEL: @slt_zero_ne_ne_b(
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    [[CONV:%.*]] = zext i1 [[CMP]] to i32
+; CHECK-NEXT:    [[CMP1:%.*]] = lshr i32 [[A]], 31
+; CHECK-NEXT:    [[CMP2:%.*]] = icmp ne i32 [[CMP1]], [[CONV]]
+; CHECK-NEXT:    ret i1 [[CMP2]]
+;
+  %cmp = icmp ne i32 %a, %b
+  %conv = zext i1 %cmp to i32
+  %cmp1 = lshr i32 %a, 31
+  %cmp2 = icmp ne i32 %conv, %cmp1
+  ret i1 %cmp2
+}
+
+define i1 @slt_zero_eq_ne_0_fail1(i32 %a) {
+; CHECK-LABEL: @slt_zero_eq_ne_0_fail1(
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i32 [[A:%.*]], 0
+; CHECK-NEXT:    [[CONV:%.*]] = zext i1 [[CMP]] to i32
+; CHECK-NEXT:    [[CMP1:%.*]] = ashr i32 [[A]], 31
+; CHECK-NEXT:    [[CMP2:%.*]] = icmp eq i32 [[CMP1]], [[CONV]]
+; CHECK-NEXT:    ret i1 [[CMP2]]
+;
+  %cmp = icmp ne i32 %a, 0
+  %conv = zext i1 %cmp to i32
+  %cmp1 = ashr i32 %a, 31
+  %cmp2 = icmp eq i32 %conv, %cmp1
+  ret i1 %cmp2
+}
+
+define i1 @slt_zero_eq_ne_0_fail2(i32 %a) {
+; CHECK-LABEL: @slt_zero_eq_ne_0_fail2(
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i32 [[A:%.*]], 0
+; CHECK-NEXT:    [[CONV:%.*]] = zext i1 [[CMP]] to i32
+; CHECK-NEXT:    [[CMP1:%.*]] = lshr i32 [[A]], 30
+; CHECK-NEXT:    [[CMP2:%.*]] = icmp eq i32 [[CMP1]], [[CONV]]
+; CHECK-NEXT:    ret i1 [[CMP2]]
+;
+  %cmp = icmp ne i32 %a, 0
+  %conv = zext i1 %cmp to i32
+  %cmp1 = lshr i32 %a, 30
+  %cmp2 = icmp eq i32 %conv, %cmp1
+  ret i1 %cmp2
+}

>From f4c691e5fc873f53be53b711580593df57d9e820 Mon Sep 17 00:00:00 2001
From: XChy <xxs_chy at outlook.com>
Date: Tue, 3 Oct 2023 23:27:02 +0800
Subject: [PATCH 2/2] [InstCombine] Fold A<0 == icmp(A) into
 not(xor(A<0,icmp(A)))

---
 .../InstCombine/InstCombineCompares.cpp       | 44 +++++++++++++------
 llvm/test/Transforms/InstCombine/icmp-shr.ll  |  7 ++-
 .../InstCombine/icmp-xor-signbit.ll           | 28 ++++--------
 3 files changed, 42 insertions(+), 37 deletions(-)

diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
index 9f034aba874a8c4..0c75bfdb2f26564 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
@@ -5311,11 +5311,7 @@ Instruction *InstCombinerImpl::foldICmpEquality(ICmpInst &I) {
       return new ICmpInst(Pred, A, Builder.CreateTrunc(B, A->getType()));
   }
 
-  // Test if 2 values have different or same signbits:
-  // (X u>> BitWidth - 1) == zext (Y s> -1) --> (X ^ Y) < 0
-  // (X u>> BitWidth - 1) != zext (Y s> -1) --> (X ^ Y) > -1
-  // (X s>> BitWidth - 1) == sext (Y s> -1) --> (X ^ Y) < 0
-  // (X s>> BitWidth - 1) != sext (Y s> -1) --> (X ^ Y) > -1
+  // Signbit test folds
   Instruction *ExtI;
   if (match(Op1, m_CombineAnd(m_Instruction(ExtI), m_ZExtOrSExt(m_Value(A)))) &&
       (Op0->hasOneUse() || Op1->hasOneUse())) {
@@ -5325,17 +5321,37 @@ Instruction *InstCombinerImpl::foldICmpEquality(ICmpInst &I) {
     ICmpInst::Predicate Pred2;
     if (match(Op0, m_CombineAnd(m_Instruction(ShiftI),
                                 m_Shr(m_Value(X),
-                                      m_SpecificIntAllowUndef(OpWidth - 1)))) &&
-        match(A, m_ICmp(Pred2, m_Value(Y), m_AllOnes())) &&
-        Pred2 == ICmpInst::ICMP_SGT && X->getType() == Y->getType()) {
+                                      m_SpecificIntAllowUndef(OpWidth - 1))))) {
+      // Test if 2 values have different or same signbits:
+      // (X u>> BitWidth - 1) == zext (Y s> -1) --> (X ^ Y) < 0
+      // (X u>> BitWidth - 1) != zext (Y s> -1) --> (X ^ Y) > -1
+      // (X s>> BitWidth - 1) == sext (Y s> -1) --> (X ^ Y) < 0
+      // (X s>> BitWidth - 1) != sext (Y s> -1) --> (X ^ Y) > -1
       unsigned ExtOpc = ExtI->getOpcode();
       unsigned ShiftOpc = ShiftI->getOpcode();
-      if ((ExtOpc == Instruction::ZExt && ShiftOpc == Instruction::LShr) ||
-          (ExtOpc == Instruction::SExt && ShiftOpc == Instruction::AShr)) {
-        Value *Xor = Builder.CreateXor(X, Y, "xor.signbits");
-        Value *R = (Pred == ICmpInst::ICMP_EQ) ? Builder.CreateIsNeg(Xor)
-                                               : Builder.CreateIsNotNeg(Xor);
-        return replaceInstUsesWith(I, R);
+
+      if (match(A, m_ICmp(Pred2, m_Value(Y), m_AllOnes())) &&
+          Pred2 == ICmpInst::ICMP_SGT && X->getType() == Y->getType()) {
+        if ((ExtOpc == Instruction::ZExt && ShiftOpc == Instruction::LShr) ||
+            (ExtOpc == Instruction::SExt && ShiftOpc == Instruction::AShr)) {
+          Value *Xor = Builder.CreateXor(X, Y, "xor.signbits");
+          Value *R = (Pred == ICmpInst::ICMP_EQ) ? Builder.CreateIsNeg(Xor)
+                                                 : Builder.CreateIsNotNeg(Xor);
+          return replaceInstUsesWith(I, R);
+        }
+      }
+
+      // Transform (X u>> BitWidth - 1 == zext(i1)) into X s< 0 == i1
+      // Transform (X u>> BitWidth - 1 != zext(i1)) into X s< 0 != i1
+      if (A->getType()->getScalarSizeInBits() == 1 && Op0->hasOneUse() &&
+          Op1->hasOneUse() && ExtOpc == Instruction::ZExt &&
+          ShiftOpc == Instruction::LShr) {
+
+        Value *SLTZero =
+            Builder.CreateICmpSLT(X, Constant::getNullValue(X->getType()));
+        SLTZero->takeName(Op0);
+        Value *Eq = Builder.CreateICmp(Pred, SLTZero, A, I.getName());
+        return replaceInstUsesWith(I, Eq);
       }
     }
   }
diff --git a/llvm/test/Transforms/InstCombine/icmp-shr.ll b/llvm/test/Transforms/InstCombine/icmp-shr.ll
index f4dfa2edfa17710..a8466202c4a8554 100644
--- a/llvm/test/Transforms/InstCombine/icmp-shr.ll
+++ b/llvm/test/Transforms/InstCombine/icmp-shr.ll
@@ -1397,11 +1397,10 @@ define <2 x i1> @same_signbit_poison_elts(<2 x i8> %x, <2 x i8> %y) {
 
 define i1 @same_signbit_wrong_type(i8 %x, i32 %y) {
 ; CHECK-LABEL: @same_signbit_wrong_type(
-; CHECK-NEXT:    [[XSIGN:%.*]] = lshr i8 [[X:%.*]], 7
 ; CHECK-NEXT:    [[YPOS:%.*]] = icmp sgt i32 [[Y:%.*]], -1
-; CHECK-NEXT:    [[YPOSZ:%.*]] = zext i1 [[YPOS]] to i8
-; CHECK-NEXT:    [[R:%.*]] = icmp ne i8 [[XSIGN]], [[YPOSZ]]
-; CHECK-NEXT:    ret i1 [[R]]
+; CHECK-NEXT:    [[XSIGN:%.*]] = icmp slt i8 [[X:%.*]], 0
+; CHECK-NEXT:    [[R1:%.*]] = xor i1 [[XSIGN]], [[YPOS]]
+; CHECK-NEXT:    ret i1 [[R1]]
 ;
   %xsign = lshr i8 %x, 7
   %ypos = icmp sgt i32 %y, -1
diff --git a/llvm/test/Transforms/InstCombine/icmp-xor-signbit.ll b/llvm/test/Transforms/InstCombine/icmp-xor-signbit.ll
index fa820b3981b699e..652d82f2c4e3bcb 100644
--- a/llvm/test/Transforms/InstCombine/icmp-xor-signbit.ll
+++ b/llvm/test/Transforms/InstCombine/icmp-xor-signbit.ll
@@ -220,11 +220,8 @@ define <2 x i1> @negative_simplify_splat(<4 x i8> %x) {
 
 define i1 @slt_zero_eq_ne_0(i32 %a) {
 ; CHECK-LABEL: @slt_zero_eq_ne_0(
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i32 [[A:%.*]], 0
-; CHECK-NEXT:    [[CONV:%.*]] = zext i1 [[CMP]] to i32
-; CHECK-NEXT:    [[CMP1:%.*]] = lshr i32 [[A]], 31
-; CHECK-NEXT:    [[CMP2:%.*]] = icmp eq i32 [[CMP1]], [[CONV]]
-; CHECK-NEXT:    ret i1 [[CMP2]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp slt i32 [[A:%.*]], 1
+; CHECK-NEXT:    ret i1 [[TMP1]]
 ;
   %cmp = icmp ne i32 %a, 0
   %conv = zext i1 %cmp to i32
@@ -235,11 +232,8 @@ define i1 @slt_zero_eq_ne_0(i32 %a) {
 
 define i1 @slt_zero_ne_ne_0(i32 %a) {
 ; CHECK-LABEL: @slt_zero_ne_ne_0(
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i32 [[A:%.*]], 0
-; CHECK-NEXT:    [[CONV:%.*]] = zext i1 [[CMP]] to i32
-; CHECK-NEXT:    [[CMP1:%.*]] = lshr i32 [[A]], 31
-; CHECK-NEXT:    [[CMP2:%.*]] = icmp ne i32 [[CMP1]], [[CONV]]
-; CHECK-NEXT:    ret i1 [[CMP2]]
+; CHECK-NEXT:    [[CMP21:%.*]] = icmp sgt i32 [[A:%.*]], 0
+; CHECK-NEXT:    ret i1 [[CMP21]]
 ;
   %cmp = icmp ne i32 %a, 0
   %conv = zext i1 %cmp to i32
@@ -250,11 +244,8 @@ define i1 @slt_zero_ne_ne_0(i32 %a) {
 
 define <4 x i1> @slt_zero_eq_ne_0_vec(<4 x i32> %a) {
 ; CHECK-LABEL: @slt_zero_eq_ne_0_vec(
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ne <4 x i32> [[A:%.*]], zeroinitializer
-; CHECK-NEXT:    [[CONV:%.*]] = zext <4 x i1> [[CMP]] to <4 x i32>
-; CHECK-NEXT:    [[CMP1:%.*]] = lshr <4 x i32> [[A]], <i32 31, i32 31, i32 31, i32 31>
-; CHECK-NEXT:    [[CMP2:%.*]] = icmp eq <4 x i32> [[CMP1]], [[CONV]]
-; CHECK-NEXT:    ret <4 x i1> [[CMP2]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp slt <4 x i32> [[A:%.*]], <i32 1, i32 1, i32 1, i32 1>
+; CHECK-NEXT:    ret <4 x i1> [[TMP1]]
 ;
   %cmp = icmp ne <4 x i32> %a, zeroinitializer
   %conv = zext <4 x i1> %cmp to <4 x i32>
@@ -266,10 +257,9 @@ define <4 x i1> @slt_zero_eq_ne_0_vec(<4 x i32> %a) {
 define i1 @slt_zero_ne_ne_b(i32 %a, i32 %b) {
 ; CHECK-LABEL: @slt_zero_ne_ne_b(
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    [[CONV:%.*]] = zext i1 [[CMP]] to i32
-; CHECK-NEXT:    [[CMP1:%.*]] = lshr i32 [[A]], 31
-; CHECK-NEXT:    [[CMP2:%.*]] = icmp ne i32 [[CMP1]], [[CONV]]
-; CHECK-NEXT:    ret i1 [[CMP2]]
+; CHECK-NEXT:    [[CMP1:%.*]] = icmp slt i32 [[A]], 0
+; CHECK-NEXT:    [[CMP21:%.*]] = xor i1 [[CMP1]], [[CMP]]
+; CHECK-NEXT:    ret i1 [[CMP21]]
 ;
   %cmp = icmp ne i32 %a, %b
   %conv = zext i1 %cmp to i32



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