[llvm] Port CodeGenPrepare to new pass manager (PR #68530)
Krishna Narayanan via llvm-commits
llvm-commits at lists.llvm.org
Sun Oct 8 08:22:13 PDT 2023
https://github.com/Krishna-13-cyber created https://github.com/llvm/llvm-project/pull/68530
None
>From 0b7a9e8c037cb23652e768a9b7a5e2b4fd5906ed Mon Sep 17 00:00:00 2001
From: Krishna-13-cyber <krishnanarayanan132002 at gmail.com>
Date: Sun, 8 Oct 2023 18:42:50 +0530
Subject: [PATCH 1/2] Port CodeGenPrepare to new pass manager
---
llvm/include/llvm/CodeGen/CodeGenPrepare.h | 35 +++
llvm/include/llvm/InitializePasses.h | 2 +-
llvm/lib/CodeGen/CodeGen.cpp | 2 +-
llvm/lib/CodeGen/CodeGenPrepare.cpp | 256 +++++++++++-------
llvm/lib/Passes/PassBuilder.cpp | 1 +
llvm/lib/Passes/PassRegistry.def | 1 +
.../AArch64/aarch64-codegen-prepare-atp.ll | 2 +-
llvm/test/CodeGen/AArch64/and-sink.ll | 4 +-
.../CodeGen/AArch64/arm64-bitfield-extract.ll | 2 +-
.../AArch64/arm64-codegen-prepare-extload.ll | 6 +-
.../test/CodeGen/AArch64/arm64_32-gep-sink.ll | 2 +-
.../CodeGen/AArch64/cgp-trivial-phi-node.ll | 2 +-
llvm/test/CodeGen/AArch64/convertphitype.ll | 2 +-
.../AArch64/scalable-vector-promotion.ll | 2 +-
llvm/test/CodeGen/AArch64/sve-vscale.ll | 2 +-
.../AMDGPU/cgp-addressing-modes-flat.ll | 8 +-
.../AMDGPU/cgp-addressing-modes-gfx1030.ll | 2 +-
.../AMDGPU/cgp-addressing-modes-gfx908.ll | 2 +-
.../CodeGen/AMDGPU/cgp-addressing-modes.ll | 8 +-
.../CodeGen/AMDGPU/cgp-bitfield-extract.ll | 4 +-
.../AMDGPU/codegen-prepare-addrmode-sext.ll | 2 +-
llvm/test/CodeGen/AMDGPU/tail-call-cgp.ll | 2 +-
llvm/test/CodeGen/ARM/vector-promotion.ll | 4 +-
.../Generic/addr-sink-call-multi-arg.ll | 2 +-
llvm/test/CodeGen/Generic/addr-use-count.ll | 2 +-
.../PowerPC/splitstore-check-volatile.ll | 2 +-
llvm/test/CodeGen/X86/and-sink.ll | 4 +-
.../test/CodeGen/X86/callbr-codegenprepare.ll | 2 +-
.../X86/codegen-prepare-addrmode-sext.ll | 2 +-
llvm/test/CodeGen/X86/codegen-prepare-cast.ll | 2 +-
.../CodeGen/X86/codegen-prepare-extload.ll | 6 +-
.../CodeGen/X86/codegen-prepare-oob-shl.ll | 2 +-
llvm/test/CodeGen/X86/convertphitype.ll | 2 +-
.../X86/dont-remove-empty-preheader.ll | 2 +-
llvm/test/CodeGen/X86/overflowing-iv.ll | 2 +-
llvm/test/CodeGen/X86/pr49466.ll | 2 +-
llvm/test/CodeGen/X86/pr58538.ll | 4 +-
llvm/test/CodeGen/X86/select_meta.ll | 2 +-
.../CodeGen/X86/sink-gep-before-mem-inst.ll | 2 +-
llvm/test/CodeGen/X86/tailcall-cgp-dup.ll | 2 +-
llvm/test/CodeGen/X86/tailcall-extract.ll | 2 +-
llvm/test/CodeGen/X86/uadd_inc_iv.ll | 2 +-
llvm/test/CodeGen/X86/usub_inc_iv.ll | 2 +-
llvm/test/DebugInfo/ARM/salvage-debug-info.ll | 2 +-
llvm/test/DebugInfo/X86/bitcast-di.ll | 2 +-
llvm/test/DebugInfo/X86/codegenprep-value.ll | 2 +-
llvm/test/DebugInfo/X86/sunk-compare.ll | 2 +-
llvm/test/DebugInfo/X86/zextload.ll | 2 +-
...007-04-24-eliminate-mostly-empty-blocks.ll | 2 +-
llvm/test/Other/codegenprepare-and-debug.ll | 4 +-
.../Other/opt-legacy-syntax-deprecation.ll | 2 +-
.../AArch64/combine-address-mode.ll | 2 +-
.../CodeGenPrepare/AArch64/free-zext.ll | 2 +-
.../gather-scatter-opt-inseltpoison.ll | 2 +-
.../AArch64/gather-scatter-opt.ll | 2 +-
.../AArch64/overflow-intrinsics.ll | 6 +-
.../sink-free-instructions-inseltpoison.ll | 2 +-
.../AArch64/sink-free-instructions.ll | 4 +-
.../AArch64/trunc-weird-user.ll | 2 +-
.../CodeGenPrepare/AArch64/widen_switch.ll | 2 +-
.../CodeGenPrepare/AArch64/zext-to-shuffle.ll | 2 +-
.../CodeGenPrepare/AMDGPU/addressing-modes.ll | 2 +-
...bypass-slow-div-debug-info-inseltpoison.ll | 2 +-
.../AMDGPU/bypass-slow-div-debug-info.ll | 2 +-
.../AMDGPU/no-sink-addrspacecast.ll | 2 +-
.../AMDGPU/sink-addrspacecast.ll | 2 +-
.../ARM/bitreverse-recognize.ll | 2 +-
.../CodeGenPrepare/ARM/branch-on-zero.ll | 2 +-
.../Transforms/CodeGenPrepare/ARM/dead-gep.ll | 2 +-
.../CodeGenPrepare/ARM/memory-intrinsics.ll | 2 +-
.../CodeGenPrepare/ARM/overflow-intrinsics.ll | 2 +-
...sink-add-mul-shufflevector-inseltpoison.ll | 2 +-
.../ARM/sink-add-mul-shufflevector.ll | 2 +-
.../CodeGenPrepare/ARM/sink-addrmode.ll | 2 +-
.../sink-free-instructions-inseltpoison.ll | 4 +-
.../ARM/sink-free-instructions.ll | 4 +-
.../ARM/sinkchain-inseltpoison.ll | 4 +-
.../CodeGenPrepare/ARM/sinkchain.ll | 4 +-
.../Transforms/CodeGenPrepare/ARM/splitgep.ll | 2 +-
.../CodeGenPrepare/ARM/tailcall-dup.ll | 2 +-
.../Transforms/CodeGenPrepare/Mips/pr35209.ll | 2 +-
.../bypass-slow-div-constant-numerator.ll | 2 +-
.../NVPTX/bypass-slow-div-not-exact.ll | 2 +-
.../NVPTX/bypass-slow-div-special-cases.ll | 2 +-
.../CodeGenPrepare/NVPTX/bypass-slow-div.ll | 2 +-
.../NVPTX/dont-introduce-addrspacecast.ll | 2 +-
.../NVPTX/dont-sink-nop-addrspacecast.ll | 2 +-
.../PowerPC/split-store-alignment.ll | 4 +-
.../CodeGenPrepare/RISCV/and-mask-sink.ll | 8 +-
.../CodeGenPrepare/RISCV/cttz-ctlz.ll | 2 +-
.../SPARC/overflow-intrinsics.ll | 6 +-
.../X86/2008-11-24-RAUW-Self.ll | 2 +-
.../CodeGenPrepare/X86/bitreverse-hang.ll | 2 +-
.../X86/bitreverse-recognize.ll | 2 +-
.../CodeGenPrepare/X86/catchpad-phi-cast.ll | 2 +-
.../X86/cgp_shuffle_crash-inseltpoison.ll | 2 +-
.../CodeGenPrepare/X86/cgp_shuffle_crash.ll | 2 +-
.../CodeGenPrepare/X86/computedgoto.ll | 2 +-
.../CodeGenPrepare/X86/cttz-ctlz.ll | 6 +-
.../X86/delete-assume-dead-code.ll | 2 +-
.../CodeGenPrepare/X86/ext-logicop.ll | 2 +-
.../CodeGenPrepare/X86/extend-sink-hoist.ll | 2 +-
.../CodeGenPrepare/X86/fcmp-sinking.ll | 4 +-
.../CodeGenPrepare/X86/freeze-brcond.ll | 2 +-
.../X86/gather-scatter-opt-inseltpoison.ll | 4 +-
.../CodeGenPrepare/X86/gather-scatter-opt.ll | 2 +-
.../CodeGenPrepare/X86/gep-unmerging.ll | 2 +-
.../CodeGenPrepare/X86/icmp-swap-loop.ll | 2 +-
.../CodeGenPrepare/X86/invariant.group.ll | 2 +-
.../X86/masked-gather-struct-gep.ll | 2 +-
.../X86/memset_chk-simplify-nobuiltin.ll | 2 +-
.../CodeGenPrepare/X86/multi-extension.ll | 2 +-
.../CodeGenPrepare/X86/nonintegral.ll | 4 +-
.../CodeGenPrepare/X86/optimizeSelect-DT.ll | 2 +-
.../CodeGenPrepare/X86/overflow-intrinsics.ll | 6 +-
.../Transforms/CodeGenPrepare/X86/pr27536.ll | 2 +-
.../Transforms/CodeGenPrepare/X86/pr35658.ll | 2 +-
.../CodeGenPrepare/X86/promoted-trunc-loc.ll | 2 +-
.../X86/promoted-zext-debugloc.ll | 2 +-
.../recursively-delete-dead-instructions.ll | 2 +-
.../CodeGenPrepare/X86/remove-assume-block.ll | 2 +-
.../CodeGenPrepare/X86/section-samplepgo.ll | 2 +-
.../Transforms/CodeGenPrepare/X86/section.ll | 2 +-
.../Transforms/CodeGenPrepare/X86/select.ll | 4 +-
.../CodeGenPrepare/X86/sink-addrmode-base.ll | 4 +-
.../X86/sink-addrmode-inseltpoison.ll | 2 +-
.../X86/sink-addrmode-select.ll | 2 +-
.../X86/sink-addrmode-two-phi.ll | 2 +-
.../CodeGenPrepare/X86/sink-addrmode.ll | 2 +-
.../CodeGenPrepare/X86/sink-addrspacecast.ll | 2 +-
.../CodeGenPrepare/X86/split-indirect-loop.ll | 2 +-
.../CodeGenPrepare/X86/statepoint-relocate.ll | 2 +-
.../CodeGenPrepare/X86/switch-phi-const.ll | 2 +-
.../CodeGenPrepare/X86/tailcall-assume-xbb.ll | 2 +-
.../X86/vec-shift-inseltpoison.ll | 15 +-
.../CodeGenPrepare/X86/vec-shift.ll | 15 +-
.../CodeGenPrepare/X86/widen_switch.ll | 4 +-
.../CodeGenPrepare/X86/widenable-condition.ll | 2 +-
.../X86/x86-shuffle-sink-inseltpoison.ll | 8 +-
.../CodeGenPrepare/X86/x86-shuffle-sink.ll | 8 +-
.../CodeGenPrepare/dead-allocation.ll | 2 +-
.../Transforms/CodeGenPrepare/dom-tree.ll | 2 +-
.../CodeGenPrepare/sink-shift-and-trunc.ll | 2 +-
.../CodeGenPrepare/skip-merging-case-block.ll | 2 +-
.../Transforms/HotColdSplit/coldentrycount.ll | 2 +-
.../codegenprepare-produced-address-math.ll | 2 +-
.../pseudo-probe-selectionDAG.ll | 2 +-
.../section-accurate-samplepgo.ll | 6 +-
llvm/tools/opt/opt.cpp | 2 +-
149 files changed, 395 insertions(+), 308 deletions(-)
create mode 100644 llvm/include/llvm/CodeGen/CodeGenPrepare.h
diff --git a/llvm/include/llvm/CodeGen/CodeGenPrepare.h b/llvm/include/llvm/CodeGen/CodeGenPrepare.h
new file mode 100644
index 000000000000000..66a76257423acaf
--- /dev/null
+++ b/llvm/include/llvm/CodeGen/CodeGenPrepare.h
@@ -0,0 +1,35 @@
+//===- CodeGenPrepare.h ------------------------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+/// \file
+///
+/// Defines an IR pass for type promotion.
+///
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_CODEGEN_PREPARE_H
+#define LLVM_CODEGEN_PREPARE_H
+
+#include "llvm/IR/PassManager.h"
+
+namespace llvm {
+
+class Function;
+class TargetMachine;
+
+class CodeGenPreparePass : public PassInfoMixin<CodeGenPreparePass> {
+private:
+ const TargetMachine *TM;
+
+public:
+ CodeGenPreparePass(const TargetMachine *TM): TM(TM) { }
+ PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
+};
+
+} // end namespace llvm
+
+#endif // LLVM_CODEGEN_PREPARE_H
\ No newline at end of file
diff --git a/llvm/include/llvm/InitializePasses.h b/llvm/include/llvm/InitializePasses.h
index db653fff71ba95a..2b368b3f2552ad7 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -81,7 +81,7 @@ void initializeCallGraphPrinterLegacyPassPass(PassRegistry&);
void initializeCallGraphViewerPass(PassRegistry&);
void initializeCallGraphWrapperPassPass(PassRegistry&);
void initializeCheckDebugMachineModulePass(PassRegistry &);
-void initializeCodeGenPreparePass(PassRegistry&);
+void initializeCodeGenPrepareLegacyPass(PassRegistry&);
void initializeComplexDeinterleavingLegacyPassPass(PassRegistry&);
void initializeConstantHoistingLegacyPassPass(PassRegistry&);
void initializeCostModelAnalysisPass(PassRegistry&);
diff --git a/llvm/lib/CodeGen/CodeGen.cpp b/llvm/lib/CodeGen/CodeGen.cpp
index 6272b654b329539..4c64aee65e2b811 100644
--- a/llvm/lib/CodeGen/CodeGen.cpp
+++ b/llvm/lib/CodeGen/CodeGen.cpp
@@ -29,7 +29,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
initializeCFIFixupPass(Registry);
initializeCFIInstrInserterPass(Registry);
initializeCheckDebugMachineModulePass(Registry);
- initializeCodeGenPreparePass(Registry);
+ initializeCodeGenPrepareLegacyPass(Registry);
initializeDeadMachineInstructionElimPass(Registry);
initializeDebugifyMachineModulePass(Registry);
initializeDetectDeadLanesPass(Registry);
diff --git a/llvm/lib/CodeGen/CodeGenPrepare.cpp b/llvm/lib/CodeGen/CodeGenPrepare.cpp
index 371f6598e6b2b35..d1f08e8dde50950 100644
--- a/llvm/lib/CodeGen/CodeGenPrepare.cpp
+++ b/llvm/lib/CodeGen/CodeGenPrepare.cpp
@@ -34,6 +34,7 @@
#include "llvm/CodeGen/BasicBlockSectionsProfileReader.h"
#include "llvm/CodeGen/ISDOpcodes.h"
#include "llvm/CodeGen/MachineValueType.h"
+#include "llvm/CodeGen/CodeGenPrepare.h"
#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/CodeGen/TargetLowering.h"
#include "llvm/CodeGen/TargetPassConfig.h"
@@ -198,7 +199,7 @@ static cl::opt<bool> BBSectionsGuidedSectionPrefix(
"impacted, i.e., their prefixes will be decided by FDO/sampleFDO "
"profiles."));
-static cl::opt<uint64_t> FreqRatioToSkipMerge(
+static cl::opt<unsigned> FreqRatioToSkipMerge(
"cgp-freq-ratio-to-skip-merge", cl::Hidden, cl::init(2),
cl::desc("Skip merging empty blocks if (frequency of empty block) / "
"(frequency of destination block) is greater than this ratio"));
@@ -268,12 +269,7 @@ static cl::opt<unsigned>
MaxAddressUsersToScan("cgp-max-address-users-to-scan", cl::init(100),
cl::Hidden,
cl::desc("Max number of address users to look at"));
-
-static cl::opt<bool>
- DisableDeletePHIs("disable-cgp-delete-phis", cl::Hidden, cl::init(false),
- cl::desc("Disable elimination of dead PHI nodes."));
-
-namespace {
+namespace llvm{
enum ExtType {
ZeroExtension, // Zero extension has been seen.
@@ -301,7 +297,8 @@ using ValueToSExts = MapVector<Value *, SExts>;
class TypePromotionTransaction;
-class CodeGenPrepare : public FunctionPass {
+class CodeGenPrepare {
+ public:
const TargetMachine *TM = nullptr;
const TargetSubtargetInfo *SubtargetInfo = nullptr;
const TargetLowering *TLI = nullptr;
@@ -364,7 +361,6 @@ class CodeGenPrepare : public FunctionPass {
/// lazily and update it when required.
std::unique_ptr<DominatorTree> DT;
-public:
/// If encounter huge function, we need to limit the build time.
bool IsHugeFunc = false;
@@ -374,61 +370,6 @@ class CodeGenPrepare : public FunctionPass {
/// to insert such BB into FreshBBs for huge function.
SmallSet<BasicBlock *, 32> FreshBBs;
- static char ID; // Pass identification, replacement for typeid
-
- CodeGenPrepare() : FunctionPass(ID) {
- initializeCodeGenPreparePass(*PassRegistry::getPassRegistry());
- }
-
- bool runOnFunction(Function &F) override;
-
- void releaseMemory() override {
- // Clear per function information.
- InsertedInsts.clear();
- PromotedInsts.clear();
- FreshBBs.clear();
- BPI.reset();
- BFI.reset();
- }
-
- StringRef getPassName() const override { return "CodeGen Prepare"; }
-
- void getAnalysisUsage(AnalysisUsage &AU) const override {
- // FIXME: When we can selectively preserve passes, preserve the domtree.
- AU.addRequired<ProfileSummaryInfoWrapperPass>();
- AU.addRequired<TargetLibraryInfoWrapperPass>();
- AU.addRequired<TargetPassConfig>();
- AU.addRequired<TargetTransformInfoWrapperPass>();
- AU.addRequired<LoopInfoWrapperPass>();
- AU.addUsedIfAvailable<BasicBlockSectionsProfileReader>();
- }
-
-private:
- template <typename F>
- void resetIteratorIfInvalidatedWhileCalling(BasicBlock *BB, F f) {
- // Substituting can cause recursive simplifications, which can invalidate
- // our iterator. Use a WeakTrackingVH to hold onto it in case this
- // happens.
- Value *CurValue = &*CurInstIterator;
- WeakTrackingVH IterHandle(CurValue);
-
- f();
-
- // If the iterator instruction was recursively deleted, start over at the
- // start of the block.
- if (IterHandle != CurValue) {
- CurInstIterator = BB->begin();
- SunkAddrs.clear();
- }
- }
-
- // Get the DominatorTree, building if necessary.
- DominatorTree &getDT(Function &F) {
- if (!DT)
- DT = std::make_unique<DominatorTree>(F);
- return *DT;
- }
-
void removeAllAssertingVHReferences(Value *V);
bool eliminateAssumptions(Function &F);
bool eliminateFallThrough(Function &F, DominatorTree *DT = nullptr);
@@ -486,13 +427,84 @@ class CodeGenPrepare : public FunctionPass {
bool combineToUSubWithOverflow(CmpInst *Cmp, ModifyDT &ModifiedDT);
bool combineToUAddWithOverflow(CmpInst *Cmp, ModifyDT &ModifiedDT);
void verifyBFIUpdates(Function &F);
+
+ void releaseMemory() {
+ // Clear per function information.
+ InsertedInsts.clear();
+ PromotedInsts.clear();
+ FreshBBs.clear();
+ BPI.reset();
+ BFI.reset();
+ }
+ bool run(Function &F, const TargetMachine *TM,
+ const TargetTransformInfo &TTI,
+ LoopInfo &LI, ProfileSummaryInfo &PSI,
+ const TargetLibraryInfo &TLInfo);
+
+private:
+ template <typename F>
+ void resetIteratorIfInvalidatedWhileCalling(BasicBlock *BB, F f) {
+ // Substituting can cause recursive simplifications, which can invalidate
+ // our iterator. Use a WeakTrackingVH to hold onto it in case this
+ // happens.
+ Value *CurValue = &*CurInstIterator;
+ WeakTrackingVH IterHandle(CurValue);
+
+ f();
+
+ // If the iterator instruction was recursively deleted, start over at the
+ // start of the block.
+ if (IterHandle != CurValue) {
+ CurInstIterator = BB->begin();
+ SunkAddrs.clear();
+ }
+ }
+
+ // Get the DominatorTree, building if necessary.
+ DominatorTree &getDT(Function &F) {
+ if (!DT)
+ DT = std::make_unique<DominatorTree>(F);
+ return *DT;
+ }
+};
+
+ class CodeGenPrepareLegacy : public FunctionPass {
+ public:
+ static char ID; // Pass identification, replacement for typeid
+ bool runOnFunction(Function &F) override;
+ const TargetMachine *TM = nullptr;
+ const TargetSubtargetInfo *SubtargetInfo = nullptr;
+ const TargetLowering *TLI = nullptr;
+ const TargetRegisterInfo *TRI = nullptr;
+ const TargetTransformInfo *TTI = nullptr;
+ const BasicBlockSectionsProfileReader *BBSectionsProfileReader = nullptr;
+ const TargetLibraryInfo *TLInfo = nullptr;
+ LoopInfo *LI = nullptr;
+ std::unique_ptr<BlockFrequencyInfo> BFI;
+ std::unique_ptr<BranchProbabilityInfo> BPI;
+ ProfileSummaryInfo *PSI = nullptr;
+ StringRef getPassName() const { return "CodeGen Prepare"; }
+
+ void getAnalysisUsage(AnalysisUsage &AU) const {
+ // FIXME: When we can selectively preserve passes, preserve the domtree.
+ AU.addRequired<ProfileSummaryInfoWrapperPass>();
+ AU.addRequired<TargetLibraryInfoWrapperPass>();
+ AU.addRequired<TargetPassConfig>();
+ AU.addRequired<TargetTransformInfoWrapperPass>();
+ AU.addRequired<LoopInfoWrapperPass>();
+ AU.addUsedIfAvailable<BasicBlockSectionsProfileReader>();
+ }
+
+ CodeGenPrepareLegacy() : FunctionPass(ID) {
+ initializeCodeGenPrepareLegacyPass(*PassRegistry::getPassRegistry());
+ }
};
} // end anonymous namespace
-char CodeGenPrepare::ID = 0;
+char CodeGenPrepareLegacy::ID = 0;
-INITIALIZE_PASS_BEGIN(CodeGenPrepare, DEBUG_TYPE,
+INITIALIZE_PASS_BEGIN(CodeGenPrepareLegacy, DEBUG_TYPE,
"Optimize for code generation", false, false)
INITIALIZE_PASS_DEPENDENCY(BasicBlockSectionsProfileReader)
INITIALIZE_PASS_DEPENDENCY(LoopInfoWrapperPass)
@@ -500,58 +512,100 @@ INITIALIZE_PASS_DEPENDENCY(ProfileSummaryInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(TargetLibraryInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
INITIALIZE_PASS_DEPENDENCY(TargetTransformInfoWrapperPass)
-INITIALIZE_PASS_END(CodeGenPrepare, DEBUG_TYPE, "Optimize for code generation",
+INITIALIZE_PASS_END(CodeGenPrepareLegacy, DEBUG_TYPE, "Optimize for code generation",
false, false)
-FunctionPass *llvm::createCodeGenPreparePass() { return new CodeGenPrepare(); }
+FunctionPass *llvm::createCodeGenPreparePass() {
+ return new CodeGenPrepareLegacy();
+}
-bool CodeGenPrepare::runOnFunction(Function &F) {
+bool CodeGenPrepareLegacy::runOnFunction(Function &F) {
if (skipFunction(F))
return false;
+ auto *TPC = getAnalysisIfAvailable<TargetPassConfig>();
+ if (!TPC)
+ return false;
+
+ auto *TM = &TPC->getTM<TargetMachine>();
+ auto &TTI = getAnalysis<TargetTransformInfoWrapperPass>().getTTI(F);
+ auto &LI = getAnalysis<LoopInfoWrapperPass>().getLoopInfo();
+ auto &PSI = getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI();
+ auto &TLInfo = getAnalysis<TargetLibraryInfoWrapperPass>().getTLI(F);
+ // auto &BBSectionsProfileReader =
+ // getAnalysisIfAvailable<BasicBlockSectionsProfileReader>();
+
+ CodeGenPrepare CGP;
+ return CGP.run(F, TM, TTI, LI, PSI, TLInfo);
+}
+
+PreservedAnalyses CodeGenPreparePass::run(Function &F, FunctionAnalysisManager &AM) {
+ auto &TTI = AM.getResult<TargetIRAnalysis>(F);
+ auto &LI = AM.getResult<LoopAnalysis>(F);
+ auto &PSI = AM.getResult<ProfileSummaryAnalysis>(F);
+ auto &TLInfo = AM.getResult<TargetLibraryAnalysis>(F);
+// auto &BasicBlockSectionsProfileReader = AM.getResult<BasicBlockSectionsProfileReader>(F);
+
+ CodeGenPrepare CGP;
+ bool Changed = CGP.run(F, TM, TTI, LI, PSI, TLInfo);
+ if (!Changed)
+ return PreservedAnalyses::all();
+ PreservedAnalyses PA;
+ PA.preserveSet<CFGAnalyses>();
+ PA.preserve<LoopAnalysis>();
+ return PA;
+}
+
+bool CodeGenPrepare::run(Function &F, const TargetMachine *TM,
+ const TargetTransformInfo &TTI,
+ LoopInfo &LI, ProfileSummaryInfo &PSI,
+ const TargetLibraryInfo &TLInfo) {
+ if (DisableBranchOpts)
+ return false;
DL = &F.getParent()->getDataLayout();
bool EverMadeChange = false;
- TM = &getAnalysis<TargetPassConfig>().getTM<TargetMachine>();
+ // TM = &getAnalysisUsage<TargetPassConfig>().getTM<TargetMachine>();
SubtargetInfo = TM->getSubtargetImpl(F);
TLI = SubtargetInfo->getTargetLowering();
TRI = SubtargetInfo->getRegisterInfo();
- TLInfo = &getAnalysis<TargetLibraryInfoWrapperPass>().getTLI(F);
- TTI = &getAnalysis<TargetTransformInfoWrapperPass>().getTTI(F);
- LI = &getAnalysis<LoopInfoWrapperPass>().getLoopInfo();
- BPI.reset(new BranchProbabilityInfo(F, *LI));
- BFI.reset(new BlockFrequencyInfo(F, *BPI, *LI));
- PSI = &getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI();
- BBSectionsProfileReader =
- getAnalysisIfAvailable<BasicBlockSectionsProfileReader>();
+ // TLInfo = &getAnalysis<TargetLibraryInfoWrapperPass>().getTLI(F);
+ // TTI = &getAnalysis<TargetTransformInfoWrapperPass>().getTTI(F);
+ // LI = &getAnalysis<LoopInfoWrapperPass>().getLoopInfo();
+ BPI.reset(new BranchProbabilityInfo(F, LI));
+ BFI.reset(new BlockFrequencyInfo(F, *BPI, LI));
+ // PSI = &getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI();
+ // BBSectionsProfileReader =
+ // getAnalysisIfAvailable<BasicBlockSectionsProfileReader>();
OptSize = F.hasOptSize();
// Use the basic-block-sections profile to promote hot functions to .text.hot
// if requested.
if (BBSectionsGuidedSectionPrefix && BBSectionsProfileReader &&
BBSectionsProfileReader->isFunctionHot(F.getName())) {
F.setSectionPrefix("hot");
- } else if (ProfileGuidedSectionPrefix) {
+ }
+ else if (ProfileGuidedSectionPrefix) {
// The hot attribute overwrites profile count based hotness while profile
// counts based hotness overwrite the cold attribute.
// This is a conservative behabvior.
if (F.hasFnAttribute(Attribute::Hot) ||
- PSI->isFunctionHotInCallGraph(&F, *BFI))
+ PSI.isFunctionHotInCallGraph(&F, *BFI))
F.setSectionPrefix("hot");
// If PSI shows this function is not hot, we will placed the function
// into unlikely section if (1) PSI shows this is a cold function, or
// (2) the function has a attribute of cold.
- else if (PSI->isFunctionColdInCallGraph(&F, *BFI) ||
+ else if (PSI.isFunctionColdInCallGraph(&F, *BFI) ||
F.hasFnAttribute(Attribute::Cold))
F.setSectionPrefix("unlikely");
- else if (ProfileUnknownInSpecialSection && PSI->hasPartialSampleProfile() &&
- PSI->isFunctionHotnessUnknown(F))
+ else if (ProfileUnknownInSpecialSection && PSI.hasPartialSampleProfile() &&
+ PSI.isFunctionHotnessUnknown(F))
F.setSectionPrefix("unknown");
}
/// This optimization identifies DIV instructions that can be
/// profitably bypassed and carried out with a shorter, faster divide.
- if (!OptSize && !PSI->hasHugeWorkingSetSize() && TLI->isSlowDivBypassed()) {
+ if (!OptSize && !PSI.hasHugeWorkingSetSize() && TLI->isSlowDivBypassed()) {
const DenseMap<unsigned int, unsigned int> &BypassWidths =
TLI->getBypassSlowDivWidths();
BasicBlock *BB = &*F.begin();
@@ -560,7 +614,7 @@ bool CodeGenPrepare::runOnFunction(Function &F) {
// optimization to those blocks.
BasicBlock *Next = BB->getNextNode();
// F.hasOptSize is already checked in the outer if statement.
- if (!llvm::shouldOptimizeForSize(BB, PSI, BFI.get()))
+ if (!llvm::shouldOptimizeForSize(BB, &PSI, BFI.get()))
EverMadeChange |= bypassSlowDivision(BB, BypassWidths);
BB = Next;
}
@@ -590,8 +644,8 @@ bool CodeGenPrepare::runOnFunction(Function &F) {
// Transformations above may invalidate dominator tree and/or loop info.
DT.reset();
- LI->releaseMemory();
- LI->analyze(getDT(F));
+ LI.releaseMemory();
+ LI.analyze(getDT(F));
bool MadeChange = true;
bool FuncIterated = false;
@@ -883,12 +937,8 @@ bool CodeGenPrepare::eliminateMostlyEmptyBlocks(Function &F) {
// as we remove them.
// Note that this intentionally skips the entry block.
SmallVector<WeakTrackingVH, 16> Blocks;
- for (auto &Block : llvm::drop_begin(F)) {
- // Delete phi nodes that could block deleting other empty blocks.
- if (!DisableDeletePHIs)
- MadeChange |= DeleteDeadPHIs(&Block, TLInfo);
+ for (auto &Block : llvm::drop_begin(F))
Blocks.push_back(&Block);
- }
for (auto &Block : Blocks) {
BasicBlock *BB = cast_or_null<BasicBlock>(Block);
@@ -986,8 +1036,8 @@ bool CodeGenPrepare::isMergingEmptyBlockProfitable(BasicBlock *BB,
DestBB == findDestBlockOfMergeableEmptyBlock(SameValueBB))
BBFreq += BFI->getBlockFreq(SameValueBB);
- std::optional<BlockFrequency> Limit = BBFreq.mul(FreqRatioToSkipMerge);
- return !Limit || PredFreq <= *Limit;
+ return PredFreq.getFrequency() <=
+ BBFreq.getFrequency() * FreqRatioToSkipMerge;
}
/// Return true if we can merge BB into DestBB if there is a single
@@ -1209,7 +1259,6 @@ simplifyRelocatesOffABase(GCRelocateInst *RelocatedBase,
if (RI->getStatepoint() == RelocatedBase->getStatepoint())
if (RI->getBasePtrIndex() == RelocatedBase->getBasePtrIndex()) {
RelocatedBase->moveBefore(RI);
- MadeChange = true;
break;
}
@@ -2263,7 +2312,7 @@ static bool despeculateCountZeros(IntrinsicInst *CountZeros,
// Create a PHI in the end block to select either the output of the intrinsic
// or the bit width of the operand.
- Builder.SetInsertPoint(EndBlock, EndBlock->begin());
+ Builder.SetInsertPoint(&EndBlock->front());
PHINode *PN = Builder.CreatePHI(Ty, 2, "ctz");
replaceAllUsesWith(CountZeros, PN, FreshBBs, IsHugeFunc);
Value *BitWidth = Builder.getInt(APInt(SizeInBits, SizeInBits));
@@ -2609,7 +2658,7 @@ bool CodeGenPrepare::dupRetToEnableTailCallOpts(BasicBlock *BB,
// Memory Optimization
//===----------------------------------------------------------------------===//
-namespace {
+namespace llvm {
/// This is an extended version of TargetLowering::AddrMode
/// which holds actual Value*'s for register values.
@@ -2780,7 +2829,7 @@ LLVM_DUMP_METHOD void ExtAddrMode::dump() const {
} // end anonymous namespace
-namespace {
+namespace llvm{
/// This class provides transaction based operation on the IR.
/// Every change made through this class is recorded in the internal state and
@@ -3283,7 +3332,7 @@ void TypePromotionTransaction::rollback(
}
}
-namespace {
+namespace llvm {
/// A helper class for matching addressing modes.
///
@@ -4209,7 +4258,7 @@ static bool isPromotedInstructionLegal(const TargetLowering &TLI,
ISDOpcode, TLI.getValueType(DL, PromotedInst->getType()));
}
-namespace {
+namespace llvm{
/// Hepler class to perform type promotion.
class TypePromotionHelper {
@@ -6304,7 +6353,7 @@ bool CodeGenPrepare::optimizePhiType(
// correct type.
ValueToValueMap ValMap;
for (ConstantData *C : Constants)
- ValMap[C] = ConstantExpr::getBitCast(C, ConvertTy);
+ ValMap[C] = ConstantExpr::getCast(Instruction::BitCast, C, ConvertTy);
for (Instruction *D : Defs) {
if (isa<BitCastInst>(D)) {
ValMap[D] = D->getOperand(0);
@@ -7096,8 +7145,7 @@ bool CodeGenPrepare::optimizeSelectInst(SelectInst *SI) {
// to get the PHI operand.
for (SelectInst *SI : llvm::reverse(ASI)) {
// The select itself is replaced with a PHI Node.
- PHINode *PN = PHINode::Create(SI->getType(), 2, "");
- PN->insertBefore(EndBlock->begin());
+ PHINode *PN = PHINode::Create(SI->getType(), 2, "", &EndBlock->front());
PN->takeName(SI);
PN->addIncoming(getTrueOrFalseValue(SI, true, INS), TrueBlock);
PN->addIncoming(getTrueOrFalseValue(SI, false, INS), FalseBlock);
@@ -7369,7 +7417,7 @@ bool CodeGenPrepare::optimizeSwitchInst(SwitchInst *SI) {
return Changed;
}
-namespace {
+namespace llvm{
/// Helper class to promote a scalar operation to a vector one.
/// This class is used to move downward extractelement transition.
diff --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp
index 985ff88139323c6..101ddee2b4aede7 100644
--- a/llvm/lib/Passes/PassBuilder.cpp
+++ b/llvm/lib/Passes/PassBuilder.cpp
@@ -72,6 +72,7 @@
#include "llvm/Analysis/TargetTransformInfo.h"
#include "llvm/Analysis/TypeBasedAliasAnalysis.h"
#include "llvm/Analysis/UniformityAnalysis.h"
+#include "llvm/CodeGen/CodeGenPrepare.h"
#include "llvm/CodeGen/HardwareLoops.h"
#include "llvm/CodeGen/TypePromotion.h"
#include "llvm/IR/DebugInfo.h"
diff --git a/llvm/lib/Passes/PassRegistry.def b/llvm/lib/Passes/PassRegistry.def
index df9f14920f29161..237e21adfd16ea1 100644
--- a/llvm/lib/Passes/PassRegistry.def
+++ b/llvm/lib/Passes/PassRegistry.def
@@ -310,6 +310,7 @@ FUNCTION_PASS("bdce", BDCEPass())
FUNCTION_PASS("bounds-checking", BoundsCheckingPass())
FUNCTION_PASS("break-crit-edges", BreakCriticalEdgesPass())
FUNCTION_PASS("callsite-splitting", CallSiteSplittingPass())
+FUNCTION_PASS("codegenprepare", CodeGenPreparePass(TM))
FUNCTION_PASS("consthoist", ConstantHoistingPass())
FUNCTION_PASS("count-visits", CountVisitsPass())
FUNCTION_PASS("constraint-elimination", ConstraintEliminationPass())
diff --git a/llvm/test/CodeGen/AArch64/aarch64-codegen-prepare-atp.ll b/llvm/test/CodeGen/AArch64/aarch64-codegen-prepare-atp.ll
index 92f29dac13fa414..a2c3855aa6f714f 100644
--- a/llvm/test/CodeGen/AArch64/aarch64-codegen-prepare-atp.ll
+++ b/llvm/test/CodeGen/AArch64/aarch64-codegen-prepare-atp.ll
@@ -1,4 +1,4 @@
-; RUN: opt -codegenprepare < %s -S | FileCheck %s
+; RUN: opt -passes=codegenprepare < %s -S | FileCheck %s
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--linux-gnu"
diff --git a/llvm/test/CodeGen/AArch64/and-sink.ll b/llvm/test/CodeGen/AArch64/and-sink.ll
index f4e9551259e4e64..7d1d306ecb4af80 100644
--- a/llvm/test/CodeGen/AArch64/and-sink.ll
+++ b/llvm/test/CodeGen/AArch64/and-sink.ll
@@ -1,6 +1,6 @@
; RUN: llc -mtriple=aarch64-linux-gnu -verify-machineinstrs < %s | FileCheck %s
-; RUN: opt -S -codegenprepare -mtriple=aarch64-linux %s | FileCheck --check-prefix=CHECK-CGP %s
-; RUN: opt -S -codegenprepare -cgpp-huge-func=0 -mtriple=aarch64-linux %s | FileCheck --check-prefix=CHECK-CGP %s
+; RUN: opt -S -passes=codegenprepare -mtriple=aarch64-linux %s | FileCheck --check-prefix=CHECK-CGP %s
+; RUN: opt -S -passes=codegenprepare -cgpp-huge-func=0 -mtriple=aarch64-linux %s | FileCheck --check-prefix=CHECK-CGP %s
@A = dso_local global i32 zeroinitializer
@B = dso_local global i32 zeroinitializer
diff --git a/llvm/test/CodeGen/AArch64/arm64-bitfield-extract.ll b/llvm/test/CodeGen/AArch64/arm64-bitfield-extract.ll
index 6041904dc0f3102..2516fedafb533bf 100644
--- a/llvm/test/CodeGen/AArch64/arm64-bitfield-extract.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-bitfield-extract.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -codegenprepare -mtriple=arm64-apple=ios -S -o - %s | FileCheck --check-prefix=OPT %s
+; RUN: opt -passes=codegenprepare -mtriple=arm64-apple=ios -S -o - %s | FileCheck --check-prefix=OPT %s
; RUN: llc < %s -mtriple=arm64-eabi | FileCheck --check-prefix=LLC %s
%struct.X = type { i8, i8, [2 x i8] }
diff --git a/llvm/test/CodeGen/AArch64/arm64-codegen-prepare-extload.ll b/llvm/test/CodeGen/AArch64/arm64-codegen-prepare-extload.ll
index 889a76b37ebe1cc..77b2b35b7066fbc 100644
--- a/llvm/test/CodeGen/AArch64/arm64-codegen-prepare-extload.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-codegen-prepare-extload.ll
@@ -1,6 +1,6 @@
-; RUN: opt -codegenprepare < %s -mtriple=aarch64-apple-ios -S | FileCheck -enable-var-scope %s --check-prefix=OPTALL --check-prefix=OPT --check-prefix=NONSTRESS
-; RUN: opt -codegenprepare < %s -mtriple=aarch64-apple-ios -S -stress-cgp-ext-ld-promotion | FileCheck -enable-var-scope %s --check-prefix=OPTALL --check-prefix=OPT --check-prefix=STRESS
-; RUN: opt -codegenprepare < %s -mtriple=aarch64-apple-ios -S -disable-cgp-ext-ld-promotion | FileCheck -enable-var-scope %s --check-prefix=OPTALL --check-prefix=DISABLE
+; RUN: opt -passes=codegenprepare < %s -mtriple=aarch64-apple-ios -S | FileCheck -enable-var-scope %s --check-prefix=OPTALL --check-prefix=OPT --check-prefix=NONSTRESS
+; RUN: opt -passes=codegenprepare < %s -mtriple=aarch64-apple-ios -S -stress-cgp-ext-ld-promotion | FileCheck -enable-var-scope %s --check-prefix=OPTALL --check-prefix=OPT --check-prefix=STRESS
+; RUN: opt -passes=codegenprepare < %s -mtriple=aarch64-apple-ios -S -disable-cgp-ext-ld-promotion | FileCheck -enable-var-scope %s --check-prefix=OPTALL --check-prefix=DISABLE
; CodeGenPrepare should move the zext into the block with the load
; so that SelectionDAG can select it with the load.
diff --git a/llvm/test/CodeGen/AArch64/arm64_32-gep-sink.ll b/llvm/test/CodeGen/AArch64/arm64_32-gep-sink.ll
index 1a9c5974a547a81..0cef23361296fc6 100644
--- a/llvm/test/CodeGen/AArch64/arm64_32-gep-sink.ll
+++ b/llvm/test/CodeGen/AArch64/arm64_32-gep-sink.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3
-; RUN: opt -codegenprepare -mtriple=arm64_32-apple-ios %s -S -o - | FileCheck %s
+; RUN: opt -passes=codegenprepare -mtriple=arm64_32-apple-ios %s -S -o - | FileCheck %s
define void @test_simple_sink(ptr %base, i64 %offset) {
; CHECK-LABEL: define void @test_simple_sink(
diff --git a/llvm/test/CodeGen/AArch64/cgp-trivial-phi-node.ll b/llvm/test/CodeGen/AArch64/cgp-trivial-phi-node.ll
index 98b820709e829f1..a74a11ed99130e2 100644
--- a/llvm/test/CodeGen/AArch64/cgp-trivial-phi-node.ll
+++ b/llvm/test/CodeGen/AArch64/cgp-trivial-phi-node.ll
@@ -1,5 +1,5 @@
; Checks that case when GEP is bound to trivial PHI node is correctly handled.
-; RUN: opt %s -mtriple=aarch64-linux-gnu -codegenprepare -S -o - | FileCheck %s
+; RUN: opt %s -mtriple=aarch64-linux-gnu -passes=codegenprepare -S -o - | FileCheck %s
; CHECK: define void @crash(ptr %s, i32 %n) {
; CHECK-NEXT: entry:
diff --git a/llvm/test/CodeGen/AArch64/convertphitype.ll b/llvm/test/CodeGen/AArch64/convertphitype.ll
index a5fc46d2abcaaf9..5e68e48ee859e2c 100644
--- a/llvm/test/CodeGen/AArch64/convertphitype.ll
+++ b/llvm/test/CodeGen/AArch64/convertphitype.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -codegenprepare -cgp-optimize-phi-types %s -S | FileCheck %s
+; RUN: opt -passes=codegenprepare -cgp-optimize-phi-types %s -S | FileCheck %s
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--linux-gnu"
diff --git a/llvm/test/CodeGen/AArch64/scalable-vector-promotion.ll b/llvm/test/CodeGen/AArch64/scalable-vector-promotion.ll
index e6ab52dc9e61909..4a4b5b30977de82 100644
--- a/llvm/test/CodeGen/AArch64/scalable-vector-promotion.ll
+++ b/llvm/test/CodeGen/AArch64/scalable-vector-promotion.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -mtriple=aarch64 -codegenprepare -S < %s | FileCheck %s
+; RUN: opt -mtriple=aarch64 -passes=codegenprepare -S < %s | FileCheck %s
; This test intends to check vector promotion for scalable vector. Current target lowering
; rejects scalable vector before reaching getConstantVector() in CodeGenPrepare. This test
diff --git a/llvm/test/CodeGen/AArch64/sve-vscale.ll b/llvm/test/CodeGen/AArch64/sve-vscale.ll
index fa48808ff7f8199..0ee5cb8707f157a 100644
--- a/llvm/test/CodeGen/AArch64/sve-vscale.ll
+++ b/llvm/test/CodeGen/AArch64/sve-vscale.ll
@@ -1,5 +1,5 @@
; RUN: llc -mtriple aarch64 -mattr=+sve -asm-verbose=0 < %s | FileCheck %s
-; RUN: opt -mtriple=aarch64 -codegenprepare -S < %s | llc -mtriple=aarch64 -mattr=+sve -asm-verbose=0 | FileCheck %s
+; RUN: opt -mtriple=aarch64 -passes=codegenprepare -S < %s | llc -mtriple=aarch64 -mattr=+sve -asm-verbose=0 | FileCheck %s
;
; RDVL
diff --git a/llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll b/llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll
index 3005b17e0524c6a..d9866749d506532 100644
--- a/llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll
+++ b/llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: opt -S -codegenprepare -mtriple=amdgcn-unknown-unknown -mcpu=bonaire < %s | FileCheck --check-prefixes=OPT,OPT-GFX7 %s
-; RUN: opt -S -codegenprepare -mtriple=amdgcn-unknown-unknown -mcpu=tonga < %s | FileCheck --check-prefixes=OPT,OPT-GFX8 %s
-; RUN: opt -S -codegenprepare -mtriple=amdgcn-unknown-unknown -mcpu=gfx900 < %s | FileCheck --check-prefixes=OPT,OPT-GFX9 %s
-; RUN: opt -S -codegenprepare -mtriple=amdgcn-unknown-unknown -mcpu=gfx1030 < %s | FileCheck --check-prefixes=OPT,OPT-GFX10 %s
+; RUN: opt -S -passes=codegenprepare -mtriple=amdgcn-unknown-unknown -mcpu=bonaire < %s | FileCheck --check-prefixes=OPT,OPT-GFX7 %s
+; RUN: opt -S -passes=codegenprepare -mtriple=amdgcn-unknown-unknown -mcpu=tonga < %s | FileCheck --check-prefixes=OPT,OPT-GFX8 %s
+; RUN: opt -S -passes=codegenprepare -mtriple=amdgcn-unknown-unknown -mcpu=gfx900 < %s | FileCheck --check-prefixes=OPT,OPT-GFX9 %s
+; RUN: opt -S -passes=codegenprepare -mtriple=amdgcn-unknown-unknown -mcpu=gfx1030 < %s | FileCheck --check-prefixes=OPT,OPT-GFX10 %s
; RUN: llc -march=amdgcn -mcpu=bonaire < %s | FileCheck --check-prefix=GFX7 %s
; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck --check-prefix=GFX8 %s
diff --git a/llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll b/llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll
index aee6f0e82d251c9..3dfa8c5ffaae0a6 100644
--- a/llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll
+++ b/llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: opt -S -codegenprepare -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1030 < %s | FileCheck -check-prefix=OPT %s
+; RUN: opt -S -passes=codegenprepare -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1030 < %s | FileCheck -check-prefix=OPT %s
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1030 < %s | FileCheck -check-prefix=GCN %s
; Make sure we match the addressing mode offset of csub intrinsics across blocks.
diff --git a/llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll b/llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll
index 494b4b5c48ba9e2..5a7eb23c235cbeb 100644
--- a/llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll
+++ b/llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: opt -S -codegenprepare -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 < %s | FileCheck -check-prefix=OPT %s
+; RUN: opt -S -passes=codegenprepare -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 < %s | FileCheck -check-prefix=OPT %s
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 < %s | FileCheck -check-prefix=GCN %s
; Make sure we match the addressing mode offset of globla.atomic.fadd intrinsics across blocks.
diff --git a/llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll b/llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
index 0e61547c27b453b..166e0549078f1ac 100644
--- a/llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
+++ b/llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
@@ -1,7 +1,7 @@
-; RUN: opt -S -codegenprepare -mtriple=amdgcn-unknown-unknown -mcpu=tahiti < %s | FileCheck -check-prefix=OPT -check-prefix=OPT-SI -check-prefix=OPT-SICIVI %s
-; RUN: opt -S -codegenprepare -mtriple=amdgcn-unknown-unknown -mcpu=bonaire < %s | FileCheck -check-prefix=OPT -check-prefix=OPT-CI -check-prefix=OPT-SICIVI %s
-; RUN: opt -S -codegenprepare -mtriple=amdgcn-unknown-unknown -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck -check-prefix=OPT -check-prefix=OPT-VI -check-prefix=OPT-SICIVI %s
-; RUN: opt -S -codegenprepare -mtriple=amdgcn-unknown-unknown -mcpu=gfx900 < %s | FileCheck -check-prefix=OPT -check-prefix=OPT-GFX9 %s
+; RUN: opt -S -passes=codegenprepare -mtriple=amdgcn-unknown-unknown -mcpu=tahiti < %s | FileCheck -check-prefix=OPT -check-prefix=OPT-SI -check-prefix=OPT-SICIVI %s
+; RUN: opt -S -passes=codegenprepare -mtriple=amdgcn-unknown-unknown -mcpu=bonaire < %s | FileCheck -check-prefix=OPT -check-prefix=OPT-CI -check-prefix=OPT-SICIVI %s
+; RUN: opt -S -passes=codegenprepare -mtriple=amdgcn-unknown-unknown -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck -check-prefix=OPT -check-prefix=OPT-VI -check-prefix=OPT-SICIVI %s
+; RUN: opt -S -passes=codegenprepare -mtriple=amdgcn-unknown-unknown -mcpu=gfx900 < %s | FileCheck -check-prefix=OPT -check-prefix=OPT-GFX9 %s
; RUN: llc -march=amdgcn -mcpu=tahiti -mattr=-promote-alloca -amdgpu-scalarize-global-loads=false < %s | FileCheck -check-prefix=GCN -check-prefix=SI -check-prefix=SICIVI %s
; RUN: llc -march=amdgcn -mcpu=bonaire -mattr=-promote-alloca -amdgpu-scalarize-global-loads=false < %s | FileCheck -check-prefix=GCN -check-prefix=CI -check-prefix=SICIVI %s
; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -amdgpu-scalarize-global-loads=false -mattr=-promote-alloca < %s | FileCheck -check-prefix=GCN -check-prefix=VI -check-prefix=SICIVI %s
diff --git a/llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll b/llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
index 46602976f13f6c0..d00003178977d7a 100644
--- a/llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
+++ b/llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
@@ -1,5 +1,5 @@
-; RUN: opt -S -mtriple=amdgcn-- -codegenprepare < %s | FileCheck -check-prefix=OPT %s
-; RUN: opt -S -mtriple=amdgcn-- -mcpu=tonga -mattr=-flat-for-global -codegenprepare < %s | FileCheck -check-prefix=OPT %s
+; RUN: opt -S -mtriple=amdgcn-- < %s | FileCheck -check-prefix=OPT %s
+; RUN: opt -S -mtriple=amdgcn-- -mcpu=tonga -mattr=-flat-for-global -passes=codegenprepare < %s | FileCheck -check-prefix=OPT %s
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=SI %s
; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
diff --git a/llvm/test/CodeGen/AMDGPU/codegen-prepare-addrmode-sext.ll b/llvm/test/CodeGen/AMDGPU/codegen-prepare-addrmode-sext.ll
index 31e1ace2bb11c48..2ff1ad8c8b7c27b 100644
--- a/llvm/test/CodeGen/AMDGPU/codegen-prepare-addrmode-sext.ll
+++ b/llvm/test/CodeGen/AMDGPU/codegen-prepare-addrmode-sext.ll
@@ -1,4 +1,4 @@
-; RUN: opt -mtriple=amdgcn-- -codegenprepare -S < %s | FileCheck -check-prefix=OPT %s
+; RUN: opt -mtriple=amdgcn-- -passes=codegenprepare -S < %s | FileCheck -check-prefix=OPT %s
; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI-LLC %s
; OPT-LABEL: @test(
diff --git a/llvm/test/CodeGen/AMDGPU/tail-call-cgp.ll b/llvm/test/CodeGen/AMDGPU/tail-call-cgp.ll
index 8292fdc7861354d..8a1651a9b75121e 100644
--- a/llvm/test/CodeGen/AMDGPU/tail-call-cgp.ll
+++ b/llvm/test/CodeGen/AMDGPU/tail-call-cgp.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -codegenprepare %s | FileCheck %s
+; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=codegenprepare %s | FileCheck %s
define internal fastcc void @callee(ptr nocapture %p, i32 %a) #0 {
store volatile i32 %a, ptr %p, align 4
diff --git a/llvm/test/CodeGen/ARM/vector-promotion.ll b/llvm/test/CodeGen/ARM/vector-promotion.ll
index 3e314306ff08309..3a70ee6ff10f1b8 100644
--- a/llvm/test/CodeGen/ARM/vector-promotion.ll
+++ b/llvm/test/CodeGen/ARM/vector-promotion.ll
@@ -1,5 +1,5 @@
-; RUN: opt -codegenprepare -mtriple=thumbv7-apple-ios %s -o - -mattr=+neon -S | FileCheck --check-prefix=IR-BOTH --check-prefix=IR-NORMAL %s
-; RUN: opt -codegenprepare -mtriple=thumbv7-apple-ios %s -o - -mattr=+neon -S -stress-cgp-store-extract | FileCheck --check-prefix=IR-BOTH --check-prefix=IR-STRESS %s
+; RUN: opt -passes=codegenprepare -mtriple=thumbv7-apple-ios %s -o - -mattr=+neon -S | FileCheck --check-prefix=IR-BOTH --check-prefix=IR-NORMAL %s
+; RUN: opt -passes=codegenprepare -mtriple=thumbv7-apple-ios %s -o - -mattr=+neon -S -stress-cgp-store-extract | FileCheck --check-prefix=IR-BOTH --check-prefix=IR-STRESS %s
; RUN: llc -mtriple=thumbv7-apple-ios %s -o - -mattr=+neon | FileCheck --check-prefix=ASM %s
; IR-BOTH-LABEL: @simpleOneInstructionPromotion
diff --git a/llvm/test/CodeGen/Generic/addr-sink-call-multi-arg.ll b/llvm/test/CodeGen/Generic/addr-sink-call-multi-arg.ll
index b02bdc3b5724236..5ecda88603e891b 100644
--- a/llvm/test/CodeGen/Generic/addr-sink-call-multi-arg.ll
+++ b/llvm/test/CodeGen/Generic/addr-sink-call-multi-arg.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -codegenprepare < %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare < %s | FileCheck %s
; REQUIRES: aarch64-registered-target
; Check that we don't give up if unable to sink the first argument.
diff --git a/llvm/test/CodeGen/Generic/addr-use-count.ll b/llvm/test/CodeGen/Generic/addr-use-count.ll
index 00943b5a58e2bc5..875a84e36b33993 100644
--- a/llvm/test/CodeGen/Generic/addr-use-count.ll
+++ b/llvm/test/CodeGen/Generic/addr-use-count.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -codegenprepare < %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare < %s | FileCheck %s
; REQUIRES: aarch64-registered-target
; Test that `%addr` is sunk, after we've increased limit on the number of the memory uses to scan.
diff --git a/llvm/test/CodeGen/PowerPC/splitstore-check-volatile.ll b/llvm/test/CodeGen/PowerPC/splitstore-check-volatile.ll
index 271e1e39c8dfd21..d554e6e83f1b28b 100644
--- a/llvm/test/CodeGen/PowerPC/splitstore-check-volatile.ll
+++ b/llvm/test/CodeGen/PowerPC/splitstore-check-volatile.ll
@@ -1,6 +1,6 @@
; Test that CodeGenPrepare respect the volatile flag when splitting a store.
;
-; RUN: opt -S -mtriple=powerpc64le -codegenprepare -force-split-store < %s | FileCheck %s
+; RUN: opt -S -mtriple=powerpc64le -passes=codegenprepare -force-split-store < %s | FileCheck %s
define void @fun(ptr %Src, ptr %Dst) {
; CHECK: store volatile i16 %8, ptr %Dst
diff --git a/llvm/test/CodeGen/X86/and-sink.ll b/llvm/test/CodeGen/X86/and-sink.ll
index 965e84844758fc0..e4fc348d72b8241 100644
--- a/llvm/test/CodeGen/X86/and-sink.ll
+++ b/llvm/test/CodeGen/X86/and-sink.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=i686-unknown -verify-machineinstrs < %s | FileCheck %s
-; RUN: opt < %s -codegenprepare -S -mtriple=x86_64-unknown-unknown | FileCheck --check-prefix=CHECK-CGP %s
-; RUN: opt < %s -codegenprepare -cgpp-huge-func=0 -S -mtriple=x86_64-unknown-unknown | FileCheck --check-prefix=CHECK-CGP %s
+; RUN: opt < %s -passes=codegenprepare -S -mtriple=x86_64-unknown-unknown | FileCheck --check-prefix=CHECK-CGP %s
+; RUN: opt < %s -passes=codegenprepare -cgpp-huge-func=0 -S -mtriple=x86_64-unknown-unknown | FileCheck --check-prefix=CHECK-CGP %s
@A = global i32 zeroinitializer
@B = global i32 zeroinitializer
diff --git a/llvm/test/CodeGen/X86/callbr-codegenprepare.ll b/llvm/test/CodeGen/X86/callbr-codegenprepare.ll
index 854cc4bf7a9cc34..94ab1ed8050e659 100644
--- a/llvm/test/CodeGen/X86/callbr-codegenprepare.ll
+++ b/llvm/test/CodeGen/X86/callbr-codegenprepare.ll
@@ -1,4 +1,4 @@
-;; RUN: opt -S -codegenprepare < %s | FileCheck %s
+;; RUN: opt -S -passes=codegenprepare < %s | FileCheck %s
;; Ensure that codegenprepare (via InstSimplify) doesn't eliminate the
;; phi here (which would cause a module verification error).
diff --git a/llvm/test/CodeGen/X86/codegen-prepare-addrmode-sext.ll b/llvm/test/CodeGen/X86/codegen-prepare-addrmode-sext.ll
index 6e95c91e7398932..630c45ce7f1a762 100644
--- a/llvm/test/CodeGen/X86/codegen-prepare-addrmode-sext.ll
+++ b/llvm/test/CodeGen/X86/codegen-prepare-addrmode-sext.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -codegenprepare %s -o - | FileCheck %s
+; RUN: opt -S -passes=codegenprepare %s -o - | FileCheck %s
; This file tests the different cases what are involved when codegen prepare
; tries to get sign/zero extension out of the way of addressing mode.
; This tests require an actual target as addressing mode decisions depends
diff --git a/llvm/test/CodeGen/X86/codegen-prepare-cast.ll b/llvm/test/CodeGen/X86/codegen-prepare-cast.ll
index c55d53258bebad3..a4931f8826cd2ad 100644
--- a/llvm/test/CodeGen/X86/codegen-prepare-cast.ll
+++ b/llvm/test/CodeGen/X86/codegen-prepare-cast.ll
@@ -1,6 +1,6 @@
; RUN: llc < %s
; PR4297
-; RUN: opt -S < %s -codegenprepare | FileCheck %s
+; RUN: opt -S < %s -passes=codegenprepare | FileCheck %s
target datalayout =
"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
diff --git a/llvm/test/CodeGen/X86/codegen-prepare-extload.ll b/llvm/test/CodeGen/X86/codegen-prepare-extload.ll
index 6695576c557aa5e..2ded4edf95ac19a 100644
--- a/llvm/test/CodeGen/X86/codegen-prepare-extload.ll
+++ b/llvm/test/CodeGen/X86/codegen-prepare-extload.ll
@@ -1,8 +1,8 @@
; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-win64 | FileCheck %s
-; RUN: opt -codegenprepare < %s -mtriple=x86_64-apple-macosx -S | FileCheck %s --check-prefix=OPTALL --check-prefix=OPT --check-prefix=NONSTRESS
-; RUN: opt -codegenprepare < %s -mtriple=x86_64-apple-macosx -S -stress-cgp-ext-ld-promotion | FileCheck %s --check-prefix=OPTALL --check-prefix=OPT --check-prefix=STRESS
-; RUN: opt -codegenprepare < %s -mtriple=x86_64-apple-macosx -S -disable-cgp-ext-ld-promotion | FileCheck %s --check-prefix=OPTALL --check-prefix=DISABLE
+; RUN: opt -passes=codegenprepare < %s -mtriple=x86_64-apple-macosx -S | FileCheck %s --check-prefix=OPTALL --check-prefix=OPT --check-prefix=NONSTRESS
+; RUN: opt -passes=codegenprepare < %s -mtriple=x86_64-apple-macosx -S -stress-cgp-ext-ld-promotion | FileCheck %s --check-prefix=OPTALL --check-prefix=OPT --check-prefix=STRESS
+; RUN: opt -passes=codegenprepare < %s -mtriple=x86_64-apple-macosx -S -disable-cgp-ext-ld-promotion | FileCheck %s --check-prefix=OPTALL --check-prefix=DISABLE
; rdar://7304838
; CodeGenPrepare should move the zext into the block with the load
diff --git a/llvm/test/CodeGen/X86/codegen-prepare-oob-shl.ll b/llvm/test/CodeGen/X86/codegen-prepare-oob-shl.ll
index 2d39b3edb06a9cf..a18206be38343c1 100644
--- a/llvm/test/CodeGen/X86/codegen-prepare-oob-shl.ll
+++ b/llvm/test/CodeGen/X86/codegen-prepare-oob-shl.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -mtriple i686-unknown-unknown -codegenprepare -S | FileCheck %s
+; RUN: opt < %s -mtriple i686-unknown-unknown -passes=codegenprepare -S | FileCheck %s
target datalayout = "e-p:8:8"
diff --git a/llvm/test/CodeGen/X86/convertphitype.ll b/llvm/test/CodeGen/X86/convertphitype.ll
index df01612252bf147..c2d61c0e8958d08 100644
--- a/llvm/test/CodeGen/X86/convertphitype.ll
+++ b/llvm/test/CodeGen/X86/convertphitype.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -codegenprepare -cgp-optimize-phi-types=true %s -S | FileCheck %s
+; RUN: opt -passes=codegenprepare -cgp-optimize-phi-types=true %s -S | FileCheck %s
target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
target triple = "i386-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/dont-remove-empty-preheader.ll b/llvm/test/CodeGen/X86/dont-remove-empty-preheader.ll
index 48939cd8b0dc52f..4285ab4afa8874f 100644
--- a/llvm/test/CodeGen/X86/dont-remove-empty-preheader.ll
+++ b/llvm/test/CodeGen/X86/dont-remove-empty-preheader.ll
@@ -1,4 +1,4 @@
-; RUN: opt -mtriple=x86_64 -codegenprepare -S < %s | FileCheck %s
+; RUN: opt -mtriple=x86_64 -passes=codegenprepare -S < %s | FileCheck %s
; CHECK: for.body.preheader
@N = common global i32 0, align 4
diff --git a/llvm/test/CodeGen/X86/overflowing-iv.ll b/llvm/test/CodeGen/X86/overflowing-iv.ll
index e6b53f25f0e79eb..51fe690886d393c 100644
--- a/llvm/test/CodeGen/X86/overflowing-iv.ll
+++ b/llvm/test/CodeGen/X86/overflowing-iv.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -mtriple=x86_64-linux -codegenprepare -S | FileCheck %s
+; RUN: opt < %s -mtriple=x86_64-linux -passes=codegenprepare -S | FileCheck %s
; No overflow flags, same type width.
define i32 @test_01(ptr %p, i64 %len, i32 %x) {
diff --git a/llvm/test/CodeGen/X86/pr49466.ll b/llvm/test/CodeGen/X86/pr49466.ll
index 164d3f4c238428a..8bd8d6f97f41318 100644
--- a/llvm/test/CodeGen/X86/pr49466.ll
+++ b/llvm/test/CodeGen/X86/pr49466.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -codegenprepare -S | FileCheck %s
+; RUN: opt < %s -passes=codegenprepare -S | FileCheck %s
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/pr58538.ll b/llvm/test/CodeGen/X86/pr58538.ll
index 6c4103718950ea6..b499d28ac90d820 100644
--- a/llvm/test/CodeGen/X86/pr58538.ll
+++ b/llvm/test/CodeGen/X86/pr58538.ll
@@ -1,5 +1,5 @@
-; RUN: opt -codegenprepare -mtriple=x86_64 %s -S -o - | FileCheck %s
-; RUN: opt -codegenprepare -mtriple=i386 %s -S -o - | FileCheck %s
+; RUN: opt -passes=codegenprepare -mtriple=x86_64 %s -S -o - | FileCheck %s
+; RUN: opt -passes=codegenprepare -mtriple=i386 %s -S -o - | FileCheck %s
define i32 @f(i32 %0) {
; CHECK-LABEL: @f
diff --git a/llvm/test/CodeGen/X86/select_meta.ll b/llvm/test/CodeGen/X86/select_meta.ll
index e89008406f1ca4a..7d5ef6fcba562b7 100644
--- a/llvm/test/CodeGen/X86/select_meta.ll
+++ b/llvm/test/CodeGen/X86/select_meta.ll
@@ -1,4 +1,4 @@
-; RUN: opt -mtriple=x86_64-unknown-unknown -codegenprepare -S < %s 2>&1 | FileCheck %s
+; RUN: opt -mtriple=x86_64-unknown-unknown -passes=codegenprepare -S < %s 2>&1 | FileCheck %s
; Function Attrs: norecurse nounwind readnone uwtable
define i32 @foo(i32, i32, i32) {
diff --git a/llvm/test/CodeGen/X86/sink-gep-before-mem-inst.ll b/llvm/test/CodeGen/X86/sink-gep-before-mem-inst.ll
index 98df3ce467e9f34..e2988f1967909c0 100644
--- a/llvm/test/CodeGen/X86/sink-gep-before-mem-inst.ll
+++ b/llvm/test/CodeGen/X86/sink-gep-before-mem-inst.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s -S -codegenprepare -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: opt < %s -S -passes=codegenprepare -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
define i64 @test.after(ptr addrspace(1) readonly align 8) {
; CHECK-LABEL: test.after
diff --git a/llvm/test/CodeGen/X86/tailcall-cgp-dup.ll b/llvm/test/CodeGen/X86/tailcall-cgp-dup.ll
index d8fdce63fecdde1..de41bef5d67aa1b 100644
--- a/llvm/test/CodeGen/X86/tailcall-cgp-dup.ll
+++ b/llvm/test/CodeGen/X86/tailcall-cgp-dup.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
-; RUN: opt -S -codegenprepare %s -mtriple=x86_64-apple-darwin -o - | FileCheck %s --check-prefix OPT
+; RUN: opt -S -passes=codegenprepare %s -mtriple=x86_64-apple-darwin -o - | FileCheck %s --check-prefix OPT
; Teach CGP to dup returns to enable tail call optimization.
; rdar://9147433
diff --git a/llvm/test/CodeGen/X86/tailcall-extract.ll b/llvm/test/CodeGen/X86/tailcall-extract.ll
index c3597a8e5b99ea1..48d785ab1da78e9 100644
--- a/llvm/test/CodeGen/X86/tailcall-extract.ll
+++ b/llvm/test/CodeGen/X86/tailcall-extract.ll
@@ -1,5 +1,5 @@
; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s
-; RUN: opt -codegenprepare -S -mtriple=x86_64-linux < %s | FileCheck %s --check-prefix OPT
+; RUN: opt -passes=codegenprepare -S -mtriple=x86_64-linux < %s | FileCheck %s --check-prefix OPT
; The exit block containing extractvalue can be duplicated into the BB
diff --git a/llvm/test/CodeGen/X86/uadd_inc_iv.ll b/llvm/test/CodeGen/X86/uadd_inc_iv.ll
index b18914420013773..91cedeb72d1d0ee 100644
--- a/llvm/test/CodeGen/X86/uadd_inc_iv.ll
+++ b/llvm/test/CodeGen/X86/uadd_inc_iv.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -mtriple=x86_64-linux -codegenprepare -S < %s | FileCheck %s
+; RUN: opt -mtriple=x86_64-linux -passes=codegenprepare -S < %s | FileCheck %s
declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64)
diff --git a/llvm/test/CodeGen/X86/usub_inc_iv.ll b/llvm/test/CodeGen/X86/usub_inc_iv.ll
index 88bfddb51f2d492..d2445a66673feb1 100644
--- a/llvm/test/CodeGen/X86/usub_inc_iv.ll
+++ b/llvm/test/CodeGen/X86/usub_inc_iv.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -mtriple=x86_64-linux -codegenprepare -S < %s | FileCheck %s
+; RUN: opt -mtriple=x86_64-linux -passes=codegenprepare -S < %s | FileCheck %s
define i32 @test_01(ptr %p, i64 %len, i32 %x) {
; CHECK-LABEL: @test_01(
diff --git a/llvm/test/DebugInfo/ARM/salvage-debug-info.ll b/llvm/test/DebugInfo/ARM/salvage-debug-info.ll
index 3717abada42e192..7b89a18f36ee8d0 100644
--- a/llvm/test/DebugInfo/ARM/salvage-debug-info.ll
+++ b/llvm/test/DebugInfo/ARM/salvage-debug-info.ll
@@ -1,4 +1,4 @@
-; RUN: opt -codegenprepare -S %s -o - | FileCheck %s
+; RUN: opt -passes=codegenprepare -S %s -o - | FileCheck %s
; typedef struct info {
; unsigned long long size;
; } info_t;
diff --git a/llvm/test/DebugInfo/X86/bitcast-di.ll b/llvm/test/DebugInfo/X86/bitcast-di.ll
index f599cc9ca7db3e0..6068c0a485bf90f 100644
--- a/llvm/test/DebugInfo/X86/bitcast-di.ll
+++ b/llvm/test/DebugInfo/X86/bitcast-di.ll
@@ -1,4 +1,4 @@
-; RUN: opt -mtriple=x86_64-unknown-linux-gnu -S -debugify -codegenprepare < %s | FileCheck %s
+; RUN: opt -mtriple=x86_64-unknown-linux-gnu -S -debugify -passes=codegenprepare < %s | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/DebugInfo/X86/codegenprep-value.ll b/llvm/test/DebugInfo/X86/codegenprep-value.ll
index 52087b619dc8980..8f46283acfa34b4 100644
--- a/llvm/test/DebugInfo/X86/codegenprep-value.ll
+++ b/llvm/test/DebugInfo/X86/codegenprep-value.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -mtriple=x86_64 -codegenprepare %s | FileCheck %s
+; RUN: opt -S -mtriple=x86_64 -passes=codegenprepare %s | FileCheck %s
;
; Generated from the following source with:
; clang -O2 -g -S -emit-llvm -mllvm -stop-after=indirectbr-expand test.cpp
diff --git a/llvm/test/DebugInfo/X86/sunk-compare.ll b/llvm/test/DebugInfo/X86/sunk-compare.ll
index 5ca164ccb26ec6f..0c30e4415f6ebaf 100644
--- a/llvm/test/DebugInfo/X86/sunk-compare.ll
+++ b/llvm/test/DebugInfo/X86/sunk-compare.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -mtriple=x86_64 -codegenprepare < %s | FileCheck %s
+; RUN: opt -S -mtriple=x86_64 -passes=codegenprepare < %s | FileCheck %s
;
; This test case has been generated by hand but is inspired by the
; observation that compares that are sunk into the basic blocks where
diff --git a/llvm/test/DebugInfo/X86/zextload.ll b/llvm/test/DebugInfo/X86/zextload.ll
index 888e230c258dae8..f3bbe47a0cd9a32 100644
--- a/llvm/test/DebugInfo/X86/zextload.ll
+++ b/llvm/test/DebugInfo/X86/zextload.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -codegenprepare < %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare < %s | FileCheck %s
;
; This test case was generated from the following source code:
;
diff --git a/llvm/test/Other/X86/2007-04-24-eliminate-mostly-empty-blocks.ll b/llvm/test/Other/X86/2007-04-24-eliminate-mostly-empty-blocks.ll
index a6a8e101108d75d..5e99dcc09e83686 100644
--- a/llvm/test/Other/X86/2007-04-24-eliminate-mostly-empty-blocks.ll
+++ b/llvm/test/Other/X86/2007-04-24-eliminate-mostly-empty-blocks.ll
@@ -1,4 +1,4 @@
-;RUN: opt < %s -codegenprepare -S -mtriple=x86_64 | FileCheck %s
+;RUN: opt < %s -passes=codegenprepare -S -mtriple=x86_64 | FileCheck %s
;CHECK: define void @foo()
;CHECK-NEXT: entry:
diff --git a/llvm/test/Other/codegenprepare-and-debug.ll b/llvm/test/Other/codegenprepare-and-debug.ll
index 9023e8f219976ff..531ca2977b23a1d 100644
--- a/llvm/test/Other/codegenprepare-and-debug.ll
+++ b/llvm/test/Other/codegenprepare-and-debug.ll
@@ -1,5 +1,5 @@
-; RUN: opt -codegenprepare -S < %s | FileCheck %s
-; RUN: opt -strip-debug -codegenprepare -S < %s | FileCheck %s
+; RUN: opt -passes=codegenprepare -S < %s | FileCheck %s
+; RUN: opt -strip-debug -passes=codegenprepare -S < %s | FileCheck %s
; REQUIRES: x86-registered-target
; In its current state, CodeGenPrepare should not optimize empty blocks after a switch
diff --git a/llvm/test/Other/opt-legacy-syntax-deprecation.ll b/llvm/test/Other/opt-legacy-syntax-deprecation.ll
index 50162b333524e00..48921a71e6ce082 100644
--- a/llvm/test/Other/opt-legacy-syntax-deprecation.ll
+++ b/llvm/test/Other/opt-legacy-syntax-deprecation.ll
@@ -4,7 +4,7 @@
; RUN: opt /dev/null -disable-output -passes=instcombine 2>&1 | FileCheck %s --check-prefix=OK --allow-empty
; RUN: not opt /dev/null -disable-output -instcombine 2>&1 | FileCheck %s --check-prefix=WARN
; RUN: not opt /dev/null -disable-output -instcombine -always-inline 2>&1 | FileCheck %s --check-prefix=WARN
-; RUN: opt /dev/null -disable-output -codegenprepare -mtriple=x86_64-unknown-linux-gnu 2>&1 | FileCheck %s --check-prefix=OK --allow-empty
+; RUN: opt /dev/null -disable-output -passes=codegenprepare -mtriple=x86_64-unknown-linux-gnu 2>&1 | FileCheck %s --check-prefix=OK --allow-empty
; OK-NOT: deprecated
diff --git a/llvm/test/Transforms/CodeGenPrepare/AArch64/combine-address-mode.ll b/llvm/test/Transforms/CodeGenPrepare/AArch64/combine-address-mode.ll
index 91194864c013fa5..1364533c3b225e6 100644
--- a/llvm/test/Transforms/CodeGenPrepare/AArch64/combine-address-mode.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/AArch64/combine-address-mode.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -codegenprepare -mtriple=aarch64-none-linux-gnu < %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare -mtriple=aarch64-none-linux-gnu < %s | FileCheck %s
@_MergedGlobals = external dso_local global <{ i32, i32 }>, align 4
diff --git a/llvm/test/Transforms/CodeGenPrepare/AArch64/free-zext.ll b/llvm/test/Transforms/CodeGenPrepare/AArch64/free-zext.ll
index adb13f1a4c9fc9d..d853a31dca506e5 100644
--- a/llvm/test/Transforms/CodeGenPrepare/AArch64/free-zext.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/AArch64/free-zext.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -codegenprepare -mtriple=aarch64-linux %s | FileCheck -enable-var-scope %s
+; RUN: opt -S -passes=codegenprepare -mtriple=aarch64-linux %s | FileCheck -enable-var-scope %s
; Test for CodeGenPrepare::optimizeLoadExt(): simple case: two loads
; feeding a phi that zext's each loaded value.
diff --git a/llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt-inseltpoison.ll b/llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt-inseltpoison.ll
index 0114d7f9f409199..2dd53d6572fc7e7 100644
--- a/llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt-inseltpoison.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt-inseltpoison.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -codegenprepare < %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare < %s | FileCheck %s
target triple = "aarch64-unknown-linux-gnu"
diff --git a/llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt.ll b/llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt.ll
index e4c5b4ceee5428c..565666971c44045 100644
--- a/llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -codegenprepare < %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare < %s | FileCheck %s
target triple = "aarch64-unknown-linux-gnu"
diff --git a/llvm/test/Transforms/CodeGenPrepare/AArch64/overflow-intrinsics.ll b/llvm/test/Transforms/CodeGenPrepare/AArch64/overflow-intrinsics.ll
index 4caf6d0dc89313d..e5e04466e7918b7 100644
--- a/llvm/test/Transforms/CodeGenPrepare/AArch64/overflow-intrinsics.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/AArch64/overflow-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -codegenprepare -S < %s | FileCheck %s
-; RUN: opt -enable-debugify -codegenprepare -S < %s 2>&1 | FileCheck %s -check-prefix=DEBUG
+; RUN: opt -passes=codegenprepare -S < %s | FileCheck %s
+; RUN: opt -enable-debugify -passes=codegenprepare -S < %s 2>&1 | FileCheck %s -check-prefix=DEBUG
; Subset of tests from llvm/tests/Transforms/CodeGenPrepare/X86/overflow-intrinsics.ll
; to test shouldFormOverflowOp on SPARC, where it is not profitable to create
@@ -167,5 +167,5 @@ define i1 @usubo_ult_i64_math_overflow_used(i64 %x, i64 %y, ptr %p) {
ret i1 %ov
}
-; Check that every instruction inserted by -codegenprepare has a debug location.
+; Check that every instruction inserted by -passes=codegenprepare has a debug location.
; DEBUG: CheckModuleDebugify: PASS
diff --git a/llvm/test/Transforms/CodeGenPrepare/AArch64/sink-free-instructions-inseltpoison.ll b/llvm/test/Transforms/CodeGenPrepare/AArch64/sink-free-instructions-inseltpoison.ll
index 566f195fc4010f8..86ea23fb1355cd4 100644
--- a/llvm/test/Transforms/CodeGenPrepare/AArch64/sink-free-instructions-inseltpoison.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/AArch64/sink-free-instructions-inseltpoison.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -codegenprepare -S | FileCheck %s
+; RUN: opt < %s -passes=codegenprepare -S | FileCheck %s
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown"
diff --git a/llvm/test/Transforms/CodeGenPrepare/AArch64/sink-free-instructions.ll b/llvm/test/Transforms/CodeGenPrepare/AArch64/sink-free-instructions.ll
index f29054bd062113b..538c3f680466c4a 100644
--- a/llvm/test/Transforms/CodeGenPrepare/AArch64/sink-free-instructions.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/AArch64/sink-free-instructions.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -codegenprepare -S | FileCheck --check-prefixes=CHECK,NOFP16 %s
-; RUN: opt < %s -codegenprepare -S -mattr=+fullfp16 | FileCheck --check-prefixes=CHECK,FULLFP16 %s
+; RUN: opt < %s -passes=codegenprepare -S | FileCheck --check-prefixes=CHECK,NOFP16 %s
+; RUN: opt < %s -passes=codegenprepare -S -mattr=+fullfp16 | FileCheck --check-prefixes=CHECK,FULLFP16 %s
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown"
diff --git a/llvm/test/Transforms/CodeGenPrepare/AArch64/trunc-weird-user.ll b/llvm/test/Transforms/CodeGenPrepare/AArch64/trunc-weird-user.ll
index 6a8b5733889e4a7..3160bb0c0158599 100644
--- a/llvm/test/Transforms/CodeGenPrepare/AArch64/trunc-weird-user.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/AArch64/trunc-weird-user.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -codegenprepare -mtriple=arm64-apple-ios7.0 %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare -mtriple=arm64-apple-ios7.0 %s | FileCheck %s
%foo = type { i8 }
diff --git a/llvm/test/Transforms/CodeGenPrepare/AArch64/widen_switch.ll b/llvm/test/Transforms/CodeGenPrepare/AArch64/widen_switch.ll
index cae1cc54a9615c6..e0f907dac2314c9 100644
--- a/llvm/test/Transforms/CodeGenPrepare/AArch64/widen_switch.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/AArch64/widen_switch.ll
@@ -1,6 +1,6 @@
;; AArch64 is arbitralily chosen as a 32/64-bit RISC representative to show the transform in all tests.
-; RUN: opt < %s -codegenprepare -S -mtriple=aarch64-unknown-unknown | FileCheck %s --check-prefix=ARM64
+; RUN: opt < %s -passes=codegenprepare -S -mtriple=aarch64-unknown-unknown | FileCheck %s --check-prefix=ARM64
; AArch64 widens to 32-bit.
diff --git a/llvm/test/Transforms/CodeGenPrepare/AArch64/zext-to-shuffle.ll b/llvm/test/Transforms/CodeGenPrepare/AArch64/zext-to-shuffle.ll
index 60b1e81e3dcd339..2a206d8212e25fe 100644
--- a/llvm/test/Transforms/CodeGenPrepare/AArch64/zext-to-shuffle.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/AArch64/zext-to-shuffle.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -codegenprepare -S %s | FileCheck %s
+; RUN: opt -passes=codegenprepare -S %s | FileCheck %s
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "arm64-apple-ios"
diff --git a/llvm/test/Transforms/CodeGenPrepare/AMDGPU/addressing-modes.ll b/llvm/test/Transforms/CodeGenPrepare/AMDGPU/addressing-modes.ll
index acd40d744f71785..183adf146f83ab6 100644
--- a/llvm/test/Transforms/CodeGenPrepare/AMDGPU/addressing-modes.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/AMDGPU/addressing-modes.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -codegenprepare -mtriple=amdgcn--amdhsa < %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare -mtriple=amdgcn--amdhsa < %s | FileCheck %s
define amdgpu_kernel void @test_sink_as999_small_max_mubuf_offset(ptr addrspace(999) %out, ptr addrspace(999) %in) {
; CHECK-LABEL: @test_sink_as999_small_max_mubuf_offset(
diff --git a/llvm/test/Transforms/CodeGenPrepare/AMDGPU/bypass-slow-div-debug-info-inseltpoison.ll b/llvm/test/Transforms/CodeGenPrepare/AMDGPU/bypass-slow-div-debug-info-inseltpoison.ll
index 8c198a3c7d607b6..a6982ce4fdb6a3b 100644
--- a/llvm/test/Transforms/CodeGenPrepare/AMDGPU/bypass-slow-div-debug-info-inseltpoison.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/AMDGPU/bypass-slow-div-debug-info-inseltpoison.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -codegenprepare %s | FileCheck %s
+; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=codegenprepare %s | FileCheck %s
; Make sure BypassSlowDivision doesn't drop debug info
define i64 @sdiv64(i64 %a, i64 %b) {
diff --git a/llvm/test/Transforms/CodeGenPrepare/AMDGPU/bypass-slow-div-debug-info.ll b/llvm/test/Transforms/CodeGenPrepare/AMDGPU/bypass-slow-div-debug-info.ll
index cf2d96214a54c2f..15d2cf9a951a673 100644
--- a/llvm/test/Transforms/CodeGenPrepare/AMDGPU/bypass-slow-div-debug-info.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/AMDGPU/bypass-slow-div-debug-info.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -codegenprepare %s | FileCheck %s
+; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=codegenprepare %s | FileCheck %s
; Make sure BypassSlowDivision doesn't drop debug info
define i64 @sdiv64(i64 %a, i64 %b) {
diff --git a/llvm/test/Transforms/CodeGenPrepare/AMDGPU/no-sink-addrspacecast.ll b/llvm/test/Transforms/CodeGenPrepare/AMDGPU/no-sink-addrspacecast.ll
index 63098ab098a2264..f2471d2a490fb10 100644
--- a/llvm/test/Transforms/CodeGenPrepare/AMDGPU/no-sink-addrspacecast.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/AMDGPU/no-sink-addrspacecast.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -codegenprepare -mtriple=amdgcn-unknown-unknown < %s | FileCheck -check-prefix=ASC -check-prefix=COMMON %s
+; RUN: opt -S -passes=codegenprepare -mtriple=amdgcn-unknown-unknown < %s | FileCheck -check-prefix=ASC -check-prefix=COMMON %s
; COMMON-LABEL: @test_sink_ptrtoint_asc(
; ASC: addrspacecast
diff --git a/llvm/test/Transforms/CodeGenPrepare/AMDGPU/sink-addrspacecast.ll b/llvm/test/Transforms/CodeGenPrepare/AMDGPU/sink-addrspacecast.ll
index be7ae0ef3f42c6f..46457157a6582e7 100644
--- a/llvm/test/Transforms/CodeGenPrepare/AMDGPU/sink-addrspacecast.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/AMDGPU/sink-addrspacecast.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3
-; RUN: opt -S -codegenprepare -mtriple=amdgcn--amdhsa < %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare -mtriple=amdgcn--amdhsa < %s | FileCheck %s
define i64 @no_sink_local_to_flat(i1 %pred, ptr addrspace(3) %ptr) {
; CHECK-LABEL: define i64 @no_sink_local_to_flat(
diff --git a/llvm/test/Transforms/CodeGenPrepare/ARM/bitreverse-recognize.ll b/llvm/test/Transforms/CodeGenPrepare/ARM/bitreverse-recognize.ll
index d272fef54d7e30a..782c3c038c78fb0 100644
--- a/llvm/test/Transforms/CodeGenPrepare/ARM/bitreverse-recognize.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/ARM/bitreverse-recognize.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -loop-unroll -codegenprepare < %s | FileCheck %s
+; RUN: opt -S -loop-unroll -passes=codegenprepare < %s | FileCheck %s
target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
target triple = "armv7--linux-gnueabihf"
diff --git a/llvm/test/Transforms/CodeGenPrepare/ARM/branch-on-zero.ll b/llvm/test/Transforms/CodeGenPrepare/ARM/branch-on-zero.ll
index 996cab1d1d2c444..2a4cc7676ffea02 100644
--- a/llvm/test/Transforms/CodeGenPrepare/ARM/branch-on-zero.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/ARM/branch-on-zero.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -codegenprepare < %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare < %s | FileCheck %s
target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
target triple = "thumbv8.1m.main-none-eabi"
diff --git a/llvm/test/Transforms/CodeGenPrepare/ARM/dead-gep.ll b/llvm/test/Transforms/CodeGenPrepare/ARM/dead-gep.ll
index 52c06fd52b7b332..16b1d606dd9c935 100644
--- a/llvm/test/Transforms/CodeGenPrepare/ARM/dead-gep.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/ARM/dead-gep.ll
@@ -1,4 +1,4 @@
-; RUN: opt -codegenprepare -S %s -o - | FileCheck %s
+; RUN: opt -passes=codegenprepare -S %s -o - | FileCheck %s
target triple = "thumbv7-apple-ios7.0.0"
diff --git a/llvm/test/Transforms/CodeGenPrepare/ARM/memory-intrinsics.ll b/llvm/test/Transforms/CodeGenPrepare/ARM/memory-intrinsics.ll
index ae76dbda4aa152e..e0a436ae9d37e98 100644
--- a/llvm/test/Transforms/CodeGenPrepare/ARM/memory-intrinsics.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/ARM/memory-intrinsics.ll
@@ -1,4 +1,4 @@
-; RUN: opt -codegenprepare -mtriple=arm7-unknown-unknown -S < %s | FileCheck %s
+; RUN: opt -passes=codegenprepare -mtriple=arm7-unknown-unknown -S < %s | FileCheck %s
declare void @llvm.memcpy.p0.p0.i32(ptr, ptr, i32, i1) nounwind
declare void @llvm.memmove.p0.p0.i32(ptr, ptr, i32, i1) nounwind
diff --git a/llvm/test/Transforms/CodeGenPrepare/ARM/overflow-intrinsics.ll b/llvm/test/Transforms/CodeGenPrepare/ARM/overflow-intrinsics.ll
index 3fbc21331410d09..4665c8a551a08e5 100644
--- a/llvm/test/Transforms/CodeGenPrepare/ARM/overflow-intrinsics.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/ARM/overflow-intrinsics.ll
@@ -1,4 +1,4 @@
-; RUN: opt -codegenprepare -S < %s | FileCheck %s
+; RUN: opt -passes=codegenprepare -S < %s | FileCheck %s
target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
target triple = "thumbv8m.main-arm-none-eabi"
diff --git a/llvm/test/Transforms/CodeGenPrepare/ARM/sink-add-mul-shufflevector-inseltpoison.ll b/llvm/test/Transforms/CodeGenPrepare/ARM/sink-add-mul-shufflevector-inseltpoison.ll
index 2199faff2d99370..66043d12e9b102a 100644
--- a/llvm/test/Transforms/CodeGenPrepare/ARM/sink-add-mul-shufflevector-inseltpoison.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/ARM/sink-add-mul-shufflevector-inseltpoison.ll
@@ -1,4 +1,4 @@
-; RUN: opt -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp < %s -codegenprepare -S | FileCheck -check-prefix=CHECK %s
+; RUN: opt -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp < %s -passes=codegenprepare -S | FileCheck -check-prefix=CHECK %s
define void @sink_add_mul(ptr %s1, i32 %x, ptr %d, i32 %n) {
; CHECK-LABEL: @sink_add_mul(
diff --git a/llvm/test/Transforms/CodeGenPrepare/ARM/sink-add-mul-shufflevector.ll b/llvm/test/Transforms/CodeGenPrepare/ARM/sink-add-mul-shufflevector.ll
index acc58edbcc2fa17..940679db5d6aec3 100644
--- a/llvm/test/Transforms/CodeGenPrepare/ARM/sink-add-mul-shufflevector.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/ARM/sink-add-mul-shufflevector.ll
@@ -1,4 +1,4 @@
-; RUN: opt -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp < %s -codegenprepare -S | FileCheck -check-prefix=CHECK %s
+; RUN: opt -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp < %s -passes=codegenprepare -S | FileCheck -check-prefix=CHECK %s
define void @sink_add_mul(ptr %s1, i32 %x, ptr %d, i32 %n) {
; CHECK-LABEL: @sink_add_mul(
diff --git a/llvm/test/Transforms/CodeGenPrepare/ARM/sink-addrmode.ll b/llvm/test/Transforms/CodeGenPrepare/ARM/sink-addrmode.ll
index 838486aa2486041..4f8d96ca3dfcb00 100644
--- a/llvm/test/Transforms/CodeGenPrepare/ARM/sink-addrmode.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/ARM/sink-addrmode.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -codegenprepare -mtriple=thumbv7m -disable-complex-addr-modes=false -addr-sink-new-select=true -addr-sink-new-phis=true < %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare -mtriple=thumbv7m -disable-complex-addr-modes=false -addr-sink-new-select=true -addr-sink-new-phis=true < %s | FileCheck %s
target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
diff --git a/llvm/test/Transforms/CodeGenPrepare/ARM/sink-free-instructions-inseltpoison.ll b/llvm/test/Transforms/CodeGenPrepare/ARM/sink-free-instructions-inseltpoison.ll
index f9d702cea28dfa7..2a8559919e099c7 100644
--- a/llvm/test/Transforms/CodeGenPrepare/ARM/sink-free-instructions-inseltpoison.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/ARM/sink-free-instructions-inseltpoison.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -mtriple=armv7-apple-darwin < %s -codegenprepare -S | FileCheck -check-prefix=NEON %s
-; RUN: opt -mtriple=armv6-unknown-linux < %s -codegenprepare -S | FileCheck -check-prefix=NONEON %s
+; RUN: opt -mtriple=armv7-apple-darwin < %s -passes=codegenprepare -S | FileCheck -check-prefix=NEON %s
+; RUN: opt -mtriple=armv6-unknown-linux < %s -passes=codegenprepare -S | FileCheck -check-prefix=NONEON %s
define <8 x i16> @sink_zext(<8 x i8> %a, <8 x i8> %b, i1 %c) {
; NEON-LABEL: @sink_zext(
diff --git a/llvm/test/Transforms/CodeGenPrepare/ARM/sink-free-instructions.ll b/llvm/test/Transforms/CodeGenPrepare/ARM/sink-free-instructions.ll
index 2a4323339a3421e..5dc80c46a0ffbf7 100644
--- a/llvm/test/Transforms/CodeGenPrepare/ARM/sink-free-instructions.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/ARM/sink-free-instructions.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -mtriple=armv7-apple-darwin < %s -codegenprepare -S | FileCheck -check-prefix=NEON %s
-; RUN: opt -mtriple=armv6-unknown-linux < %s -codegenprepare -S | FileCheck -check-prefix=NONEON %s
+; RUN: opt -mtriple=armv7-apple-darwin < %s -passes=codegenprepare -S | FileCheck -check-prefix=NEON %s
+; RUN: opt -mtriple=armv6-unknown-linux < %s -passes=codegenprepare -S | FileCheck -check-prefix=NONEON %s
define <8 x i16> @sink_zext(<8 x i8> %a, <8 x i8> %b, i1 %c) {
; NEON-LABEL: @sink_zext(
diff --git a/llvm/test/Transforms/CodeGenPrepare/ARM/sinkchain-inseltpoison.ll b/llvm/test/Transforms/CodeGenPrepare/ARM/sinkchain-inseltpoison.ll
index aac8161dd03f81a..e733fe348624901 100644
--- a/llvm/test/Transforms/CodeGenPrepare/ARM/sinkchain-inseltpoison.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/ARM/sinkchain-inseltpoison.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp < %s -codegenprepare -S | FileCheck -check-prefix=CHECK %s
-; RUN: opt -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp < %s -codegenprepare -cgpp-huge-func=0 -S | FileCheck -check-prefix=CHECK %s
+; RUN: opt -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp < %s -passes=codegenprepare -S | FileCheck -check-prefix=CHECK %s
+; RUN: opt -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp < %s -passes=codegenprepare -cgpp-huge-func=0 -S | FileCheck -check-prefix=CHECK %s
; Sink the shufflevector/insertelement pair, followed by the trunc. The sunk instruction end up dead.
define signext i8 @dead(ptr noalias nocapture readonly %s1, i16 zeroext %x, ptr noalias nocapture %d, i32 %n) {
diff --git a/llvm/test/Transforms/CodeGenPrepare/ARM/sinkchain.ll b/llvm/test/Transforms/CodeGenPrepare/ARM/sinkchain.ll
index 7dcee1c88c480b9..19b5815e3496c1b 100644
--- a/llvm/test/Transforms/CodeGenPrepare/ARM/sinkchain.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/ARM/sinkchain.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp < %s -codegenprepare -S | FileCheck -check-prefix=CHECK %s
-; RUN: opt -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp < %s -codegenprepare -cgpp-huge-func=0 -S | FileCheck -check-prefix=CHECK %s
+; RUN: opt -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp < %s -passes=codegenprepare -S | FileCheck -check-prefix=CHECK %s
+; RUN: opt -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp < %s -passes=codegenprepare -cgpp-huge-func=0 -S | FileCheck -check-prefix=CHECK %s
; Sink the shufflevector/insertelement pair, followed by the trunc. The sunk instruction end up dead.
define signext i8 @dead(ptr noalias nocapture readonly %s1, i16 zeroext %x, ptr noalias nocapture %d, i32 %n) {
diff --git a/llvm/test/Transforms/CodeGenPrepare/ARM/splitgep.ll b/llvm/test/Transforms/CodeGenPrepare/ARM/splitgep.ll
index cd2087d941497a9..d4a74d44f3c4d38 100644
--- a/llvm/test/Transforms/CodeGenPrepare/ARM/splitgep.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/ARM/splitgep.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -codegenprepare %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare %s | FileCheck %s
target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
target triple = "thumbv6m-arm-none-eabi"
diff --git a/llvm/test/Transforms/CodeGenPrepare/ARM/tailcall-dup.ll b/llvm/test/Transforms/CodeGenPrepare/ARM/tailcall-dup.ll
index 76b119fe36aa6ad..3eaa8a29031dc36 100644
--- a/llvm/test/Transforms/CodeGenPrepare/ARM/tailcall-dup.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/ARM/tailcall-dup.ll
@@ -1,4 +1,4 @@
-; RUN: opt -codegenprepare -S < %s | FileCheck %s
+; RUN: opt -passes=codegenprepare -S < %s | FileCheck %s
target triple = "armv8m.main-none-eabi"
diff --git a/llvm/test/Transforms/CodeGenPrepare/Mips/pr35209.ll b/llvm/test/Transforms/CodeGenPrepare/Mips/pr35209.ll
index 9f2555e22b620c8..775efc6eff0f48f 100644
--- a/llvm/test/Transforms/CodeGenPrepare/Mips/pr35209.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/Mips/pr35209.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -mtriple=mips64-mti-linux-gnu -codegenprepare < %s | FileCheck %s
+; RUN: opt -S -mtriple=mips64-mti-linux-gnu -passes=codegenprepare < %s | FileCheck %s
; Test that if an address that was sunk from a dominating bb, used in a
; select that is erased along with its' trivally dead operand, that the
diff --git a/llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-constant-numerator.ll b/llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-constant-numerator.ll
index 94adf1970938ea9..19ef65ff6393561 100644
--- a/llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-constant-numerator.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-constant-numerator.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -codegenprepare < %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare < %s | FileCheck %s
target datalayout = "e-i64:64-v16:16-v32:32-n16:32:64"
target triple = "nvptx64-nvidia-cuda"
diff --git a/llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-not-exact.ll b/llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-not-exact.ll
index c571da4411e76b8..31a9d322823aacb 100644
--- a/llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-not-exact.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-not-exact.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -codegenprepare < %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare < %s | FileCheck %s
target datalayout = "e-i64:64-v16:16-v32:32-n16:32:64"
target triple = "nvptx64-nvidia-cuda"
diff --git a/llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-special-cases.ll b/llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-special-cases.ll
index 21e47c614ad0521..a83f23930f299df 100644
--- a/llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-special-cases.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-special-cases.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -codegenprepare < %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare < %s | FileCheck %s
target datalayout = "e-i64:64-v16:16-v32:32-n16:32:64"
target triple = "nvptx64-nvidia-cuda"
diff --git a/llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div.ll b/llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div.ll
index 424f7c3b027154e..8a4f937e7efc626 100644
--- a/llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -codegenprepare < %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare < %s | FileCheck %s
target datalayout = "e-i64:64-v16:16-v32:32-n16:32:64"
target triple = "nvptx64-nvidia-cuda"
diff --git a/llvm/test/Transforms/CodeGenPrepare/NVPTX/dont-introduce-addrspacecast.ll b/llvm/test/Transforms/CodeGenPrepare/NVPTX/dont-introduce-addrspacecast.ll
index 17b0dbf81ac205b..7101db6e5281c1e 100644
--- a/llvm/test/Transforms/CodeGenPrepare/NVPTX/dont-introduce-addrspacecast.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/NVPTX/dont-introduce-addrspacecast.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -codegenprepare < %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare < %s | FileCheck %s
target datalayout = "e-i64:64-v16:16-v32:32-n16:32:64"
target triple = "nvptx64-nvidia-cuda"
diff --git a/llvm/test/Transforms/CodeGenPrepare/NVPTX/dont-sink-nop-addrspacecast.ll b/llvm/test/Transforms/CodeGenPrepare/NVPTX/dont-sink-nop-addrspacecast.ll
index 374f30dba508751..cf0732025d908e8 100644
--- a/llvm/test/Transforms/CodeGenPrepare/NVPTX/dont-sink-nop-addrspacecast.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/NVPTX/dont-sink-nop-addrspacecast.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -codegenprepare < %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare < %s | FileCheck %s
target datalayout = "e-i64:64-v16:16-v32:32-n16:32:64"
target triple = "nvptx64-nvidia-cuda"
diff --git a/llvm/test/Transforms/CodeGenPrepare/PowerPC/split-store-alignment.ll b/llvm/test/Transforms/CodeGenPrepare/PowerPC/split-store-alignment.ll
index 79aebb9c247ad4f..fc6c2e9d22ad3e1 100644
--- a/llvm/test/Transforms/CodeGenPrepare/PowerPC/split-store-alignment.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/PowerPC/split-store-alignment.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -codegenprepare -mtriple=powerpc64-unknown-linux-gnu -data-layout="E-m:e-i64:64-n32:64" -force-split-store < %s | FileCheck --check-prefix=BE %s
-; RUN: opt -S -codegenprepare -mtriple=powerpc64le-unknown-linux-gnu -data-layout="e-m:e-i64:64-n32:64" -force-split-store < %s | FileCheck --check-prefix=LE %s
+; RUN: opt -S -passes=codegenprepare -mtriple=powerpc64-unknown-linux-gnu -data-layout="E-m:e-i64:64-n32:64" -force-split-store < %s | FileCheck --check-prefix=BE %s
+; RUN: opt -S -passes=codegenprepare -mtriple=powerpc64le-unknown-linux-gnu -data-layout="e-m:e-i64:64-n32:64" -force-split-store < %s | FileCheck --check-prefix=LE %s
define void @split_store_align1(float %x, ptr %p) {
; BE-LABEL: @split_store_align1(
diff --git a/llvm/test/Transforms/CodeGenPrepare/RISCV/and-mask-sink.ll b/llvm/test/Transforms/CodeGenPrepare/RISCV/and-mask-sink.ll
index 130401d78171868..721df15afc0e6f3 100644
--- a/llvm/test/Transforms/CodeGenPrepare/RISCV/and-mask-sink.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/RISCV/and-mask-sink.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -codegenprepare -mtriple=riscv32 %s \
+; RUN: opt -S -passes=codegenprepare -mtriple=riscv32 %s \
; RUN: | FileCheck --check-prefixes=CHECK,NOZBS %s
-; RUN: opt -S -codegenprepare -mtriple=riscv32 -mattr=+zbs %s \
+; RUN: opt -S -passes=codegenprepare -mtriple=riscv32 -mattr=+zbs %s \
; RUN: | FileCheck --check-prefixes=CHECK,ZBS %s
-; RUN: opt -S -codegenprepare -mtriple=riscv64 %s \
+; RUN: opt -S -passes=codegenprepare -mtriple=riscv64 %s \
; RUN: | FileCheck --check-prefixes=CHECK,NOZBS %s
-; RUN: opt -S -codegenprepare -mtriple=riscv64 -mattr=zbs %s \
+; RUN: opt -S -passes=codegenprepare -mtriple=riscv64 -mattr=zbs %s \
; RUN: | FileCheck --check-prefixes=CHECK,ZBS %s
@A = global i32 zeroinitializer
diff --git a/llvm/test/Transforms/CodeGenPrepare/RISCV/cttz-ctlz.ll b/llvm/test/Transforms/CodeGenPrepare/RISCV/cttz-ctlz.ll
index c70112e91ebd95f..eb1ed7b65a0df98 100644
--- a/llvm/test/Transforms/CodeGenPrepare/RISCV/cttz-ctlz.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/RISCV/cttz-ctlz.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -codegenprepare < %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare < %s | FileCheck %s
target triple = "riscv64-unknown-unknown"
diff --git a/llvm/test/Transforms/CodeGenPrepare/SPARC/overflow-intrinsics.ll b/llvm/test/Transforms/CodeGenPrepare/SPARC/overflow-intrinsics.ll
index 7525ae14fa35210..720e8f08a4ccce6 100644
--- a/llvm/test/Transforms/CodeGenPrepare/SPARC/overflow-intrinsics.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/SPARC/overflow-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -codegenprepare -S < %s | FileCheck %s
-; RUN: opt -enable-debugify -codegenprepare -S < %s 2>&1 | FileCheck %s -check-prefix=DEBUG
+; RUN: opt -passes=codegenprepare -S < %s | FileCheck %s
+; RUN: opt -enable-debugify -passes=codegenprepare -S < %s 2>&1 | FileCheck %s -check-prefix=DEBUG
; Subset of tests from llvm/tests/Transforms/CodeGenPrepare/X86/overflow-intrinsics.ll
; to test shouldFormOverflowOp on SPARC, where it is not profitable to create
@@ -119,5 +119,5 @@ define i1 @usubo_ult_i64_math_overflow_used(i64 %x, i64 %y, ptr %p) {
ret i1 %ov
}
-; Check that every instruction inserted by -codegenprepare has a debug location.
+; Check that every instruction inserted by -passes=codegenprepare has a debug location.
; DEBUG: CheckModuleDebugify: PASS
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/2008-11-24-RAUW-Self.ll b/llvm/test/Transforms/CodeGenPrepare/X86/2008-11-24-RAUW-Self.ll
index 5b501ed980a5e5d..095fc491e227f13 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/2008-11-24-RAUW-Self.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/2008-11-24-RAUW-Self.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s -codegenprepare | llvm-dis
+; RUN: opt < %s -passes=codegenprepare | llvm-dis
; PR3113
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/bitreverse-hang.ll b/llvm/test/Transforms/CodeGenPrepare/X86/bitreverse-hang.ll
index eec0967df7d4f32..3bea2d5eeee0eea 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/bitreverse-hang.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/bitreverse-hang.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s -loop-unroll -codegenprepare -S -mtriple=x86_64 | FileCheck %s
+; RUN: opt < %s -loop-unroll -passes=codegenprepare -S -mtriple=x86_64 | FileCheck %s
; This test is a worst-case scenario for bitreversal/byteswap detection.
; After loop unrolling (the unrolled loop is unreadably large so it has been kept
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/bitreverse-recognize.ll b/llvm/test/Transforms/CodeGenPrepare/X86/bitreverse-recognize.ll
index 8db2cd3ff295264..482c8922c076b56 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/bitreverse-recognize.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/bitreverse-recognize.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -loop-unroll -codegenprepare -S -mtriple=x86_64-- -mattr=+xop | FileCheck %s
+; RUN: opt < %s -loop-unroll -passes=codegenprepare -S -mtriple=x86_64-- -mattr=+xop | FileCheck %s
define i32 @bitreverse_i32(i32 %a) {
; CHECK-LABEL: @bitreverse_i32(
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/catchpad-phi-cast.ll b/llvm/test/Transforms/CodeGenPrepare/X86/catchpad-phi-cast.ll
index d23dd8c792e0e64..1a626b64bdf2e70 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/catchpad-phi-cast.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/catchpad-phi-cast.ll
@@ -1,4 +1,4 @@
-; RUN: opt -codegenprepare -S < %s | FileCheck %s
+; RUN: opt -passes=codegenprepare -S < %s | FileCheck %s
; The following target lines are needed for the test to exercise what it should.
; Without these lines, CodeGenPrepare does not try to sink the bitcasts.
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/cgp_shuffle_crash-inseltpoison.ll b/llvm/test/Transforms/CodeGenPrepare/X86/cgp_shuffle_crash-inseltpoison.ll
index 9eede8cf361bce1..f93261be5adc391 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/cgp_shuffle_crash-inseltpoison.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/cgp_shuffle_crash-inseltpoison.ll
@@ -1,4 +1,4 @@
-; RUN: opt -codegenprepare -S %s | FileCheck %s
+; RUN: opt -passes=codegenprepare -S %s | FileCheck %s
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/cgp_shuffle_crash.ll b/llvm/test/Transforms/CodeGenPrepare/X86/cgp_shuffle_crash.ll
index 7433ff74bab546f..7d4be4778d14856 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/cgp_shuffle_crash.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/cgp_shuffle_crash.ll
@@ -1,4 +1,4 @@
-; RUN: opt -codegenprepare -S %s | FileCheck %s
+; RUN: opt -passes=codegenprepare -S %s | FileCheck %s
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/computedgoto.ll b/llvm/test/Transforms/CodeGenPrepare/X86/computedgoto.ll
index fbf294128163f63..b5dfad48b38bc19 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/computedgoto.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/computedgoto.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -codegenprepare -S < %s | FileCheck %s
+; RUN: opt -passes=codegenprepare -S < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/cttz-ctlz.ll b/llvm/test/Transforms/CodeGenPrepare/X86/cttz-ctlz.ll
index 440afdeff10a3e8..a5adafc4f057ab4 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/cttz-ctlz.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/cttz-ctlz.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -codegenprepare < %s | FileCheck %s --check-prefix=SLOW
-; RUN: opt -S -codegenprepare -mattr=+bmi < %s | FileCheck %s --check-prefix=FAST_TZ
-; RUN: opt -S -codegenprepare -mattr=+lzcnt < %s | FileCheck %s --check-prefix=FAST_LZ
+; RUN: opt -S -passes=codegenprepare < %s | FileCheck %s --check-prefix=SLOW
+; RUN: opt -S -passes=codegenprepare -mattr=+bmi < %s | FileCheck %s --check-prefix=FAST_TZ
+; RUN: opt -S -passes=codegenprepare -mattr=+lzcnt < %s | FileCheck %s --check-prefix=FAST_LZ
target triple = "x86_64-unknown-unknown"
target datalayout = "e-n32:64"
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/delete-assume-dead-code.ll b/llvm/test/Transforms/CodeGenPrepare/X86/delete-assume-dead-code.ll
index abdf54c6e542682..fd5512ab8b1ff2e 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/delete-assume-dead-code.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/delete-assume-dead-code.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -codegenprepare -S -mtriple=x86_64-linux < %s | FileCheck %s
+; RUN: opt -passes=codegenprepare -S -mtriple=x86_64-linux < %s | FileCheck %s
define i32 @test1(ptr %d) nounwind {
; CHECK-LABEL: @test1(
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/ext-logicop.ll b/llvm/test/Transforms/CodeGenPrepare/X86/ext-logicop.ll
index 4c02428768bf743..d4605e43f83f5a8 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/ext-logicop.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/ext-logicop.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s -codegenprepare -S -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: opt < %s -passes=codegenprepare -S -mtriple=x86_64-unknown-unknown | FileCheck %s
@a = global [10 x i8] zeroinitializer, align 1
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/extend-sink-hoist.ll b/llvm/test/Transforms/CodeGenPrepare/X86/extend-sink-hoist.ll
index a0814e0a5f20ce4..1861f08f1ff365e 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/extend-sink-hoist.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/extend-sink-hoist.ll
@@ -1,4 +1,4 @@
-; RUN: opt -codegenprepare -disable-cgp-branch-opts -S < %s | FileCheck %s
+; RUN: opt -passes=codegenprepare -disable-cgp-branch-opts -S < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/fcmp-sinking.ll b/llvm/test/Transforms/CodeGenPrepare/X86/fcmp-sinking.ll
index 94ab74f9e7bf564..fd254134e072842 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/fcmp-sinking.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/fcmp-sinking.ll
@@ -1,5 +1,5 @@
-; RUN: opt %s -codegenprepare -mattr=+soft-float -S | FileCheck %s -check-prefix=CHECK -check-prefix=SOFTFP
-; RUN: opt %s -codegenprepare -mattr=-soft-float -S | FileCheck %s -check-prefix=CHECK -check-prefix=HARDFP
+;
+; RUN: opt %s -passes=codegenprepare -mattr=-soft-float -S | FileCheck %s -check-prefix=CHECK -check-prefix=HARDFP
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/freeze-brcond.ll b/llvm/test/Transforms/CodeGenPrepare/X86/freeze-brcond.ll
index c37227f5fa820ee..7956adeeece2135 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/freeze-brcond.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/freeze-brcond.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -codegenprepare < %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare < %s | FileCheck %s
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt-inseltpoison.ll b/llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt-inseltpoison.ll
index 41b1ac2c05fcc12..f8804505e2e9684 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt-inseltpoison.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt-inseltpoison.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -codegenprepare < %s | FileCheck %s
-; RUN: opt -S -codegenprepare -cgpp-huge-func=0 < %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare < %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare -cgpp-huge-func=0 < %s | FileCheck %s
target datalayout =
"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt.ll b/llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt.ll
index 2cf98491acb95ec..3f29766b53f77f1 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -codegenprepare < %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare < %s | FileCheck %s
target datalayout =
"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/gep-unmerging.ll b/llvm/test/Transforms/CodeGenPrepare/X86/gep-unmerging.ll
index d2eae6954c5d85f..8f038747e9aef24 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/gep-unmerging.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/gep-unmerging.ll
@@ -1,4 +1,4 @@
-; RUN: opt -codegenprepare -S -mtriple=x86_64 < %s | FileCheck %s
+; RUN: opt -passes=codegenprepare -S -mtriple=x86_64 < %s | FileCheck %s
@exit_addr = constant ptr blockaddress(@gep_unmerging, %exit)
@op1_addr = constant ptr blockaddress(@gep_unmerging, %op1)
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/icmp-swap-loop.ll b/llvm/test/Transforms/CodeGenPrepare/X86/icmp-swap-loop.ll
index 5ad54e596ca6d31..bce2eea60b198ef 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/icmp-swap-loop.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/icmp-swap-loop.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
-; RUN: opt -S -mtriple=x86_64-- -codegenprepare < %s | FileCheck %s
+; RUN: opt -S -mtriple=x86_64-- -passes=codegenprepare < %s | FileCheck %s
define i1 @test(i32 %arg) {
; CHECK-LABEL: define i1 @test
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/invariant.group.ll b/llvm/test/Transforms/CodeGenPrepare/X86/invariant.group.ll
index 3c81a4beb83442d..572300ef1ba3ac2 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/invariant.group.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/invariant.group.ll
@@ -1,4 +1,4 @@
-; RUN: opt -codegenprepare -S -mtriple=x86_64 < %s | FileCheck %s
+; RUN: opt -passes=codegenprepare -S -mtriple=x86_64 < %s | FileCheck %s
@tmp = global i8 0
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/masked-gather-struct-gep.ll b/llvm/test/Transforms/CodeGenPrepare/X86/masked-gather-struct-gep.ll
index ea07a5fe9bc5b4e..d74b88870b58a0f 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/masked-gather-struct-gep.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/masked-gather-struct-gep.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
-; RUN: opt -S -codegenprepare < %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare < %s | FileCheck %s
; REQUIRES: x86-registered-target
target triple = "x86_64-pc-linux"
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/memset_chk-simplify-nobuiltin.ll b/llvm/test/Transforms/CodeGenPrepare/X86/memset_chk-simplify-nobuiltin.ll
index d6352d21a626510..7213e36338ebc48 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/memset_chk-simplify-nobuiltin.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/memset_chk-simplify-nobuiltin.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -mtriple=x86_64 -disable-simplify-libcalls -codegenprepare < %s | FileCheck %s
+; RUN: opt -S -mtriple=x86_64 -disable-simplify-libcalls -passes=codegenprepare < %s | FileCheck %s
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
; This is a workaround for PR23093: when building with -mkernel/-fno-builtin,
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/multi-extension.ll b/llvm/test/Transforms/CodeGenPrepare/X86/multi-extension.ll
index cc8e99176bf6e12..8e044da90698343 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/multi-extension.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/multi-extension.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s -codegenprepare -S -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: opt < %s -passes=codegenprepare -S -mtriple=x86_64-unknown-unknown | FileCheck %s
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.13.0"
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/nonintegral.ll b/llvm/test/Transforms/CodeGenPrepare/X86/nonintegral.ll
index 2f42ad889b4228e..b584e28892e7ccd 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/nonintegral.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/nonintegral.ll
@@ -1,5 +1,5 @@
-; RUN: opt -S -codegenprepare < %s | FileCheck %s
-; RUN: opt -S -codegenprepare -addr-sink-using-gep=false < %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare < %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare -addr-sink-using-gep=false < %s | FileCheck %s
; This target data layout is modified to have a non-integral addrspace(1),
; in order to verify that codegenprepare does not try to introduce illegal
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/optimizeSelect-DT.ll b/llvm/test/Transforms/CodeGenPrepare/X86/optimizeSelect-DT.ll
index be651d7eb0044f1..2643bbae5966e3f 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/optimizeSelect-DT.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/optimizeSelect-DT.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -codegenprepare < %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/overflow-intrinsics.ll b/llvm/test/Transforms/CodeGenPrepare/X86/overflow-intrinsics.ll
index a324f6f44e5c34c..1f8819fbb5d71a3 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/overflow-intrinsics.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/overflow-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -codegenprepare -S < %s | FileCheck %s
-; RUN: opt -enable-debugify -codegenprepare -S < %s 2>&1 | FileCheck %s -check-prefix=DEBUG
+; RUN: opt -passes=codegenprepare -S < %s | FileCheck %s
+; RUN: opt -enable-debugify -passes=codegenprepare -S < %s 2>&1 | FileCheck %s -check-prefix=DEBUG
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin10.0.0"
@@ -636,6 +636,6 @@ exit:
ret void
}
-; Check that every instruction inserted by -codegenprepare has a debug location.
+; Check that every instruction inserted by -passes=codegenprepare has a debug location.
; DEBUG: CheckModuleDebugify: PASS
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/pr27536.ll b/llvm/test/Transforms/CodeGenPrepare/X86/pr27536.ll
index 3ef27c7c950fb0c..5424280c7cb7695 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/pr27536.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/pr27536.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -codegenprepare < %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare < %s | FileCheck %s
target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-windows-msvc"
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/pr35658.ll b/llvm/test/Transforms/CodeGenPrepare/X86/pr35658.ll
index eec9475a1c48e4b..cb3fbae6e1d26a0 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/pr35658.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/pr35658.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -codegenprepare -disable-complex-addr-modes=false -addr-sink-new-phis=true -addr-sink-new-select=true %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare -disable-complex-addr-modes=false -addr-sink-new-phis=true -addr-sink-new-select=true %s | FileCheck %s
target triple = "x86_64-unknown-linux-gnu"
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/promoted-trunc-loc.ll b/llvm/test/Transforms/CodeGenPrepare/X86/promoted-trunc-loc.ll
index 081c6742ede8c91..d2e4162ec0bf736 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/promoted-trunc-loc.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/promoted-trunc-loc.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s -codegenprepare -S -mtriple=x86_64-unknown-unknown | FileCheck %s --match-full-lines
+; RUN: opt < %s -passes=codegenprepare -S -mtriple=x86_64-unknown-unknown | FileCheck %s --match-full-lines
; Make sure the promoted trunc doesn't get a debug location associated.
; CHECK: %promoted = trunc i32 %or to i16
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/promoted-zext-debugloc.ll b/llvm/test/Transforms/CodeGenPrepare/X86/promoted-zext-debugloc.ll
index 0b4f830ff3e7d99..94f9af930e79228 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/promoted-zext-debugloc.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/promoted-zext-debugloc.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s -codegenprepare -S -mtriple=x86_64-unknown-unknown | FileCheck %s --match-full-lines
+; RUN: opt < %s -passes=codegenprepare -S -mtriple=x86_64-unknown-unknown | FileCheck %s --match-full-lines
; Make sure the promoted zext doesn't get a debug location associated.
; CHECK: %promoted = zext i8 %t to i64
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/recursively-delete-dead-instructions.ll b/llvm/test/Transforms/CodeGenPrepare/X86/recursively-delete-dead-instructions.ll
index 0366b7d7e6d2e81..038da72a6fea04b 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/recursively-delete-dead-instructions.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/recursively-delete-dead-instructions.ll
@@ -1,4 +1,4 @@
-; RUN: opt -codegenprepare -S -mtriple=x86_64-linux < %s | FileCheck %s
+; RUN: opt -passes=codegenprepare -S -mtriple=x86_64-linux < %s | FileCheck %s
declare void @llvm.assume(i1 noundef) nounwind willreturn
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/remove-assume-block.ll b/llvm/test/Transforms/CodeGenPrepare/X86/remove-assume-block.ll
index 1d5e6ea0978ad93..a4f3a6d39538d25 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/remove-assume-block.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/remove-assume-block.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -codegenprepare -mtriple=x86_64-linux < %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare -mtriple=x86_64-linux < %s | FileCheck %s
;
; Ensure that blocks that only contain @llvm.assume are removed completely
; during CodeGenPrepare.
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/section-samplepgo.ll b/llvm/test/Transforms/CodeGenPrepare/X86/section-samplepgo.ll
index 58af88d8cf3653d..9653da89d59acbe 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/section-samplepgo.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/section-samplepgo.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s -codegenprepare -S | FileCheck %s
+; RUN: opt < %s -passes=codegenprepare -S | FileCheck %s
target triple = "x86_64-pc-linux-gnu"
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/section.ll b/llvm/test/Transforms/CodeGenPrepare/X86/section.ll
index 6dad1122e429455..a28120ef6f7ff58 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/section.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/section.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s -codegenprepare -S | FileCheck %s
+; RUN: opt < %s -passes=codegenprepare -S | FileCheck %s
; RUN: llc < %s | FileCheck --check-prefix=ASM1 %s
; RUN: llc < %s -function-sections | FileCheck --check-prefix=ASM2 %s
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/select.ll b/llvm/test/Transforms/CodeGenPrepare/X86/select.ll
index d5eda2065144d19..a7a74a5a16395e0 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/select.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/select.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -codegenprepare -S < %s | FileCheck %s
-; RUN: opt -debugify -codegenprepare -S < %s | FileCheck %s -check-prefix=DEBUG
+; RUN: opt -passes=codegenprepare -S < %s | FileCheck %s
+; RUN: opt -debugify -passes=codegenprepare -S < %s | FileCheck %s -check-prefix=DEBUG
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-base.ll b/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-base.ll
index 45ddbe76c8f1eff..28d4b5ef4516043 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-base.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-base.ll
@@ -1,5 +1,5 @@
-; RUN: opt -S -codegenprepare -disable-complex-addr-modes=false -addr-sink-new-phis=true -addr-sink-new-select=true -disable-cgp-delete-phis %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-YES
-; RUN: opt -S -codegenprepare -disable-complex-addr-modes=false -addr-sink-new-phis=false -addr-sink-new-select=true -disable-cgp-delete-phis %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-NO
+; RUN: opt -S -passes=codegenprepare -disable-complex-addr-modes=false -addr-sink-new-phis=true -addr-sink-new-select=true -disable-cgp-delete-phis %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-YES
+; RUN: opt -S -passes=codegenprepare -disable-complex-addr-modes=false -addr-sink-new-phis=false -addr-sink-new-select=true -disable-cgp-delete-phis %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-NO
target datalayout =
"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-inseltpoison.ll b/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-inseltpoison.ll
index d5e69b9d802ef73..022e5a2a16590ef 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-inseltpoison.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-inseltpoison.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -codegenprepare < %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare < %s | FileCheck %s
target datalayout =
"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-select.ll b/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-select.ll
index 336421e4c50089b..f426e40e6f4bf3c 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-select.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-select.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -codegenprepare -disable-complex-addr-modes=false -addr-sink-new-select=true %s | FileCheck %s --check-prefix=CHECK
+; RUN: opt -S -passes=codegenprepare -disable-complex-addr-modes=false -addr-sink-new-select=true %s | FileCheck %s --check-prefix=CHECK
target datalayout =
"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-two-phi.ll b/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-two-phi.ll
index 611ef908d706d7a..544df7a5ebf3929 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-two-phi.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-two-phi.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -codegenprepare -disable-complex-addr-modes=false -disable-cgp-delete-phis %s | FileCheck %s --check-prefix=CHECK
+; RUN: opt -S -passes=codegenprepare -disable-complex-addr-modes=false -disable-cgp-delete-phis %s | FileCheck %s --check-prefix=CHECK
target datalayout =
"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode.ll b/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode.ll
index 97b11a2e1f1c9c3..bab8394eb5e4c50 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -codegenprepare < %s | FileCheck %s
+; RUN: opt -S -passes=codegenprepare < %s | FileCheck %s
target datalayout =
"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrspacecast.ll b/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrspacecast.ll
index f2e82212d0fac43..bb78a6369379682 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrspacecast.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrspacecast.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -codegenprepare < %s | FileCheck %s -check-prefix=CHECK -check-prefix=GEP
+; RUN: opt -S -passes=codegenprepare < %s | FileCheck %s -check-prefix=CHECK -check-prefix=GEP
target datalayout =
"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/split-indirect-loop.ll b/llvm/test/Transforms/CodeGenPrepare/X86/split-indirect-loop.ll
index c5d18ff50309938..e11519f9c2c9b2e 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/split-indirect-loop.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/split-indirect-loop.ll
@@ -1,4 +1,4 @@
-; RUN: opt -codegenprepare -S -mtriple=x86_64 < %s | FileCheck %s
+; RUN: opt -passes=codegenprepare -S -mtriple=x86_64 < %s | FileCheck %s
; Test that an invalid CFG is not created by splitIndirectCriticalEdges
; transformation when the 'target' block is a loop to itself.
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/statepoint-relocate.ll b/llvm/test/Transforms/CodeGenPrepare/X86/statepoint-relocate.ll
index a8a6f7baf9b483b..70a37dac6c5628e 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/statepoint-relocate.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/statepoint-relocate.ll
@@ -1,4 +1,4 @@
-; RUN: opt -codegenprepare -S < %s | FileCheck %s
+; RUN: opt -passes=codegenprepare -S < %s | FileCheck %s
target datalayout = "e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu"
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/switch-phi-const.ll b/llvm/test/Transforms/CodeGenPrepare/X86/switch-phi-const.ll
index 24b046b09f4deb4..064479dff399181 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/switch-phi-const.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/switch-phi-const.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt %s -mtriple=x86_64-- -codegenprepare -S | FileCheck %s
+; RUN: opt %s -mtriple=x86_64-- -passes=codegenprepare -S | FileCheck %s
@g = global i32 0
@effect = global i32 0
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/tailcall-assume-xbb.ll b/llvm/test/Transforms/CodeGenPrepare/X86/tailcall-assume-xbb.ll
index 9dc88a100daadd7..a360383bd9ea8b4 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/tailcall-assume-xbb.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/tailcall-assume-xbb.ll
@@ -1,4 +1,4 @@
-; RUN: opt -codegenprepare -S -mtriple=x86_64-linux < %s | FileCheck %s
+; RUN: opt -passes=codegenprepare -S -mtriple=x86_64-linux < %s | FileCheck %s
; The ret instruction can be duplicated into BB case2 even though there is an
; intermediate BB exit1 and call to llvm.assume.
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/vec-shift-inseltpoison.ll b/llvm/test/Transforms/CodeGenPrepare/X86/vec-shift-inseltpoison.ll
index 557974fcfe54f8b..593636caa1183c0 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/vec-shift-inseltpoison.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/vec-shift-inseltpoison.ll
@@ -1,10 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -codegenprepare -mtriple=x86_64-- -mattr=+avx -S < %s | FileCheck %s --check-prefixes=AVX1
-; RUN: opt -codegenprepare -mtriple=x86_64-- -mattr=+avx2 -S < %s | FileCheck %s --check-prefixes=AVX2
-; RUN: opt -codegenprepare -mtriple=x86_64-- -mattr=+avx512bw -S < %s | FileCheck %s --check-prefixes=AVX512BW
-; RUN: opt -codegenprepare -mtriple=x86_64-- -mattr=+avx,+xop -S < %s | FileCheck %s --check-prefixes=XOP
-; RUN: opt -codegenprepare -mtriple=x86_64-- -mattr=+avx2,+xop -S < %s | FileCheck %s --check-prefixes=XOP
-; RUN: opt -codegenprepare -mtriple=x86_64-- -mattr=+avx -S -enable-debugify < %s 2>&1 | FileCheck %s -check-prefix=DEBUG
+; RUN: opt -passes=codegenprepare -mtriple=x86_64-- -mattr=+avx -S < %s | FileCheck %s --check-prefixes=AVX1
+; RUN: opt -passes=codegenprepare -mtriple=x86_64-- -mattr=+avx2 -S < %s | FileCheck %s --check-prefixes=AVX2
+; RUN: opt -passes=codegenprepare -mtriple=x86_64-- -mattr=+avx512bw -S < %s | FileCheck %s --check-prefixes=AVX512BW
+; RUN: opt -passes=codegenprepare -mtriple=x86_64-- -mattr=+avx,+xop -S < %s | FileCheck %s --check-prefixes=XOP
+; RUN: opt -passes=codegenprepare -mtriple=x86_64-- -mattr=+avx2,+xop -S < %s | FileCheck %s --check-prefixes=XOP
+; RUN: opt -passes=codegenprepare -mtriple=x86_64-- -mattr=+avx -S -enable-debugify < %s 2>&1 | FileCheck %s -check-prefix=DEBUG
+
define <4 x i32> @vector_variable_shift_right_v4i32(<4 x i1> %cond, <4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
; AVX1-LABEL: @vector_variable_shift_right_v4i32(
@@ -409,5 +410,5 @@ exit:
declare <8 x i32> @llvm.fshl.v8i32(<8 x i32>, <8 x i32>, <8 x i32>) #1
-; Check that every instruction inserted by -codegenprepare has a debug location.
+; Check that every instruction inserted by -passes=codegenprepare has a debug location.
; DEBUG: CheckModuleDebugify: PASS
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/vec-shift.ll b/llvm/test/Transforms/CodeGenPrepare/X86/vec-shift.ll
index 482e822ea3d8091..4e1ee13696599ef 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/vec-shift.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/vec-shift.ll
@@ -1,10 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -codegenprepare -mtriple=x86_64-- -mattr=+avx -S < %s | FileCheck %s --check-prefixes=AVX1
-; RUN: opt -codegenprepare -mtriple=x86_64-- -mattr=+avx2 -S < %s | FileCheck %s --check-prefixes=AVX2
-; RUN: opt -codegenprepare -mtriple=x86_64-- -mattr=+avx512bw -S < %s | FileCheck %s --check-prefixes=AVX512BW
-; RUN: opt -codegenprepare -mtriple=x86_64-- -mattr=+avx,+xop -S < %s | FileCheck %s --check-prefixes=XOP
-; RUN: opt -codegenprepare -mtriple=x86_64-- -mattr=+avx2,+xop -S < %s | FileCheck %s --check-prefixes=XOP
-; RUN: opt -codegenprepare -mtriple=x86_64-- -mattr=+avx -S -enable-debugify < %s 2>&1 | FileCheck %s -check-prefix=DEBUG
+; RUN: opt -passes=codegenprepare -mtriple=x86_64-- -mattr=+avx -S < %s | FileCheck %s --check-prefixes=AVX1
+; RUN: opt -passes=codegenprepare -mtriple=x86_64-- -mattr=+avx2 -S < %s | FileCheck %s --check-prefixes=AVX2
+; RUN: opt -passes=codegenprepare -mtriple=x86_64-- -mattr=+avx512bw -S < %s | FileCheck %s --check-prefixes=AVX512BW
+; RUN: opt -passes=codegenprepare -mtriple=x86_64-- -mattr=+avx,+xop -S < %s | FileCheck %s --check-prefixes=XOP
+; RUN: opt -passes=codegenprepare -mtriple=x86_64-- -mattr=+avx2,+xop -S < %s | FileCheck %s --check-prefixes=XOP
+; RUN: opt -passes=codegenprepare -mtriple=x86_64-- -mattr=+avx -S -enable-debugify < %s 2>&1 | FileCheck %s -check-prefix=DEBUG
+
define <4 x i32> @vector_variable_shift_right_v4i32(<4 x i1> %cond, <4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
; AVX1-LABEL: @vector_variable_shift_right_v4i32(
@@ -409,5 +410,5 @@ exit:
declare <8 x i32> @llvm.fshl.v8i32(<8 x i32>, <8 x i32>, <8 x i32>) #1
-; Check that every instruction inserted by -codegenprepare has a debug location.
+; Check that every instruction inserted by -passes=codegenprepare has a debug location.
; DEBUG: CheckModuleDebugify: PASS
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/widen_switch.ll b/llvm/test/Transforms/CodeGenPrepare/X86/widen_switch.ll
index 9d04c4be49f4bfc..ac239cd7fd3c32c 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/widen_switch.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/widen_switch.ll
@@ -1,7 +1,7 @@
;; x86 is chosen to show the transform when 8-bit and 16-bit registers are available.
-; RUN: opt < %s -codegenprepare -S -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X86
-; RUN: opt < %s -debugify -codegenprepare -S -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=DEBUG
+; RUN: opt < %s -passes=codegenprepare -S -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X86
+; RUN: opt < %s -debugify -passes=codegenprepare -S -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=DEBUG
; X86 prefers i32 over i16 for address calculation.
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/widenable-condition.ll b/llvm/test/Transforms/CodeGenPrepare/X86/widenable-condition.ll
index b26876e0e1e2614..b2241c4539f3077 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/widenable-condition.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/widenable-condition.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -codegenprepare -S -mtriple=x86_64 < %s | FileCheck %s
+; RUN: opt -passes=codegenprepare -S -mtriple=x86_64 < %s | FileCheck %s
; Check the idiomatic guard pattern to ensure it's lowered correctly.
define void @test_guard(i1 %cond_0) {
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/x86-shuffle-sink-inseltpoison.ll b/llvm/test/Transforms/CodeGenPrepare/X86/x86-shuffle-sink-inseltpoison.ll
index 72d1672eb4f7d56..b362c8182fb4a61 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/x86-shuffle-sink-inseltpoison.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/x86-shuffle-sink-inseltpoison.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -codegenprepare -mcpu=corei7 %s | FileCheck %s --check-prefixes=CHECK,CHECK-SSE2
-; RUN: opt -S -codegenprepare -mcpu=bdver2 %s | FileCheck %s --check-prefixes=CHECK,CHECK-XOP
-; RUN: opt -S -codegenprepare -mcpu=core-avx2 %s | FileCheck %s --check-prefixes=CHECK,CHECK-AVX,CHECK-AVX2
-; RUN: opt -S -codegenprepare -mcpu=skylake-avx512 %s | FileCheck %s --check-prefixes=CHECK,CHECK-AVX,CHECK-AVX512BW
+; RUN: opt -S -passes=codegenprepare -mcpu=corei7 %s | FileCheck %s --check-prefixes=CHECK,CHECK-SSE2
+; RUN: opt -S -passes=codegenprepare -mcpu=bdver2 %s | FileCheck %s --check-prefixes=CHECK,CHECK-XOP
+; RUN: opt -S -passes=codegenprepare -mcpu=core-avx2 %s | FileCheck %s --check-prefixes=CHECK,CHECK-AVX,CHECK-AVX2
+; RUN: opt -S -passes=codegenprepare -mcpu=skylake-avx512 %s | FileCheck %s --check-prefixes=CHECK,CHECK-AVX,CHECK-AVX512BW
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-darwin10.9.0"
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/x86-shuffle-sink.ll b/llvm/test/Transforms/CodeGenPrepare/X86/x86-shuffle-sink.ll
index c14918a6956f17e..ac8929d82924861 100644
--- a/llvm/test/Transforms/CodeGenPrepare/X86/x86-shuffle-sink.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/X86/x86-shuffle-sink.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -codegenprepare -mcpu=corei7 %s | FileCheck %s --check-prefixes=CHECK,CHECK-SSE2
-; RUN: opt -S -codegenprepare -mcpu=bdver2 %s | FileCheck %s --check-prefixes=CHECK,CHECK-XOP
-; RUN: opt -S -codegenprepare -mcpu=core-avx2 %s | FileCheck %s --check-prefixes=CHECK,CHECK-AVX,CHECK-AVX2
-; RUN: opt -S -codegenprepare -mcpu=skylake-avx512 %s | FileCheck %s --check-prefixes=CHECK,CHECK-AVX,CHECK-AVX512BW
+; RUN: opt -S -passes=codegenprepare -mcpu=corei7 %s | FileCheck %s --check-prefixes=CHECK,CHECK-SSE2
+; RUN: opt -S -passes=codegenprepare -mcpu=bdver2 %s | FileCheck %s --check-prefixes=CHECK,CHECK-XOP
+; RUN: opt -S -passes=codegenprepare -mcpu=core-avx2 %s | FileCheck %s --check-prefixes=CHECK,CHECK-AVX,CHECK-AVX2
+; RUN: opt -S -passes=codegenprepare -mcpu=skylake-avx512 %s | FileCheck %s --check-prefixes=CHECK,CHECK-AVX,CHECK-AVX512BW
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-darwin10.9.0"
diff --git a/llvm/test/Transforms/CodeGenPrepare/dead-allocation.ll b/llvm/test/Transforms/CodeGenPrepare/dead-allocation.ll
index 637040a0d56d2f0..2d21d915d5ee2f6 100644
--- a/llvm/test/Transforms/CodeGenPrepare/dead-allocation.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/dead-allocation.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; Eliminate the dead allocation instruction
; REQUIRES: arm-registered-target
-; RUN: opt -codegenprepare < %s -S | FileCheck %s
+; RUN: opt -passes=codegenprepare < %s -S | FileCheck %s
target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
target triple = "armv7--linux-gnueabihf"
diff --git a/llvm/test/Transforms/CodeGenPrepare/dom-tree.ll b/llvm/test/Transforms/CodeGenPrepare/dom-tree.ll
index 1c990ff7073a48c..d63753d1eaf2b55 100644
--- a/llvm/test/Transforms/CodeGenPrepare/dom-tree.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/dom-tree.ll
@@ -1,5 +1,5 @@
; REQUIRES: arm-registered-target
-; RUN: opt -S -loop-unroll -codegenprepare < %s -domtree -verify-dom-info | FileCheck %s
+; RUN: opt -S -loop-unroll -passes=codegenprepare < %s -domtree -verify-dom-info | FileCheck %s
;
; Checks that the dom tree is properly invalidated after an operation that will
; invalidate it in CodeGenPrepare. If the domtree isn't properly invalidated,
diff --git a/llvm/test/Transforms/CodeGenPrepare/sink-shift-and-trunc.ll b/llvm/test/Transforms/CodeGenPrepare/sink-shift-and-trunc.ll
index 85512e64336db1a..a40315c40ffb63c 100644
--- a/llvm/test/Transforms/CodeGenPrepare/sink-shift-and-trunc.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/sink-shift-and-trunc.ll
@@ -1,5 +1,5 @@
; REQUIRES: aarch64-registered-target
-; RUN: opt < %s -codegenprepare -mtriple=arm64-apple-ios -S | FileCheck %s
+; RUN: opt < %s -passes=codegenprepare -mtriple=arm64-apple-ios -S | FileCheck %s
@first_ones = external global [65536 x i8]
diff --git a/llvm/test/Transforms/CodeGenPrepare/skip-merging-case-block.ll b/llvm/test/Transforms/CodeGenPrepare/skip-merging-case-block.ll
index 608ad4c0a32fa87..a17a7c87b8dee9e 100644
--- a/llvm/test/Transforms/CodeGenPrepare/skip-merging-case-block.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/skip-merging-case-block.ll
@@ -1,5 +1,5 @@
; REQUIRES: aarch64-registered-target
-; RUN: opt -codegenprepare < %s -mtriple=aarch64-none-linux-gnu -S | FileCheck %s
+; RUN: opt -passes=codegenprepare < %s -mtriple=aarch64-none-linux-gnu -S | FileCheck %s
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--linux-gnu"
diff --git a/llvm/test/Transforms/HotColdSplit/coldentrycount.ll b/llvm/test/Transforms/HotColdSplit/coldentrycount.ll
index 1a113ff1618835f..de7595d7a65757c 100644
--- a/llvm/test/Transforms/HotColdSplit/coldentrycount.ll
+++ b/llvm/test/Transforms/HotColdSplit/coldentrycount.ll
@@ -1,5 +1,5 @@
; REQUIRES: x86-registered-target
-; RUN: opt -passes=hotcoldsplit -hotcoldsplit-threshold=0 < %s | opt -codegenprepare -S | FileCheck %s
+; RUN: opt -passes=hotcoldsplit -hotcoldsplit-threshold=0 < %s | opt -passes=codegenprepare -S | FileCheck %s
; Test to ensure that split cold function gets 0 entry count profile
; metadata when compiling with pgo.
diff --git a/llvm/test/Transforms/LoadStoreVectorizer/X86/codegenprepare-produced-address-math.ll b/llvm/test/Transforms/LoadStoreVectorizer/X86/codegenprepare-produced-address-math.ll
index ff8a804beeb5183..3aecebf30bc01af 100644
--- a/llvm/test/Transforms/LoadStoreVectorizer/X86/codegenprepare-produced-address-math.ll
+++ b/llvm/test/Transforms/LoadStoreVectorizer/X86/codegenprepare-produced-address-math.ll
@@ -1,4 +1,4 @@
-; RUN: opt -codegenprepare -load-store-vectorizer %s -S -o - | FileCheck %s
+; RUN: opt -passes=codegenprepare -load-store-vectorizer %s -S -o - | FileCheck %s
; RUN: opt -passes=load-store-vectorizer %s -S -o - | FileCheck %s
; RUN: opt -aa-pipeline=basic-aa -passes='function(load-store-vectorizer)' %s -S -o - | FileCheck %s
diff --git a/llvm/test/Transforms/SampleProfile/pseudo-probe-selectionDAG.ll b/llvm/test/Transforms/SampleProfile/pseudo-probe-selectionDAG.ll
index 5d01e78221e38d0..f206436d067ed9e 100644
--- a/llvm/test/Transforms/SampleProfile/pseudo-probe-selectionDAG.ll
+++ b/llvm/test/Transforms/SampleProfile/pseudo-probe-selectionDAG.ll
@@ -1,5 +1,5 @@
; REQUIRES: x86_64-linux
-; RUN: opt < %s -codegenprepare -mtriple=x86_64 -S -o %t
+; RUN: opt < %s -passes=codegenprepare -mtriple=x86_64 -S -o %t
; RUN: FileCheck %s < %t --check-prefix=IR
; RUN: llc -mtriple=x86_64-- -stop-after=finalize-isel %t -o - | FileCheck %s --check-prefix=MIR
diff --git a/llvm/test/Transforms/SampleProfile/section-accurate-samplepgo.ll b/llvm/test/Transforms/SampleProfile/section-accurate-samplepgo.ll
index a404220056c8eb3..39506af9e15eec7 100644
--- a/llvm/test/Transforms/SampleProfile/section-accurate-samplepgo.ll
+++ b/llvm/test/Transforms/SampleProfile/section-accurate-samplepgo.ll
@@ -1,7 +1,7 @@
; REQUIRES: x86-registered-target
-; RUN: opt -S %s -passes=sample-profile -sample-profile-file=%S/Inputs/inline.prof | opt -S -codegenprepare | FileCheck %s
-; RUN: opt -S %s -passes=sample-profile -sample-profile-file=%S/Inputs/inline.prof | opt -S -codegenprepare -profile-unknown-in-special-section -partial-profile | FileCheck %s --check-prefix=UNKNOWN
-; RUN: opt -S %s -passes=sample-profile -sample-profile-file=%S/Inputs/inline.prof -profile-sample-accurate -S | opt -S -codegenprepare | FileCheck %s --check-prefix=ACCURATE
+; RUN: opt -S %s -passes=sample-profile -sample-profile-file=%S/Inputs/inline.prof | opt -S -passes=codegenprepare | FileCheck %s
+; RUN: opt -S %s -passes=sample-profile -sample-profile-file=%S/Inputs/inline.prof | opt -S -passes=codegenprepare -profile-unknown-in-special-section -partial-profile | FileCheck %s --check-prefix=UNKNOWN
+; RUN: opt -S %s -passes=sample-profile -sample-profile-file=%S/Inputs/inline.prof -profile-sample-accurate -S | opt -S -passes=codegenprepare | FileCheck %s --check-prefix=ACCURATE
target triple = "x86_64-pc-linux-gnu"
diff --git a/llvm/tools/opt/opt.cpp b/llvm/tools/opt/opt.cpp
index ed9c10d971218f1..debd92a07dad92d 100644
--- a/llvm/tools/opt/opt.cpp
+++ b/llvm/tools/opt/opt.cpp
@@ -419,7 +419,7 @@ int main(int argc, char **argv) {
initializeScalarizeMaskedMemIntrinLegacyPassPass(Registry);
initializeSelectOptimizePass(Registry);
initializeCallBrPreparePass(Registry);
- initializeCodeGenPreparePass(Registry);
+ initializeCodeGenPrepareLegacyPass(Registry);
initializeAtomicExpandPass(Registry);
initializeWinEHPreparePass(Registry);
initializeDwarfEHPrepareLegacyPassPass(Registry);
>From 990cd21f5f268ca45e95a07c703e2658c70aa02f Mon Sep 17 00:00:00 2001
From: Krishna-13-cyber <krishnanarayanan132002 at gmail.com>
Date: Sun, 8 Oct 2023 20:50:40 +0530
Subject: [PATCH 2/2] Update with recent patches
---
llvm/lib/CodeGen/CodeGenPrepare.cpp | 27 +++++++++++++++++++--------
1 file changed, 19 insertions(+), 8 deletions(-)
diff --git a/llvm/lib/CodeGen/CodeGenPrepare.cpp b/llvm/lib/CodeGen/CodeGenPrepare.cpp
index d1f08e8dde50950..63afcf74ad2d722 100644
--- a/llvm/lib/CodeGen/CodeGenPrepare.cpp
+++ b/llvm/lib/CodeGen/CodeGenPrepare.cpp
@@ -199,7 +199,7 @@ static cl::opt<bool> BBSectionsGuidedSectionPrefix(
"impacted, i.e., their prefixes will be decided by FDO/sampleFDO "
"profiles."));
-static cl::opt<unsigned> FreqRatioToSkipMerge(
+static cl::opt<uint64_t> FreqRatioToSkipMerge(
"cgp-freq-ratio-to-skip-merge", cl::Hidden, cl::init(2),
cl::desc("Skip merging empty blocks if (frequency of empty block) / "
"(frequency of destination block) is greater than this ratio"));
@@ -269,6 +269,10 @@ static cl::opt<unsigned>
MaxAddressUsersToScan("cgp-max-address-users-to-scan", cl::init(100),
cl::Hidden,
cl::desc("Max number of address users to look at"));
+
+static cl::opt<bool>
+ DisableDeletePHIs("disable-cgp-delete-phis", cl::Hidden, cl::init(false),
+ cl::desc("Disable elimination of dead PHI nodes."));
namespace llvm{
enum ExtType {
@@ -361,6 +365,7 @@ class CodeGenPrepare {
/// lazily and update it when required.
std::unique_ptr<DominatorTree> DT;
+ public:
/// If encounter huge function, we need to limit the build time.
bool IsHugeFunc = false;
@@ -543,7 +548,7 @@ PreservedAnalyses CodeGenPreparePass::run(Function &F, FunctionAnalysisManager &
auto &LI = AM.getResult<LoopAnalysis>(F);
auto &PSI = AM.getResult<ProfileSummaryAnalysis>(F);
auto &TLInfo = AM.getResult<TargetLibraryAnalysis>(F);
-// auto &BasicBlockSectionsProfileReader = AM.getResult<BasicBlockSectionsProfileReader>(F);
+// auto &BasicBlockSectionsProfileReader = AM.getResult<BasicBlockSectionsProfileReader>(F);
CodeGenPrepare CGP;
bool Changed = CGP.run(F, TM, TTI, LI, PSI, TLInfo);
@@ -937,8 +942,12 @@ bool CodeGenPrepare::eliminateMostlyEmptyBlocks(Function &F) {
// as we remove them.
// Note that this intentionally skips the entry block.
SmallVector<WeakTrackingVH, 16> Blocks;
- for (auto &Block : llvm::drop_begin(F))
+ for (auto &Block : llvm::drop_begin(F)) {
+ // Delete phi nodes that could block deleting other empty blocks.
+ if (!DisableDeletePHIs)
+ MadeChange |= DeleteDeadPHIs(&Block, TLInfo);
Blocks.push_back(&Block);
+ }
for (auto &Block : Blocks) {
BasicBlock *BB = cast_or_null<BasicBlock>(Block);
@@ -1036,8 +1045,8 @@ bool CodeGenPrepare::isMergingEmptyBlockProfitable(BasicBlock *BB,
DestBB == findDestBlockOfMergeableEmptyBlock(SameValueBB))
BBFreq += BFI->getBlockFreq(SameValueBB);
- return PredFreq.getFrequency() <=
- BBFreq.getFrequency() * FreqRatioToSkipMerge;
+ std::optional<BlockFrequency> Limit = BBFreq.mul(FreqRatioToSkipMerge);
+ return !Limit || PredFreq <= *Limit;
}
/// Return true if we can merge BB into DestBB if there is a single
@@ -1259,6 +1268,7 @@ simplifyRelocatesOffABase(GCRelocateInst *RelocatedBase,
if (RI->getStatepoint() == RelocatedBase->getStatepoint())
if (RI->getBasePtrIndex() == RelocatedBase->getBasePtrIndex()) {
RelocatedBase->moveBefore(RI);
+ MadeChange = true;
break;
}
@@ -2312,7 +2322,7 @@ static bool despeculateCountZeros(IntrinsicInst *CountZeros,
// Create a PHI in the end block to select either the output of the intrinsic
// or the bit width of the operand.
- Builder.SetInsertPoint(&EndBlock->front());
+ Builder.SetInsertPoint(EndBlock, EndBlock->begin());
PHINode *PN = Builder.CreatePHI(Ty, 2, "ctz");
replaceAllUsesWith(CountZeros, PN, FreshBBs, IsHugeFunc);
Value *BitWidth = Builder.getInt(APInt(SizeInBits, SizeInBits));
@@ -6353,7 +6363,7 @@ bool CodeGenPrepare::optimizePhiType(
// correct type.
ValueToValueMap ValMap;
for (ConstantData *C : Constants)
- ValMap[C] = ConstantExpr::getCast(Instruction::BitCast, C, ConvertTy);
+ ValMap[C] = ConstantExpr::getBitCast(C, ConvertTy);
for (Instruction *D : Defs) {
if (isa<BitCastInst>(D)) {
ValMap[D] = D->getOperand(0);
@@ -7145,7 +7155,8 @@ bool CodeGenPrepare::optimizeSelectInst(SelectInst *SI) {
// to get the PHI operand.
for (SelectInst *SI : llvm::reverse(ASI)) {
// The select itself is replaced with a PHI Node.
- PHINode *PN = PHINode::Create(SI->getType(), 2, "", &EndBlock->front());
+ PHINode *PN = PHINode::Create(SI->getType(), 2, "");
+ PN->insertBefore(EndBlock->begin());
PN->takeName(SI);
PN->addIncoming(getTrueOrFalseValue(SI, true, INS), TrueBlock);
PN->addIncoming(getTrueOrFalseValue(SI, false, INS), FalseBlock);
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