[llvm] [RISCV] Add sink-and-fold support for RISC-V. (PR #67602)

[Mikhail Gudim via llvm-commits]

mgudim wrote:


> I can confirm that the train dataset on 429.mcf went from 17766169495 instructions to 17632812468 in my local testing. I think it was `-mcpu=sifive-x280 -O3`. I think that's a reduction of around 0.8%

Great, this is what I saw as well. Thanks for confirming!

https://github.com/llvm/llvm-project/pull/67602