[llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)

via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 4 12:19:28 PDT 2023


github-actions[bot] wrote:


<!--LLVM CODE FORMAT COMMENT: {clang-format}-->

:warning: C/C++ code formatter, clang-format found issues in your code. :warning:

<details>
<summary>
You can test this locally with the following command:
</summary>

``````````bash
git-clang-format --diff 1c2634e316f135855e66255e76d2d317fefa0622 9675d25dae38ac1c2054a13f1923188bac07321b -- llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp llvm/lib/Target/RISCV/RISCVISelLowering.cpp
``````````

</details>

<details>
<summary>
View the diff from clang-format here.
</summary>

``````````diff
diff --git a/llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp b/llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
index 93fdba869257..e1f3dc8d7050 100644
--- a/llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
+++ b/llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
@@ -68,7 +68,7 @@ private:
   /// Returns a G_ICMP that is equivalent to MI, whose condition code matches
   /// one of the comparisons supported directly by branches in the RISC-V ISA.
   MachineInstr *createICMPForBranch(MachineInstr *MI, MachineIRBuilder &MIB,
-                                 MachineRegisterInfo &MRI) const;
+                                    MachineRegisterInfo &MRI) const;
 
   const RISCVSubtarget &STI;
   const RISCVInstrInfo &TII;
@@ -435,7 +435,7 @@ MachineInstr *RISCVInstructionSelector::createICMPForBranch(
     case CmpInst::Predicate::ICMP_SLT:
       // Convert X < 1 to 0 >= X
       if (MaybeConstant->getOperand(1).getCImm()->getSExtValue() == 1) {
-        MachineInstr *Zero= MIB.buildConstant(
+        MachineInstr *Zero = MIB.buildConstant(
             MRI.getType(MaybeConstant->getOperand(0).getReg()), 0);
         selectConstant(*Zero, MIB, MRI);
         return MIB.buildICmp(CmpInst::Predicate::ICMP_SGE, MI->getOperand(0),
@@ -485,8 +485,7 @@ bool RISCVInstructionSelector::selectSelect(MachineInstr &MI,
                  .addDef(MI.getOperand(0).getReg());
     Result->addOperand(ICMPForBranch->getOperand(2));
     Result->addOperand(ICMPForBranch->getOperand(3));
-    Result->addOperand(
-        MachineOperand::CreateImm(getRISCVCCFromICMP(CC)));
+    Result->addOperand(MachineOperand::CreateImm(getRISCVCCFromICMP(CC)));
     Result->addOperand(MI.getOperand(2));
     Result->addOperand(MI.getOperand(3));
 

``````````

</details>


https://github.com/llvm/llvm-project/pull/68247


More information about the llvm-commits mailing list