[llvm] [AMDGPU] Allow shinking instruction with dead sdst (PR #68028)

[Stanislav Mekhanoshin via llvm-commits]

rampitec wrote:

> > There are some other instructions which will not be shrunk after RA however, because now more instructions will clobber VCC, and if the carry is used after such clobber then RA has no choice but to allocate a non-VCC SGPR.
> 
> My gut feeling is that we should leave this to the register allocator, instead of forcing dead dsts to use vcc. But I can't argue with the numbers - if it really does make the code smaller on average then I won't object. I would like to test it on some graphics shaders first though.

You can check me on this:

stas at rust:~/work/llvm/bin$ git show 3cd20200e46e57929342af4815412e2dedd598f1 | grep '^+.*_e32' | wc -l
1360
stas at rust:~/work/llvm/bin$ git show 3cd20200e46e57929342af4815412e2dedd598f1 | grep '^+.*_e64' | wc -l
1011
stas at rust:~/work/llvm/bin$ git show 3cd20200e46e57929342af4815412e2dedd598f1 | grep '^-.*_e32' | wc -l
1162
stas at rust:~/work/llvm/bin$ git show 3cd20200e46e57929342af4815412e2dedd598f1 | grep '^-.*_e64' | wc -l
1231

https://github.com/llvm/llvm-project/pull/68028