[llvm] [RISCV] Strip W suffix from ADDIW, SRLIW, and SRAIW (PR #68425)

[Craig Topper via llvm-commits]

topperc wrote:

I don't think it's safe to do this for SRAIW and SRLIW. SRAIW copies bit 31 to all the shifted right bits, SRAI copies bit 63. SRLIW inserts zeros starting at bit 31, SRLI starts at bit 63.

https://github.com/llvm/llvm-project/pull/68425