[llvm] 6741dd0 - Fix MSVC "cannot convert from 'llvm::Register' to 'llvm::MCRegister'" build error. NFCI.

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2023-10-02T12:41:08+01:00
New Revision: 6741dd0696d3b9726e506823a43e96c6b8ba575e

URL: https://github.com/llvm/llvm-project/commit/6741dd0696d3b9726e506823a43e96c6b8ba575e
DIFF: https://github.com/llvm/llvm-project/commit/6741dd0696d3b9726e506823a43e96c6b8ba575e.diff

LOG: Fix MSVC "cannot convert from 'llvm::Register' to 'llvm::MCRegister'" build error. NFCI.

Added: 
    

Modified: 
    llvm/lib/CodeGen/RegisterCoalescer.cpp

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/RegisterCoalescer.cpp b/llvm/lib/CodeGen/RegisterCoalescer.cpp
index a52b395dcfc8461..c388cf41df55d6d 100644
--- a/llvm/lib/CodeGen/RegisterCoalescer.cpp
+++ b/llvm/lib/CodeGen/RegisterCoalescer.cpp
@@ -1434,8 +1434,9 @@ bool RegisterCoalescer::reMaterializeTrivialDef(const CoalescerPair &CP,
 
         assert(MO.isImplicit() && MO.getReg().isPhysical() &&
                (MO.isDead() ||
-                (DefSubIdx && (TRI->getSubReg(MO.getReg(), DefSubIdx) ==
-                               MCRegister(NewMI.getOperand(0).getReg())))));
+                (DefSubIdx &&
+                 (TRI->getSubReg(MO.getReg(), DefSubIdx) ==
+                  MCRegister((unsigned)NewMI.getOperand(0).getReg())))));
         NewMIImplDefs.push_back(MO.getReg().asMCReg());
       } else {
         assert(MO.getReg() == NewMI.getOperand(0).getReg() &&