[llvm] 2c49311 - [SLP][NFC]Add insertsubvector test with small source vector, NFC.

[Alexey Bataev via llvm-commits]

Author: Alexey Bataev
Date: 2023-10-05T06:03:58-07:00
New Revision: 2c49311dead19a274a3ce2d422c75264ecd160d2

URL: https://github.com/llvm/llvm-project/commit/2c49311dead19a274a3ce2d422c75264ecd160d2
DIFF: https://github.com/llvm/llvm-project/commit/2c49311dead19a274a3ce2d422c75264ecd160d2.diff

LOG: [SLP][NFC]Add insertsubvector test with small source vector, NFC.

Added: 
    llvm/test/Transforms/SLPVectorizer/ARM/insert-into-small-vector.ll

Modified: 
    

Removed: 
    


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diff  --git a/llvm/test/Transforms/SLPVectorizer/ARM/insert-into-small-vector.ll b/llvm/test/Transforms/SLPVectorizer/ARM/insert-into-small-vector.ll
new file mode 100644
index 000000000000000..803ae70f8aa2951
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/ARM/insert-into-small-vector.ll
@@ -0,0 +1,43 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3
+; RUN: opt -S --passes=slp-vectorizer -mtriple=thumbv7-unknown-linux-android24 < %s | FileCheck %s
+
+define void @test() {
+; CHECK-LABEL: define void @test() {
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = load float, ptr null, align 4
+; CHECK-NEXT:    [[TMP1:%.*]] = load float, ptr null, align 4
+; CHECK-NEXT:    [[TMP2:%.*]] = load float, ptr null, align 4
+; CHECK-NEXT:    [[CMP_I:%.*]] = fcmp ogt float [[TMP1]], [[TMP0]]
+; CHECK-NEXT:    [[V14_0:%.*]] = select i1 [[CMP_I]], float [[TMP1]], float 0.000000e+00
+; CHECK-NEXT:    [[V0_0:%.*]] = select i1 [[CMP_I]], float [[TMP0]], float 0.000000e+00
+; CHECK-NEXT:    [[CMP4_I:%.*]] = fcmp ogt float 0.000000e+00, [[TMP2]]
+; CHECK-NEXT:    [[V19_0:%.*]] = select i1 [[CMP4_I]], float 0.000000e+00, float 0.000000e+00
+; CHECK-NEXT:    [[V9_0:%.*]] = select i1 [[CMP4_I]], float [[TMP2]], float 0.000000e+00
+; CHECK-NEXT:    store float [[V0_0]], ptr null, align 4
+; CHECK-NEXT:    [[V9IDX:%.*]] = getelementptr i8, ptr null, i32 4
+; CHECK-NEXT:    store float [[V9_0]], ptr [[V9IDX]], align 4
+; CHECK-NEXT:    [[V14IDX:%.*]] = getelementptr i8, ptr null, i32 8
+; CHECK-NEXT:    store float [[V14_0]], ptr [[V14IDX]], align 4
+; CHECK-NEXT:    [[V19IDX:%.*]] = getelementptr i8, ptr null, i32 12
+; CHECK-NEXT:    store float [[V19_0]], ptr [[V19IDX]], align 4
+; CHECK-NEXT:    ret void
+;
+entry:
+  %0 = load float, ptr null, align 4
+  %1 = load float, ptr null, align 4
+  %2 = load float, ptr null, align 4
+  %cmp.i = fcmp ogt float %1, %0
+  %v14.0 = select i1 %cmp.i, float %1, float 0.000000e+00
+  %v0.0 = select i1 %cmp.i, float %0, float 0.000000e+00
+  %cmp4.i = fcmp ogt float 0.000000e+00, %2
+  %v19.0 = select i1 %cmp4.i, float 0.000000e+00, float 0.000000e+00
+  %v9.0 = select i1 %cmp4.i, float %2, float 0.000000e+00
+  store float %v0.0, ptr null, align 4
+  %v9idx = getelementptr i8, ptr null, i32 4
+  store float %v9.0, ptr %v9idx, align 4
+  %v14idx = getelementptr i8, ptr null, i32 8
+  store float %v14.0, ptr %v14idx, align 4
+  %v19idx = getelementptr i8, ptr null, i32 12
+  store float %v19.0, ptr %v19idx, align 4
+  ret void
+}