[llvm] [SPIRV] Fix SPV_KHR_expect_assume support (PR #67793)

Paulo Matos via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 2 22:50:51 PDT 2023


https://github.com/pmatos updated https://github.com/llvm/llvm-project/pull/67793

>From 7d685e4863b6f70f10eb811a0674e52cac21fed7 Mon Sep 17 00:00:00 2001
From: Paulo Matos <pmatos at igalia.com>
Date: Fri, 29 Sep 2023 13:52:07 +0200
Subject: [PATCH 1/3] [SPIRV] Fix SPV_KHR_expect_assume support

Since efe0e10718 changes in tests are required. Need to add extension to Extensions list
and command line to enable use of the extension for test runs.
---
 llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp | 4 ++++
 llvm/test/CodeGen/SPIRV/assume.ll        | 4 ++--
 llvm/test/CodeGen/SPIRV/expect.ll        | 4 ++--
 3 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp b/llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
index 0c185f663b63f87..cf6dfb127cdebf3 100644
--- a/llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
@@ -41,6 +41,10 @@ cl::list<SPIRV::Extension::Extension> Extensions(
                    "SPV_KHR_no_integer_wrap_decoration",
                    "Adds decorations to indicate that a given instruction does "
                    "not cause integer wrapping"),
+        clEnumValN(SPIRV::Extension::SPV_KHR_expect_assume,
+                   "SPV_KHR_expect_assume",
+                   "Provides additional information to a compiler, similar to "
+                   "the llvm.assume and llvm.expect intrinsics."),
         clEnumValN(SPIRV::Extension::SPV_KHR_bit_instructions,
                    "SPV_KHR_bit_instructions",
                    "This enables bit instructions to be used by SPIR-V modules "
diff --git a/llvm/test/CodeGen/SPIRV/assume.ll b/llvm/test/CodeGen/SPIRV/assume.ll
index 679db5d88d4fbe7..69d3ade564da344 100644
--- a/llvm/test/CodeGen/SPIRV/assume.ll
+++ b/llvm/test/CodeGen/SPIRV/assume.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=spirv32-unknown-unknown < %s | FileCheck %s
-; RUN: llc -mtriple=spirv64-unknown-unknown < %s | FileCheck %s
+; RUN: llc -mtriple=spirv32-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck %s
+; RUN: llc -mtriple=spirv64-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck %s
 
 ; CHECK:      OpCapability ExpectAssumeKHR
 ; CHECK-NEXT: OpExtension "SPV_KHR_expect_assume"
diff --git a/llvm/test/CodeGen/SPIRV/expect.ll b/llvm/test/CodeGen/SPIRV/expect.ll
index 530ba7e5a49b09a..9af27965182cc04 100644
--- a/llvm/test/CodeGen/SPIRV/expect.ll
+++ b/llvm/test/CodeGen/SPIRV/expect.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=spirv32-unknown-unknown < %s | FileCheck %s
-; RUN: llc -mtriple=spirv64-unknown-unknown < %s | FileCheck %s
+; RUN: llc -mtriple=spirv32-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck %s
+; RUN: llc -mtriple=spirv64-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck %s
 
 ; CHECK:      OpCapability ExpectAssumeKHR
 ; CHECK-NEXT: OpExtension "SPV_KHR_expect_assume"

>From 8e4cfb408db0d495e371c523abbfce7be5ecab82 Mon Sep 17 00:00:00 2001
From: Paulo Matos <pmatos at igalia.com>
Date: Mon, 2 Oct 2023 13:52:44 +0200
Subject: [PATCH 2/3] Ignore assume/expect instructions if can't use extension.

---
 .../Target/SPIRV/SPIRVInstructionSelector.cpp   | 17 ++++++++++-------
 llvm/test/CodeGen/SPIRV/assume.ll               |  7 +++++++
 2 files changed, 17 insertions(+), 7 deletions(-)

diff --git a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
index 035989f2fe571b2..da61af7a669f149 100644
--- a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
@@ -12,6 +12,7 @@
 //
 //===----------------------------------------------------------------------===//
 
+#include "MCTargetDesc/SPIRVBaseInfo.h"
 #include "MCTargetDesc/SPIRVMCTargetDesc.h"
 #include "SPIRV.h"
 #include "SPIRVGlobalRegistry.h"
@@ -1407,15 +1408,17 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register ResVReg,
   case Intrinsic::spv_alloca:
     return selectFrameIndex(ResVReg, ResType, I);
   case Intrinsic::spv_assume:
-    BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpAssumeTrueKHR))
-        .addUse(I.getOperand(1).getReg());
+    if (STI.canUseExtension(SPIRV::Extension::SPV_KHR_expect_assume))
+      BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpAssumeTrueKHR))
+          .addUse(I.getOperand(1).getReg());
     break;
   case Intrinsic::spv_expect:
-    BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpExpectKHR))
-        .addDef(ResVReg)
-        .addUse(GR.getSPIRVTypeID(ResType))
-        .addUse(I.getOperand(2).getReg())
-        .addUse(I.getOperand(3).getReg());
+    if (STI.canUseExtension(SPIRV::Extension::SPV_KHR_expect_assume))
+      BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpExpectKHR))
+          .addDef(ResVReg)
+          .addUse(GR.getSPIRVTypeID(ResType))
+          .addUse(I.getOperand(2).getReg())
+          .addUse(I.getOperand(3).getReg());
     break;
   default:
     llvm_unreachable("Intrinsic selection not implemented");
diff --git a/llvm/test/CodeGen/SPIRV/assume.ll b/llvm/test/CodeGen/SPIRV/assume.ll
index 69d3ade564da344..08f4cd07b01678a 100644
--- a/llvm/test/CodeGen/SPIRV/assume.ll
+++ b/llvm/test/CodeGen/SPIRV/assume.ll
@@ -1,13 +1,20 @@
 ; RUN: llc -mtriple=spirv32-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck %s
 ; RUN: llc -mtriple=spirv64-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck %s
+; RUN: llc -mtriple=spirv32-unknown-unknown < %s | FileCheck --check-prefix=NOEXT %s
+; RUN: llc -mtriple=spirv64-unknown-unknown < %s | FileCheck --check-prefix=NOEXT %s
 
 ; CHECK:      OpCapability ExpectAssumeKHR
 ; CHECK-NEXT: OpExtension "SPV_KHR_expect_assume"
+; NOEXT-NOT:  OpCapability ExpectAssumeKHR
+; NOEXT-NOT:  OpExtension "SPV_KHR_expect_assume"
+
 
 declare void @llvm.assume(i1)
 
 ; CHECK-DAG:  %9 = OpIEqual %5 %6 %7
 ; CHECK-NEXT: OpAssumeTrueKHR %9
+; NOEXT:     %9 = OpIEqual %5 %6 %7
+; NOEXT-NOT: OpAssumeTrueKHR %9
 define void @assumeeq(i32 %x, i32 %y) {
     %cmp = icmp eq i32 %x, %y
     call void @llvm.assume(i1 %cmp)

>From 6f707ad81d71a999743427bc9189d46b3ddf40b4 Mon Sep 17 00:00:00 2001
From: Paulo Matos <pmatos at igalia.com>
Date: Tue, 3 Oct 2023 07:50:35 +0200
Subject: [PATCH 3/3] Improve code generation when expect/assume not avail

---
 .../lib/Target/SPIRV/SPIRVPrepareFunctions.cpp | 13 +++++++++++--
 llvm/test/CodeGen/SPIRV/assume.ll              | 18 ++++++++----------
 llvm/test/CodeGen/SPIRV/expect.ll              | 15 ++++++++++-----
 3 files changed, 29 insertions(+), 17 deletions(-)

diff --git a/llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp b/llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
index 87a9a0e4fab845c..97468eedd88e58e 100644
--- a/llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
@@ -300,7 +300,11 @@ bool SPIRVPrepareFunctions::substituteIntrinsicCalls(Function *F) {
         Changed = true;
       } else if (II->getIntrinsicID() == Intrinsic::assume ||
                  II->getIntrinsicID() == Intrinsic::expect) {
-        lowerExpectAssume(II);
+        TargetMachine &TM = M.getTargetMachine();
+        const TargetSubtargetInfo &STI = TM.getSubtarget<TargetSubtargetInfo>();
+
+        if(STI.canUse(SPIRV::Extension::SPV_KHR_expect_assume))
+          lowerExpectAssume(II);
         Changed = true;
       }
     }
@@ -376,8 +380,13 @@ SPIRVPrepareFunctions::removeAggregateTypesFromSignature(Function *F) {
 
 bool SPIRVPrepareFunctions::runOnModule(Module &M) {
   bool Changed = false;
+
+  // Get target machine and from it, the subtarget.
+  TargetMachine &TM = M.getTargetMachine();
+  const TargetSubtargetInfo &STI = TM.getSubtarget<TargetSubtargetInfo>();
+
   for (Function &F : M)
-    Changed |= substituteIntrinsicCalls(&F);
+    Changed |= substituteIntrinsicCalls(&F, STI);
 
   std::vector<Function *> FuncsWorklist;
   for (auto &F : M)
diff --git a/llvm/test/CodeGen/SPIRV/assume.ll b/llvm/test/CodeGen/SPIRV/assume.ll
index 08f4cd07b01678a..07b41dc4e5ee432 100644
--- a/llvm/test/CodeGen/SPIRV/assume.ll
+++ b/llvm/test/CodeGen/SPIRV/assume.ll
@@ -1,20 +1,18 @@
-; RUN: llc -mtriple=spirv32-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck %s
-; RUN: llc -mtriple=spirv64-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck %s
-; RUN: llc -mtriple=spirv32-unknown-unknown < %s | FileCheck --check-prefix=NOEXT %s
-; RUN: llc -mtriple=spirv64-unknown-unknown < %s | FileCheck --check-prefix=NOEXT %s
+; RUN: llc -mtriple=spirv32-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck --check-prefixes=EXT,CHECK %s
+; RUN: llc -mtriple=spirv64-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck --check-prefixes=EXT,CHECK %s
+; RUN: llc -mtriple=spirv32-unknown-unknown < %s | FileCheck --check-prefixes=NOEXT,CHECK %s
+; RUN: llc -mtriple=spirv64-unknown-unknown < %s | FileCheck --check-prefixes=NOEXT,CHECK %s
 
-; CHECK:      OpCapability ExpectAssumeKHR
-; CHECK-NEXT: OpExtension "SPV_KHR_expect_assume"
+; EXT:        OpCapability ExpectAssumeKHR
+; EXT-NEXT:   OpExtension "SPV_KHR_expect_assume"
 ; NOEXT-NOT:  OpCapability ExpectAssumeKHR
 ; NOEXT-NOT:  OpExtension "SPV_KHR_expect_assume"
 
-
 declare void @llvm.assume(i1)
 
 ; CHECK-DAG:  %9 = OpIEqual %5 %6 %7
-; CHECK-NEXT: OpAssumeTrueKHR %9
-; NOEXT:     %9 = OpIEqual %5 %6 %7
-; NOEXT-NOT: OpAssumeTrueKHR %9
+; EXT-NEXT:   OpAssumeTrueKHR %9
+; NOEXT-NOT:  OpAssumeTrueKHR %9
 define void @assumeeq(i32 %x, i32 %y) {
     %cmp = icmp eq i32 %x, %y
     call void @llvm.assume(i1 %cmp)
diff --git a/llvm/test/CodeGen/SPIRV/expect.ll b/llvm/test/CodeGen/SPIRV/expect.ll
index 9af27965182cc04..51555cd155523da 100644
--- a/llvm/test/CodeGen/SPIRV/expect.ll
+++ b/llvm/test/CodeGen/SPIRV/expect.ll
@@ -1,8 +1,12 @@
-; RUN: llc -mtriple=spirv32-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck %s
-; RUN: llc -mtriple=spirv64-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck %s
+; RUN: llc -mtriple=spirv32-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck --check-prefixes=CHECK,EXT %s
+; RUN: llc -mtriple=spirv64-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck --check-prefixes=CHECK,EXT %s
+; RUN: llc -mtriple=spirv32-unknown-unknown < %s | FileCheck --check-prefixes=CHECK,NOEXT %s
+; RUN: llc -mtriple=spirv64-unknown-unknown < %s | FileCheck --check-prefixes=CHECK,NOEXT %s
 
-; CHECK:      OpCapability ExpectAssumeKHR
-; CHECK-NEXT: OpExtension "SPV_KHR_expect_assume"
+; EXT:      OpCapability ExpectAssumeKHR
+; EXT-NEXT: OpExtension "SPV_KHR_expect_assume"
+; NOEXT-NOT:  OpCapability ExpectAssumeKHR
+; NOEXT-NOT:  OpExtension "SPV_KHR_expect_assume"
 
 declare i32 @llvm.expect.i32(i32, i32)
 declare i32 @getOne()
@@ -10,7 +14,8 @@ declare i32 @getOne()
 ; CHECK-DAG: %2 = OpTypeInt 32 0
 ; CHECK-DAG: %6 = OpFunctionParameter %2
 ; CHECK-DAG: %9 = OpIMul %2 %6 %8
-; CHECK-DAG: %10 = OpExpectKHR %2 %9 %6
+; EXT-DAG:   %10 = OpExpectKHR %2 %9 %6
+; NOEXT-NOT: %10 = OpExpectKHR %2 %9 %6
 
 define i32 @test(i32 %x) {
   %one = call i32 @getOne()



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